/linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_panel_cntl.c | 176 if (dcn31_panel_cntl->base.ctx->dc->config.support_edp0_on_dp1)
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H A D | dcn31_dio_link_encoder.c | 392 if (enc10->base.ctx->dc->debug.hdmi20_disable) { 458 if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { 468 link = link_enc_cfg_get_link_using_link_enc(enc->ctx->dc, enc->preferred_engine); 485 dpia_control.fec_rdy = link->dc->link_srv->dp_should_enable_fec(link); 505 if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { 515 link = link_enc_cfg_get_link_using_link_enc(enc->ctx->dc, enc->preferred_engine); 532 dpia_control.fec_rdy = link->dc->link_srv->dp_should_enable_fec(link); 551 if (!link_enc_cfg_is_transmitter_mappable(enc->ctx->dc, enc)) { 564 link = link_enc_cfg_get_link_using_link_enc(enc->ctx->dc, enc->preferred_engine);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_mpc.c | 31 #include "dc.h" 333 if (mpc->ctx->dc->debug.cm_in_bypass) { 368 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) 817 if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) { 828 if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) { 861 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) 1280 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) 1441 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
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H A D | dcn30_hubbub.c | 132 hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); 279 struct dc *dc = hubbub->ctx->dc; local 288 if (dc->debug.disable_dcc == DCC_DISABLE) 337 if (dc->debug.disable_dcc == DCC_HALF_REQ_DISALBE && 378 uint32_t refclk_mhz = hubbub->ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000;
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H A D | dcn30_dio_stream_encoder.c | 31 #include "dc.h" 535 if (!enc->ctx->dc->debug.avoid_vbios_exec_table) { 582 if (!enc->ctx->dc->debug.avoid_vbios_exec_table) {
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H A D | dcn30_dio_link_encoder.c | 203 if (enc10->base.ctx->dc->debug.hdmi20_disable) {
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H A D | Makefile | 40 AMD_DAL_DCN30 = $(addprefix $(AMDDALPATH)/dc/dcn30/,$(DCN30))
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_hubbub.c | 613 hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn201/ |
H A D | dcn201_hubbub.c | 73 hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);
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H A D | Makefile | 8 AMD_DAL_DCN201 = $(addprefix $(AMDDALPATH)/dc/dcn201/,$(DCN201))
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_mpc.c | 29 #include "dc.h" 412 if (mpc->ctx->dc->debug.cm_in_bypass) { 417 if (mpc->ctx->dc->work_arounds.dedcn20_305_wa == false) { 439 if (mpc->ctx->dc->debug.cm_in_bypass) {
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H A D | dcn20_hubbub.c | 221 struct dc *dc = hubbub->ctx->dc; local 230 if (dc->debug.disable_dcc == DCC_DISABLE) 279 if (dc->debug.disable_dcc == DCC_HALF_REQ_DISALBE && 594 if (hubbub1->base.ctx->dc->clk_mgr->clks.prev_p_state_change_support == true && 595 hubbub1->base.ctx->dc->clk_mgr->clks.p_state_change_support == false) 604 hubbub->funcs->allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter);
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H A D | Makefile | 10 AMD_DAL_DCN20 = $(addprefix $(AMDDALPATH)/dc/dcn20/,$(DCN20))
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_opp.c | 165 oppn10->base.ctx->dc->debug.force_chroma_subsampling_1tap;
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H A D | dcn10_link_encoder.c | 646 enc10->base.ctx->dc->debug.hdmi20_disable) && 649 if (enc10->base.ctx->dc->debug.hdmi20_disable && 776 if (enc10->base.ctx->dc->debug.hdmi20_disable) {
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H A D | dcn10_hw_sequencer_debug.c | 72 static unsigned int dcn10_get_hubbub_state(struct dc *dc, char *pBuf, unsigned int bufSize) argument 74 struct dc_context *dc_ctx = dc->ctx; 81 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; 85 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm); 110 static unsigned int dcn10_get_hubp_states(struct dc *dc, char *pBuf, unsigned int bufSize, bool invarOnly) argument 112 struct dc_context *dc_ctx = dc->ctx; 113 struct resource_pool *pool = dc 189 dcn10_get_rq_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 231 dcn10_get_dlg_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 288 dcn10_get_ttu_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 328 dcn10_get_cm_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 383 dcn10_get_mpcc_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 414 dcn10_get_otg_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 468 dcn10_get_clock_states(struct dc *dc, char *pBuf, unsigned int bufSize) argument 489 dcn10_clear_otpc_underflow(struct dc *dc) argument 505 dcn10_clear_hubp_underflow(struct dc *dc) argument 521 dcn10_clear_status_bits(struct dc *dc, unsigned int mask) argument 542 dcn10_get_hw_state(struct dc *dc, char *pBuf, unsigned int bufSize, unsigned int mask) argument [all...] |
H A D | dcn10_hubbub.h | 404 struct dc;
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H A D | dcn10_hubbub.c | 609 hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); 848 struct dc *dc = hubbub1->base.ctx->dc; local 858 if (dc->debug.disable_dcc == DCC_DISABLE) 901 if (dc->debug.disable_dcc == DCC_HALF_REQ_DISALBE &&
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H A D | Makefile | 32 AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))
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/linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dmub_replay.c | 26 #include "dc.h" 71 struct dc_context *dc = dmub->ctx; local 87 dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); 121 struct dc_context *dc = dmub->ctx; local 130 dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); 142 struct dc_context *dc = dmub->ctx; local 146 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; 199 !link->dc->debug.disable_fec) && 202 link->dc->caps.edp_dsc_support)) && 213 dm_execute_dmub_cmd(dc, 226 struct dc_context *dc = dmub->ctx; local 268 struct dc_context *dc = dmub->ctx; local [all...] |
H A D | dce_transform.c | 30 #include "dc.h" 185 if (xfm_dce->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE) {
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H A D | dmub_abm_lcd.c | 29 #include "dc.h" 56 static void dmub_abm_enable_fractional_pwm(struct dc_context *dc) argument 59 uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0; 60 uint32_t edp_id_count = dc->dc_edp_id_count; 75 dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); 144 struct dc_context *dc = abm->ctx; local 154 dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT); 165 struct dc_context *dc = abm->ctx; local 169 dmub_flush_buffer_mem(&dc 192 struct dc_context *dc = abm->ctx; local 219 dmub_abm_save_restore( struct dc_context *dc, unsigned int panel_inst, struct abm_save_restore *pData) argument 260 struct dc_context *dc = abm->ctx; local 284 struct dc_context *dc = abm->ctx; local [all...] |
H A D | dce_i2c_hw.c | 301 if (dce_i2c_hw->ctx->dc->debug.enable_mem_low_power.bits.i2c) { 316 set_speed(dce_i2c_hw, dce_i2c_hw->ctx->dc->caps.i2c_speed_in_khz); 380 set_speed(dce_i2c_hw, dce_i2c_hw->ctx->dc->caps.i2c_speed_in_khz_hdcp); 385 if (dce_i2c_hw->ctx->dc->debug.enable_mem_low_power.bits.i2c) { 703 if (ctx->dc->debug.scl_reset_length10)
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/linux-master/drivers/gpu/drm/amd/display/dc/ |
H A D | dc_types.h | 774 struct dc *dc; member in struct:dc_context 784 /* todo: below should probably move to dc. to facilitate removal
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H A D | dc_stream.h | 102 /* source MPCC instance. for use by internally by dc */ 351 bool dc_update_planes_and_stream(struct dc *dc, 366 void dc_commit_updates_for_stream(struct dc *dc, 375 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 377 uint8_t dc_get_current_stream_count(struct dc *dc); 378 struct dc_stream_state *dc_get_stream_at_index(struct dc *d [all...] |