1/* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26#ifndef DC_STREAM_H_ 27#define DC_STREAM_H_ 28 29#include "dc_types.h" 30#include "grph_object_defs.h" 31 32/******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39}; 40 41struct mall_stream_config { 42 /* MALL stream config to indicate if the stream is phantom or not. 43 * We will use a phantom stream to indicate that the pipe is phantom. 44 */ 45 enum mall_stream_type type; 46 struct dc_stream_state *paired_stream; // master / slave stream 47}; 48 49struct dc_stream_status { 50 int primary_otg_inst; 51 int stream_enc_inst; 52 53 /** 54 * @plane_count: Total of planes attached to a single stream 55 */ 56 int plane_count; 57 int audio_inst; 58 struct timing_sync_info timing_sync_info; 59 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 60 bool is_abm_supported; 61 struct mall_stream_config mall_stream_config; 62}; 63 64enum hubp_dmdata_mode { 65 DMDATA_SW_MODE, 66 DMDATA_HW_MODE 67}; 68 69struct dc_dmdata_attributes { 70 /* Specifies whether dynamic meta data will be updated by software 71 * or has to be fetched by hardware (DMA mode) 72 */ 73 enum hubp_dmdata_mode dmdata_mode; 74 /* Specifies if current dynamic meta data is to be used only for the current frame */ 75 bool dmdata_repeat; 76 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 77 uint32_t dmdata_size; 78 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 79 bool dmdata_updated; 80 /* If hardware mode is used, the base address where DMDATA surface is located */ 81 PHYSICAL_ADDRESS_LOC address; 82 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 83 bool dmdata_qos_mode; 84 /* If qos_mode = 1, this is the QOS value to be used: */ 85 uint32_t dmdata_qos_level; 86 /* Specifies the value in unit of REFCLK cycles to be added to the 87 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 88 */ 89 uint32_t dmdata_dl_delta; 90 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 91 uint32_t *dmdata_sw_data; 92}; 93 94struct dc_writeback_info { 95 bool wb_enabled; 96 int dwb_pipe_inst; 97 struct dc_dwb_params dwb_params; 98 struct mcif_buf_params mcif_buf_params; 99 struct mcif_warmup_params mcif_warmup_params; 100 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 101 struct dc_plane_state *writeback_source_plane; 102 /* source MPCC instance. for use by internally by dc */ 103 int mpcc_inst; 104}; 105 106struct dc_writeback_update { 107 unsigned int num_wb_info; 108 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 109}; 110 111enum vertical_interrupt_ref_point { 112 START_V_UPDATE = 0, 113 START_V_SYNC, 114 INVALID_POINT 115 116 //For now, only v_update interrupt is used. 117 //START_V_BLANK, 118 //START_V_ACTIVE 119}; 120 121struct periodic_interrupt_config { 122 enum vertical_interrupt_ref_point ref_point; 123 int lines_offset; 124}; 125 126struct dc_mst_stream_bw_update { 127 bool is_increase; // is bandwidth reduced or increased 128 uint32_t mst_stream_bw; // new mst bandwidth in kbps 129}; 130 131union stream_update_flags { 132 struct { 133 uint32_t scaling:1; 134 uint32_t out_tf:1; 135 uint32_t out_csc:1; 136 uint32_t abm_level:1; 137 uint32_t dpms_off:1; 138 uint32_t gamut_remap:1; 139 uint32_t wb_update:1; 140 uint32_t dsc_changed : 1; 141 uint32_t mst_bw : 1; 142 uint32_t crtc_timing_adjust : 1; 143 uint32_t fams_changed : 1; 144 } bits; 145 146 uint32_t raw; 147}; 148 149struct test_pattern { 150 enum dp_test_pattern type; 151 enum dp_test_pattern_color_space color_space; 152 struct link_training_settings const *p_link_settings; 153 unsigned char const *p_custom_pattern; 154 unsigned int cust_pattern_size; 155}; 156 157#define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 158 159struct dc_stream_debug_options { 160 char force_odm_combine_segments; 161}; 162 163struct dc_stream_state { 164 // sink is deprecated, new code should not reference 165 // this pointer 166 struct dc_sink *sink; 167 168 struct dc_link *link; 169 /* For dynamic link encoder assignment, update the link encoder assigned to 170 * a stream via the volatile dc_state rather than the static dc_link. 171 */ 172 struct link_encoder *link_enc; 173 struct dc_stream_debug_options debug; 174 struct dc_panel_patch sink_patches; 175 struct dc_crtc_timing timing; 176 struct dc_crtc_timing_adjust adjust; 177 struct dc_info_packet vrr_infopacket; 178 struct dc_info_packet vsc_infopacket; 179 struct dc_info_packet vsp_infopacket; 180 struct dc_info_packet hfvsif_infopacket; 181 struct dc_info_packet vtem_infopacket; 182 struct dc_info_packet adaptive_sync_infopacket; 183 uint8_t dsc_packed_pps[128]; 184 struct rect src; /* composition area */ 185 struct rect dst; /* stream addressable area */ 186 187 struct audio_info audio_info; 188 189 struct dc_info_packet hdr_static_metadata; 190 PHYSICAL_ADDRESS_LOC dmdata_address; 191 bool use_dynamic_meta; 192 193 struct dc_transfer_func *out_transfer_func; 194 struct colorspace_transform gamut_remap_matrix; 195 struct dc_csc_transform csc_color_matrix; 196 197 enum dc_color_space output_color_space; 198 enum display_content_type content_type; 199 enum dc_dither_option dither_option; 200 201 enum view_3d_format view_format; 202 203 bool use_vsc_sdp_for_colorimetry; 204 bool ignore_msa_timing_param; 205 206 /** 207 * @allow_freesync: 208 * 209 * It say if Freesync is enabled or not. 210 */ 211 bool allow_freesync; 212 213 /** 214 * @vrr_active_variable: 215 * 216 * It describes if VRR is in use. 217 */ 218 bool vrr_active_variable; 219 bool freesync_on_desktop; 220 bool vrr_active_fixed; 221 222 bool converter_disable_audio; 223 uint8_t qs_bit; 224 uint8_t qy_bit; 225 226 /* TODO: custom INFO packets */ 227 /* TODO: ABM info (DMCU) */ 228 /* TODO: CEA VIC */ 229 230 /* DMCU info */ 231 unsigned int abm_level; 232 233 struct periodic_interrupt_config periodic_interrupt; 234 235 /* from core_stream struct */ 236 struct dc_context *ctx; 237 238 /* used by DCP and FMT */ 239 struct bit_depth_reduction_params bit_depth_params; 240 struct clamping_and_pixel_encoding_params clamping; 241 242 int phy_pix_clk; 243 enum signal_type signal; 244 bool dpms_off; 245 246 void *dm_stream_context; 247 248 struct dc_cursor_attributes cursor_attributes; 249 struct dc_cursor_position cursor_position; 250 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 251 252 /* from stream struct */ 253 struct kref refcount; 254 255 struct crtc_trigger_info triggered_crtc_reset; 256 257 /* writeback */ 258 unsigned int num_wb_info; 259 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 260 const struct dc_transfer_func *func_shaper; 261 const struct dc_3dlut *lut3d_func; 262 /* Computed state bits */ 263 bool mode_changed : 1; 264 265 /* Output from DC when stream state is committed or altered 266 * DC may only access these values during: 267 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 268 * values may not change outside of those calls 269 */ 270 struct { 271 // For interrupt management, some hardware instance 272 // offsets need to be exposed to DM 273 uint8_t otg_offset; 274 } out; 275 276 bool apply_edp_fast_boot_optimization; 277 bool apply_seamless_boot_optimization; 278 uint32_t apply_boot_odm_mode; 279 280 uint32_t stream_id; 281 282 struct test_pattern test_pattern; 283 union stream_update_flags update_flags; 284 285 bool has_non_synchronizable_pclk; 286 bool vblank_synchronized; 287 bool fpo_in_use; 288 bool is_phantom; 289}; 290 291#define ABM_LEVEL_IMMEDIATE_DISABLE 255 292 293struct dc_stream_update { 294 struct dc_stream_state *stream; 295 296 struct rect src; 297 struct rect dst; 298 struct dc_transfer_func *out_transfer_func; 299 struct dc_info_packet *hdr_static_metadata; 300 unsigned int *abm_level; 301 302 struct periodic_interrupt_config *periodic_interrupt; 303 304 struct dc_info_packet *vrr_infopacket; 305 struct dc_info_packet *vsc_infopacket; 306 struct dc_info_packet *vsp_infopacket; 307 struct dc_info_packet *hfvsif_infopacket; 308 struct dc_info_packet *vtem_infopacket; 309 struct dc_info_packet *adaptive_sync_infopacket; 310 bool *dpms_off; 311 bool integer_scaling_update; 312 bool *allow_freesync; 313 bool *vrr_active_variable; 314 bool *vrr_active_fixed; 315 316 struct colorspace_transform *gamut_remap; 317 enum dc_color_space *output_color_space; 318 enum dc_dither_option *dither_option; 319 320 struct dc_csc_transform *output_csc_transform; 321 322 struct dc_writeback_update *wb_update; 323 struct dc_dsc_config *dsc_config; 324 struct dc_mst_stream_bw_update *mst_bw_update; 325 struct dc_transfer_func *func_shaper; 326 struct dc_3dlut *lut3d_func; 327 328 struct test_pattern *pending_test_pattern; 329 struct dc_crtc_timing_adjust *crtc_timing_adjust; 330}; 331 332bool dc_is_stream_unchanged( 333 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 334bool dc_is_stream_scaling_unchanged( 335 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 336 337/* 338 * Setup stream attributes if no stream updates are provided 339 * there will be no impact on the stream parameters 340 * 341 * Set up surface attributes and associate to a stream 342 * The surfaces parameter is an absolute set of all surface active for the stream. 343 * If no surfaces are provided, the stream will be blanked; no memory read. 344 * Any flip related attribute changes must be done through this interface. 345 * 346 * After this call: 347 * Surfaces attributes are programmed and configured to be composed into stream. 348 * This does not trigger a flip. No surface address is programmed. 349 * 350 */ 351bool dc_update_planes_and_stream(struct dc *dc, 352 struct dc_surface_update *surface_updates, int surface_count, 353 struct dc_stream_state *dc_stream, 354 struct dc_stream_update *stream_update); 355 356/* 357 * Set up surface attributes and associate to a stream 358 * The surfaces parameter is an absolute set of all surface active for the stream. 359 * If no surfaces are provided, the stream will be blanked; no memory read. 360 * Any flip related attribute changes must be done through this interface. 361 * 362 * After this call: 363 * Surfaces attributes are programmed and configured to be composed into stream. 364 * This does not trigger a flip. No surface address is programmed. 365 */ 366void dc_commit_updates_for_stream(struct dc *dc, 367 struct dc_surface_update *srf_updates, 368 int surface_count, 369 struct dc_stream_state *stream, 370 struct dc_stream_update *stream_update, 371 struct dc_state *state); 372/* 373 * Log the current stream state. 374 */ 375void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 376 377uint8_t dc_get_current_stream_count(struct dc *dc); 378struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 379 380/* 381 * Return the current frame counter. 382 */ 383uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 384 385/* 386 * Send dp sdp message. 387 */ 388bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 389 const uint8_t *custom_sdp_message, 390 unsigned int sdp_message_size); 391 392/* TODO: Return parsed values rather than direct register read 393 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 394 * being refactored properly to be dce-specific 395 */ 396bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 397 uint32_t *v_blank_start, 398 uint32_t *v_blank_end, 399 uint32_t *h_position, 400 uint32_t *v_position); 401 402bool dc_stream_add_writeback(struct dc *dc, 403 struct dc_stream_state *stream, 404 struct dc_writeback_info *wb_info); 405 406bool dc_stream_fc_disable_writeback(struct dc *dc, 407 struct dc_stream_state *stream, 408 uint32_t dwb_pipe_inst); 409 410bool dc_stream_remove_writeback(struct dc *dc, 411 struct dc_stream_state *stream, 412 uint32_t dwb_pipe_inst); 413 414enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 415 struct dc_state *state, 416 struct dc_stream_state *stream); 417 418bool dc_stream_warmup_writeback(struct dc *dc, 419 int num_dwb, 420 struct dc_writeback_info *wb_info); 421 422bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 423 424bool dc_stream_set_dynamic_metadata(struct dc *dc, 425 struct dc_stream_state *stream, 426 struct dc_dmdata_attributes *dmdata_attr); 427 428enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 429 430/* 431 * Set up streams and links associated to drive sinks 432 * The streams parameter is an absolute set of all active streams. 433 * 434 * After this call: 435 * Phy, Encoder, Timing Generator are programmed and enabled. 436 * New streams are enabled with blank stream; no memory read. 437 */ 438/* 439 * Enable stereo when commit_streams is not required, 440 * for example, frame alternate. 441 */ 442void dc_enable_stereo( 443 struct dc *dc, 444 struct dc_state *context, 445 struct dc_stream_state *streams[], 446 uint8_t stream_count); 447 448/* Triggers multi-stream synchronization. */ 449void dc_trigger_sync(struct dc *dc, struct dc_state *context); 450 451enum surface_update_type dc_check_update_surfaces_for_stream( 452 struct dc *dc, 453 struct dc_surface_update *updates, 454 int surface_count, 455 struct dc_stream_update *stream_update, 456 const struct dc_stream_status *stream_status); 457 458/** 459 * Create a new default stream for the requested sink 460 */ 461struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 462 463struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 464 465void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 466 467void dc_stream_retain(struct dc_stream_state *dc_stream); 468void dc_stream_release(struct dc_stream_state *dc_stream); 469 470struct dc_stream_status *dc_stream_get_status( 471 struct dc_stream_state *dc_stream); 472 473/******************************************************************************* 474 * Cursor interfaces - To manages the cursor within a stream 475 ******************************************************************************/ 476/* TODO: Deprecated once we switch to dc_set_cursor_position */ 477bool dc_stream_set_cursor_attributes( 478 struct dc_stream_state *stream, 479 const struct dc_cursor_attributes *attributes); 480 481bool dc_stream_set_cursor_position( 482 struct dc_stream_state *stream, 483 const struct dc_cursor_position *position); 484 485 486bool dc_stream_adjust_vmin_vmax(struct dc *dc, 487 struct dc_stream_state *stream, 488 struct dc_crtc_timing_adjust *adjust); 489 490bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 491 struct dc_stream_state *stream, 492 uint32_t *refresh_rate); 493 494bool dc_stream_get_crtc_position(struct dc *dc, 495 struct dc_stream_state **stream, 496 int num_streams, 497 unsigned int *v_pos, 498 unsigned int *nom_v_pos); 499 500#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 501bool dc_stream_forward_crc_window(struct dc_stream_state *stream, 502 struct rect *rect, 503 bool is_stop); 504#endif 505 506bool dc_stream_configure_crc(struct dc *dc, 507 struct dc_stream_state *stream, 508 struct crc_params *crc_window, 509 bool enable, 510 bool continuous); 511 512bool dc_stream_get_crc(struct dc *dc, 513 struct dc_stream_state *stream, 514 uint32_t *r_cr, 515 uint32_t *g_y, 516 uint32_t *b_cb); 517 518void dc_stream_set_static_screen_params(struct dc *dc, 519 struct dc_stream_state **stream, 520 int num_streams, 521 const struct dc_static_screen_params *params); 522 523void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 524 enum dc_dynamic_expansion option); 525 526void dc_stream_set_dither_option(struct dc_stream_state *stream, 527 enum dc_dither_option option); 528 529bool dc_stream_set_gamut_remap(struct dc *dc, 530 const struct dc_stream_state *stream); 531 532bool dc_stream_program_csc_matrix(struct dc *dc, 533 struct dc_stream_state *stream); 534 535bool dc_stream_get_crtc_position(struct dc *dc, 536 struct dc_stream_state **stream, 537 int num_streams, 538 unsigned int *v_pos, 539 unsigned int *nom_v_pos); 540 541struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 542 543void dc_dmub_update_dirty_rect(struct dc *dc, 544 int surface_count, 545 struct dc_stream_state *stream, 546 struct dc_surface_update *srf_updates, 547 struct dc_state *context); 548#endif /* DC_STREAM_H_ */ 549