#
255ce8f7 |
|
26-Feb-2021 |
Po-Ting Chen <robin.chen@amd.com> |
drm/amd/display: update GSP1 generic info packet for PSRSU Base on PSRSU specification, every seletive update frame need to use two SDP to indicate the frame active range. So we occupy another GSP1 for PSRSU execution. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Po-Ting Chen <robin.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7ae1dbe6 |
|
06-Feb-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: merge dc_link.h into dc.h and dc_types.h [why] Remove the need to include dc_link.h separately. dc.h should contain everything needed on DM side. [How] Merge dc_link.h into dc.h and dc_types.h so DM only needs to include dc.h to use all link public functions. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e95afc1c |
|
11-Jan-2023 |
Sung Joon Kim <sungjoon.kim@amd.com> |
drm/amd/display: Enable AdaptiveSync in DC interface [why] Start enabling AdaptiveSync feature on Linux environment. [how] Adding AdaptiveSync support in DC layer - building AdaptiveSync info_packets - adjusting the v_startup parameter Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7c50a3e9 |
|
14-Jun-2022 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amd/display: Program ACP related register - Setup the shift and mask of HDMI_ACP_SEND register - Program the register in hdmi stream encoder - Also update ACP register in azalia configuration Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
9a4c9de4 |
|
01-Aug-2019 |
Ahmad Othman <ahmad.othman@amd.com> |
drm/amd/display: Adding VTEM to dc [Why] Video Timing Extended Metadata packet (VTEM) is required for features like VRR and FVA [How] Adding support for VTEM transmission to stream encoders in DCN20 and DCN30 as part of FVA support Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ahmad Othman <ahmad.othman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3a6dce77 |
|
29-Apr-2022 |
David Zhang <dingchen.zhang@amd.com> |
drm/amd/display: update GSP1 generic info packet for PSRSU [why & how] Based on PSRSU specification, every selective update frame need to use two SDP to indicate the frame active range. So we occupy another GSP1 for PSRSU execution. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
d3dfceb5 |
|
23-Feb-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Add dependant changes for DCN32/321 [Why&How] This patch adds necessary changes needed in DC files outside DCN32/321 specific tree v2: squash in updates (Alex) Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
702f8dd8 |
|
28-Jan-2022 |
Zhan Liu <Zhan.Liu@amd.com> |
drm/amd/display: revert "Reset fifo after enable otg" [Why] This change causes regression, that prevents some systems from lighting up internal displays. [How] Revert this patch until a new solution is ready. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Zhan Liu <Zhan.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
49a6ebb9 |
|
28-Jan-2022 |
Zhan Liu <Zhan.Liu@amd.com> |
drm/amd/display: revert "Reset fifo after enable otg" [Why] This change causes regression, that prevents some systems from lighting up internal displays. [How] Revert this patch until a new solution is ready. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Zhan Liu <Zhan.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
|
#
240e6d25 |
|
08-Dec-2021 |
Isabella Basso <isabbasso@riseup.net> |
drm/amd/display: fix function scopes This turns previously global functions into static, thus removing compile-time warnings such as: warning: no previous prototype for 'get_highest_allowed_voltage_level' [-Wmissing-prototypes] 742 | unsigned int get_highest_allowed_voltage_level(uint32_t chip_family, uint32_t hw_internal_rev, uint32_t pci_revision_id) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ warning: no previous prototype for 'rv1_vbios_smu_send_msg_with_param' [-Wmissing-prototypes] 102 | int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Changes since v1: - As suggested by Rodrigo Siqueira: 1. Rewrite function signatures to make them more readable. 2. Get rid of unused functions in order to remove 'defined but not used' warnings. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Isabella Basso <isabbasso@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
430bb83d |
|
03-Nov-2021 |
Xu, Jinze <JinZe.Xu@amd.com> |
drm/amd/display: Reset fifo after enable otg [Why] In fast boot sequence, when change dispclk, otg is disabled but digfe is enabled. This may cause dig fifo error. [How] Reset dig fifo after enable otg. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b089ebaa |
|
13-Sep-2021 |
Michael Strauss <michael.strauss@amd.com> |
drm/amd/display: Don't enable AFMT for DP audio stream [WHY] AFMT is unused for DP audio, so powering it on for DP is unnecessary. [HOW] APG block should be powered down instead, however HW defaults to shutdown state when not enabled so no further work is required. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
253a5591 |
|
23-Aug-2021 |
Guo, Bing <Bing.Guo@amd.com> |
drm/amd/display: Fix issue with dynamic bpp change for DCN3x Why: Screen sometimes would have artifacts or blink once at the time when bpp is dynamically changed. How: 1. Changed to update PPS infopacket in frame mode instead of immediate mode since other updates for bpp change are double-buffered. 2. Changed double-buffering enablement programming for DCN30 as advised by ASIC team Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Bing Guo <Bing.Guo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
18b4f1a0 |
|
23-Aug-2021 |
Michael Strauss <michael.strauss@amd.com> |
drm/amd/display: Add VPG and AFMT low power support for DCN3.1 [WHY] Power down VPG and AFMT blocks when not in use [HOW] Create afmt31 and vpg31 structs and add necessary fields to reg list Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Mikita Lipski <mikita.lipski@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a659f2fd |
|
06-May-2021 |
Wesley Chalmers <Wesley.Chalmers@amd.com> |
drm/amd/display: Add interface to get Calibrated Avg Level from FIFO [WHY] Hardware has handed down a new sequence requiring the value of this register be read from clk_mgr. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
77a2b726 |
|
29-Dec-2020 |
Vladimir Stempen <vladimir.stempen@amd.com> |
drm/amd/display: Synchronize displays with different timings [why] Vendor based fan noise improvement [how] Report timing synchronizable when DP streams time frame difference is less than 0.05 percent. Adjust DP DTOs and sync displays using MASTER_UPDATE_LOCK_DB_X_Y Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6c95320d |
|
18-Aug-2020 |
George Shen <george.shen@amd.com> |
drm/amd/display: Rename set_mst_bandwidth to align with DP spec [Why] The function set_mst_bandwidth is poorly name since it isn't clear what it does, and it also does not reflect any part of the allocation sequence described in the DP spec. [How] Rename the function set_mst_bandwidth to set_throttled_vcp_size. Signed-off-by: George Shen <george.shen@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
be547111 |
|
22-May-2020 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Add DCN3 DIO Add support for the DIO (Display IO) block of DCN3, which entails our stream and link encoders. HW Blocks: +--------+ | DIO | +--------+ Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|