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0701117e |
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26-Jan-2024 |
Alvin Lee <alvin.lee2@amd.com> |
Revert "drm/amd/display: For FPO and SubVP/DRR configs program vmin/max sel" This reverts commit 6b2b782ad6a25734ae847d1659bea3f613dbb563. Since, it was causing regression for some DRR scenarios. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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dcbf438d |
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30-Nov-2023 |
Aric Cyr <aric.cyr@amd.com> |
drm/amd/display: Unify optimize_required flags and VRR adjustments [why] There is only a single call to dc_post_update_surfaces_to_stream so there is no need to have two flags to control it. Unifying this to a single flag allows dc_stream_adjust_vmin_vmax to skip actual programming when there is no change required. [how] Remove wm_optimze_required flag and set only optimize_required in its place. Then in dc_stream_adjust_vmin_vmax, check that the stream timing range matches the requested one and skip programming if they are equal. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a465536e |
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20-Dec-2023 |
Martin Leung <martin.leung@amd.com> |
drm/amd/display: revert "Optimize VRR updates to only necessary ones" This reverts commit 6e4337f695c25162f0296934152506ad596fcebf. The original commit causes regression in corner case with HDMI at specific timings. Reverting from staging to get the full suite to retest. Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Martin Leung <martin.leung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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012a04b1 |
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21-Nov-2023 |
Dillon Varone <dillon.varone@amd.com> |
drm/amd/display: Refactor phantom resource allocation [WHY?] Phantom streams and planes were previously not referenced explcitly on creation. [HOW?] To reduce memory management complexity, add an additional phantom streams and planes reference into dc_state, and move mall_stream_config to stream_status inside the state to make it safe to modify in shallow copies. Also consildates any logic that is affected by this change to dc_state. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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09a4ec5d |
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17-Nov-2023 |
Dillon Varone <dillon.varone@amd.com> |
drm/amd/display: Refactor dc_state interface [WHY?] Part of the dc_state interface that deals with adding streams and planes should remain public, while others that deal with internal status' and subvp should be private to DC. [HOW?] Move and rename the public functions to dc_state.h and private functions to dc_state_priv.h. Also add some additional functions for extracting subvp meta data from the state. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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6e4337f6 |
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30-Nov-2023 |
Aric Cyr <aric.cyr@amd.com> |
drm/amd/display: Unify optimize_required flags and VRR adjustments [why] There is only a single call to dc_post_update_surfaces_to_stream so there is no need to have two flags to control it. Unifying this to a single flag allows dc_stream_adjust_vmin_vmax to skip actual programming when there is no change required. [how] Remove wm_optimze_required flag and set only optimize_required in its place. Then in dc_stream_adjust_vmin_vmax, check that the stream timing range matches the requested one and skip programming if they are equal. Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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87ce0e62 |
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01-Dec-2023 |
Alex Hung <alex.hung@amd.com> |
drm/amd/display: Disable DWB frame capture to emulate oneshot [WHY] drm_writeback requires to capture exact one frame in each writeback call. [HOW] frame_capture is disabled after each writeback is completed. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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7086af68 |
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11-Oct-2023 |
Alex Hung <alex.hung@amd.com> |
Revert "drm/amd/display: Disable DWB frame capture to emulate oneshot" This reverts commit 77a66faaccc0455fe30e326e9a997aec8d0abed4. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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13c0e836 |
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25-Sep-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Adjust code style for hw_sequencer.h [Why&How] * Rearrange some definitions for consistency * Drop legacy code Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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77a66faa |
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23-Jun-2023 |
Alex Hung <alex.hung@amd.com> |
drm/amd/display: Disable DWB frame capture to emulate oneshot [WHY] drm_writeback requires to capture exact one frame in each writeback call. [HOW] frame_capture is disabled after each writeback is completed. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d834af4e |
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12-Sep-2023 |
Joshua Ashton <joshua@froggi.es> |
drm/amd/display: Remove unused display_content_support This was never filled in and thus never truly used. Checking the EDID for content_type support is not required for sending the avi infoframe packet. v2: - rebase to amd-staging-drm-next Reviewed-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Melissa Wen <mwen@igalia.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4c4583fd |
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12-Sep-2023 |
Joshua Ashton <joshua@froggi.es> |
drm/amd/display: Hook up 'content type' property for HDMI Implements the 'content type' property for HDMI connectors. Verified by checking the avi infoframe on a connected TV. This also simplifies a lot of the code in that area as well, there were a lot of temp variables doing very little and unnecessary logic that was quite confusing. It is not necessary to check for support in the EDID before sending a 'content type' value in the avi infoframe also. v2: - rebase to amd-staging-drm-next - mark CRTC state for reset if content_type differs Reviewed-by: Harry Wentland <harry.wentland@amd.com> (v1) Signed-off-by: Joshua Ashton <joshua@froggi.es> Co-developed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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45f98fcc |
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04-Jul-2023 |
Ian Chen <ian.chen@amd.com> |
drm/amd/display: Refactor edp power control [Why & How] To organize the edp power control a bit: 1. add flag in dc_link to indicate dc to skip all implicit eDP power control. 2. add edp_set_panel_power link service for DM to call. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Ian Chen <ian.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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8e7b3f54 |
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25-Apr-2023 |
Max Tseng <max.tseng@amd.com> |
drm/amd/display: Add control flag to dc_stream_state to skip eDP BL off/link off Add control flag to dc_stream_state to skip eDP BL off/link off. Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Max Tseng <max.tseng@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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62cc6216 |
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26-Apr-2023 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Check Vactive for VRR active for FPO + Vactive [Description] - For FPO + Vactive cases, we rely on the Vactive display to be at it's nominal refresh rate because the Vactive pipe may not necessarily assert P-State allow while it's in VBLANK - For cases where the Vactive display has a stretched VBLANK due to VRR, we could underflow when trying to complete an FPO + Vactive MCLK switch because the FPO display has limited VBLANK time in waiting for the Vactive display to assert P-State allow naturally - Block FPO + Vactive if the Vactive display has VRR active (variable or fixed) Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0c0463ff |
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28-Mar-2023 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Reduce SubVP + DRR stretch margin [Description] - Having excessively large margin causes failure in the static schedulability check in some cases for SubVP + DRR - 100us of DRR margin is sufficient based on a weeks worth of stress testing on different display configs Reviewed-by: Michael Strauss <Michael.Strauss@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ec341e0f |
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20-Mar-2023 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: add extra dc odm debug options [Why & How] Add options for dc odm debug. Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e3416e87 |
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24-Mar-2023 |
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
drm/amd/display: Add FAMS validation before trying to use it To ensure that FAMS can be used, DC must check if there is VRR support. This commit adds the required configuration to ensure FAMS can be executed in the target system. Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c4edb013 |
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28-Mar-2023 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Reduce SubVP + DRR stretch margin [Description] - Having excessively large margin causes failure in the static schedulability check in some cases for SubVP + DRR - 100us of DRR margin is sufficient based on a weeks worth of stress testing on different display configs Reviewed-by: Michael Strauss <Michael.Strauss@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4ed79308 |
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15-Mar-2023 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Use per pipe P-State force for FPO [Description] * Pass in pipe index for FPO cmd to DMCUB - This change will pass in the pipe index for each stream that is using FPO - This change is in preparation to enable FPO + VActive * Use per pipe P-State force for FPO - For FPO, instead of using max watermarks value for P-State disallow, use per pipe p-state force instead - This is in preparation to enable FPO + VActive Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e95afc1c |
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11-Jan-2023 |
Sung Joon Kim <sungjoon.kim@amd.com> |
drm/amd/display: Enable AdaptiveSync in DC interface [why] Start enabling AdaptiveSync feature on Linux environment. [how] Adding AdaptiveSync support in DC layer - building AdaptiveSync info_packets - adjusting the v_startup parameter Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1b11ff76 |
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19-Oct-2022 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amd/display: Implement multiple secure display [Why] Current secure display only work with single display, now make it work with multiple displays. [How] Create secure_display_context for each crtc instance to store its own Region of Interest (ROI) information. v2: squash in warning fix (Alex) Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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aaae5211 |
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17-Nov-2022 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Retain phantom pipes when min transition into subvp (#7358) [Description] - When entering into a SubVP config that requires a minimal transition we need to retain phantom pipes and also restore the mall config - This is because the min transition will remove phantom pipes from the context (shallow copy) and not restore it's original state - This is just a workaround, and needs a proper fix Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ae7169a9 |
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07-Nov-2022 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Add margin on DRR vblank start for subvp [Description] - Add margin for HUBP "jitter" for SubVp + DRR case - Also do a min transition even if MPO is added on a non SubVP pipe (i.e. added on DRR pipe for SubVP + DRR) Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1682bd1a |
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20-Oct-2022 |
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
drm/amd/display: Expand kernel doc for DC This commit adds extra documentation for elements related to FAMs. Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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62fa035b |
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20-Oct-2022 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amd/display: Drop struct crc_region and reuse struct rect [Why] reuse struct rect rather than adding a new struct. [How] - Userspace keeps inputting x_start, y_start, x_end, y_end - We translate data to x, y, width, height in code flow to store - translate back to x_start, y_start, x_end, y_end before programming HW Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c0459bdd |
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20-Oct-2022 |
Alan Liu <HaoPing.Liu@amd.com> |
drm/amd/display: Implement secure display on DCN21 [Why] Porting secure display feature from DCN10 to DCN21. Support single display for now and will extend to multiple displays. [How] - use workqueue to offload works for dmub or dmcu firmware - after receiving ROI update from userspace, set skip_frame_cnt to 1 - refactor amdgpu_dm_crtc_handle_crc_window_irq() - disable PSR before activating secure_display on a crtc - check if secure_display is activated before enabling psr - only work for single display for now. Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f6ae69f4 |
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18-Oct-2022 |
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
drm/amd/display: Include surface of unaffected streams The commit stream function does not include surfaces of unaffected streams, which may lead to some blank screens during mode change in some edge cases. This commit adds surfaces of unaffected streams followed by kernel-doc for documenting some of the fields that participate in this change. v2: squash in kerneldoc warning fix (Alex) Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Co-developed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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97d8d6f0 |
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09-Sep-2022 |
Aric Cyr <aric.cyr@amd.com> |
drm/amd/display: Remove interface for periodic interrupt 1 [why] Only a single VLINE interrupt is available so interface should not expose the second one which is used by DMU firmware. [how] Remove references to periodic_interrupt1 and VLINE1 from DC interfaces. Reviewed-by: Jaehyun Chung <jaehyun.chung@amd.com> Acked-by: Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9f92c202 |
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08-Aug-2022 |
Saaem Rizvi <SyedSaaem.Rizvi@amd.com> |
drm/amd/display: HDMI ODM Combine Policy Correction [WHY] Reprogramming the stream despite no changes in ODM combine mode. Reprogramming the stream would cause intermittent black screen on display which could only be recovered through enable/disable sequence. [HOW] Fixed bug where we detected a change in ODM combine mode despite ODM combine mode being disabled. Also removed code which required stream to be reprogrammed once a change in ODM combine mode was noticed. Lastly we do not support dynamic ODM switching for HDMI TMDS and FRL on DCN32, therefore we never want to change its ODM policy. Reviewed-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2182cb70 |
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27-Jul-2022 |
Maíra Canal <mairacanal@riseup.net> |
drm/amd/display: Remove unused struct freesync_context All references to struct freesync_context were removed, so remove the struct freesync_context itself and its entry on struct dc_stream_state. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4984dcdc |
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17-Jun-2022 |
Chris Park <chris.park@amd.com> |
drm/amd/display: Indicate stream change on ODM change [Why] With ODM policy 2 to 1, there exists a new use case scenario where stream content is unchanged, but ODM may be used. When this happens, the stream needs to be committed with a new pipe setting. This did not happen due to stream change detection logic not accounting for ODM. [How] Set ODM flag in stream and commit stream when change in ODM has been detected due to policy change. Reviewed-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Chris Park <chris.park@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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97ca3089 |
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20-Jun-2022 |
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> |
drm/amd/display: Add minimal pipe split transition state [WHY?] When adding/removing a plane to some configurations, unsupported pipe programming can occur when moving to a new plane. Such cases include pipe split on multi-display, with MPO, and/or ODM. [HOW?] Add a safe transistion state that minimizes pipe usage before programming new configuration. When adding a plane, the current state has the least pipes required so it is applied without splitting. This must be applied prior to updating the plane_state for seamless transition. When removing a plane, the new state has the least pieps required so it is applied without splitting. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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85f4bc0c |
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02-May-2022 |
Alvin Lee <Alvin.Lee2@amd.com> |
drm/amd/display: Add SubVP required code This commit enables the SubVP feature. To achieve that, we need to: - Don't force p-state disallow on SubVP (can't block dummy p-state) - Send calculated watermark to DMCUB for SubVP - Adjust CAB mode message to PMFW - Add a proper locking sequence for SubVP - Various fixes to SubVP static analysis and determining SubVP config - Currently SubVP not supported with pipe split so merge all pipes before setting up SubVp Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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052eaf6a |
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13-Apr-2022 |
Wayne Lin <Wayne.Lin@amd.com> |
drm/amd/display: Revert "drm/amd/display: turn DPMS off on connector unplug" This reverts commit 3c4d55c9b9becedd8d31a7c96783a364533713ab. Revert the commit because: - It's incomplete of the function dm_set_dpms_off() for mst case. For stream sinks whithin the same mst topology, they share the same dc_link. dm_set_dpms_off() tries to update one mst stream only which is incomplete. - Setting dpms off should be triggered by usermode. Besdies, it seems usermode does release relevant resource for mst & non-mst case when unplug connecotr now. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ebfb1526 |
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10-May-2021 |
Harry VanZyllDeJong <harry.vanzylldejong@amd.com> |
drm/amd/display: Add vrr_active_variable to dc_stream_update [WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Harry VanZyllDeJong <harry.vanzylldejong@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3de58f22 |
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26-Mar-2021 |
Felipe Clark <Felipe.Clark@amd.com> |
drm/amd/display: Pass vrr mode to dcn [WHY] New features will require knowing the vrr mode for their enablement. [HOW] Pass the state via a member of dc_stream. Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Felipe Clark <Felipe.Clark@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9a4c9de4 |
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01-Aug-2019 |
Ahmad Othman <ahmad.othman@amd.com> |
drm/amd/display: Adding VTEM to dc [Why] Video Timing Extended Metadata packet (VTEM) is required for features like VRR and FVA [How] Adding support for VTEM transmission to stream encoders in DCN20 and DCN30 as part of FVA support Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ahmad Othman <ahmad.othman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2bbb54bb |
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04-Feb-2019 |
Ahmad Othman <ahmad.othman@amd.com> |
drm/amd/display: Add support for HF-VSIF [Why] - Currently there is no support for HF-VSIF - The current support of VSIF is limited to H14b infoframe [How] - refactor VSIF - Added new builder for HF-VSIF - Added the HF-VSIF packet to DisplayTarget - Updates DC to apply HF-VSIF updates when updating streams Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Ahmad Othman <ahmad.othman@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c2fbe663 |
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07-Mar-2021 |
Felipe Clark <felipe.clark@amd.com> |
drm/amd/display: Firmware assisted MCLK switch and FS [WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Felipe Clark <felipe.clark@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1da5dab0 |
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29-Apr-2022 |
David Zhang <dingchen.zhang@amd.com> |
drm/amd/display: combine dirty rectangles in DMUB FW [why] In PSR-SU design, the DMUB FW handles the combination of multiple dirty rectangles. [how] - create DC dmub update dirty rectangle helper which sends the dirty rectangles per pipe from DC to DMUB, and DMUB FW will handle to combine the dirty RECTs - call the helper from DC commit plane update function. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d3dfceb5 |
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23-Feb-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Add dependant changes for DCN32/321 [Why&How] This patch adds necessary changes needed in DC files outside DCN32/321 specific tree v2: squash in updates (Alex) Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9844792e |
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14-Mar-2022 |
Ilya Bakoulin <Ilya.Bakoulin@amd.com> |
drm/amd/display: Keep track of DSC packed PPS [Why] Store current packed PPS data in dc_stream_state for future use. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
663d2dae |
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31-Mar-2022 |
Duncan Ma <Duncan.Ma@amd.com> |
drm/amd/display: Add odm seamless boot support [WHY] Implement changes to transition from Pre-OS odm to Post-OS odm support. Seamless boot case is also considered. [HOW] Revised validation logic when marking for seamless boot. Init resources accordingly when Pre-OS has odm enabled. Reset odm and det size when transitioning Pre-OS odm to Post-OS non-odm to avoid corruption. Apply logic to set odm accordingly upon commit. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com> Signed-off-by: Duncan Ma <Duncan.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e5fc7825 |
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13-Mar-2022 |
Gabe Teeger <gabe.teeger@amd.com> |
drm/amd/display: Add support for zstate during extended vblank [why] When we enter FREESYNC_STATE_VIDEO, we want to use the extra vblank portion to enter zstate if possible. [how] When we enter freesync, a full update is triggered and the new vtotal with extra lines is passed to dml in a stream update. The time gained from extra vblank lines is calculated in microseconds. We allow zstate entry if the time gained is greater than 5 ms, which is the current policy. Furthermore, an optimized value for min_dst_y_next_start is calculated and written to its register. When exiting freesync, another full update is triggered and default values are restored. Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
10499e40 |
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10-Mar-2022 |
Leo (Hanghong) Ma <hanghong.ma@amd.com> |
drm/amd/display: Add function to get the pipe from the stream context [Why] We need a helper function in dc to grab the pipe from the stream context. [How] Add it. Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d9eb8fea |
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19-Jan-2022 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: Drop DCN for DP2.x logic [Why & How] DCN guard is not necessary for DP2.x relevant logic. Drop them. v2: squash in fix for misplaced #endif (Alex) Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d740e0bf |
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25-Oct-2021 |
Fangzhi Zuo <Jerry.Zuo@amd.com> |
drm/amd/display: Add DP 2.0 MST DC Support [Why] configure/call DC interface for DP2 mst support. This is needed to make DP2 mst work. [How] - add encoding type, logging, mst update/reduce payload functions Use the link encoding to determine the DP type (1.4 or 2.0) and add a flag to dc_stream_update to determine whether to increase/reduce payloads. v2: * add DP_UNKNOWN_ENCODING handling Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Reviewed-by: "Lin, Wayne" <Wayne.Lin@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211025223825.301703-4-lyude@redhat.com
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#
5c69cc55 |
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04-May-2021 |
Jayendran Ramani <Jayendran.Ramani@amd.com> |
drm/amd/display: Return last used DRR VTOTAL from DC [How] Add call to get the last used VTOTAL from DC Signed-off-by: Jayendran Ramani <Jayendran.Ramani@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4932d176 |
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08-May-2021 |
hvanzyll <hvanzyll@amd.com> |
drm/amd/display: disable desktop VRR when using older flip model [WHY] OS uses older flip model which does not work with desktop VRR causing memory allocations at the wrong IRQ level. [HOW] Checks added to flip model to verify model is 2.2 or greater when doing any of the desktop VRR checks for full updates. This prevents full updates when VRR changes until a mode change. Signed-off-by: Harry VanZyllDeJong <hvanzyll@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
719349f8 |
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27-Oct-2020 |
Mikita Lipski <mikita.lipski@amd.com> |
drm/amd/display: Remove unused flag from stream state [why & how] Removing unused DSC flag which is incorrect and is not used. We are only using stream->timing.flags.DSC for DSC's current state. Stream state as an input parameter and should not contain any past status flags. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Bindu Ramamurthy <bindur12@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b126a699 |
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30-Nov-2020 |
Wesley Chalmers <Wesley.Chalmers@amd.com> |
drm/amd/display: New path for enabling DPG [WHY] We want to make enabling test pattern a part of the stream update code path. This change is the first step towards that goal. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f42ef862 |
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05-Jan-2021 |
Jimmy Kizito <Jimmy.Kizito@amd.com> |
drm/amd/display: Add dynamic link encoder selection. [Why] Some display endpoints may be programmably mapped to compatible link encoders. The assignment of link encoders to links has to be dynamic to accommodate the increased flexibility in comparison to conventional display endpoints. [How] - Add link encoder assignment tracking variables. - Execute link encoder assignment algorithm before enabling link and release link encoders from links once they are disabled. Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0d7e6dc0 |
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19-Jan-2021 |
Wayne Lin <Wayne.Lin@amd.com> |
drm/amd/display: Process crc window at DMCU [Why & How] Add additional MCP_SCP commands for starting/stopping updaing crc window at DMCU Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
77a2b726 |
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29-Dec-2020 |
Vladimir Stempen <vladimir.stempen@amd.com> |
drm/amd/display: Synchronize displays with different timings [why] Vendor based fan noise improvement [how] Report timing synchronizable when DP streams time frame difference is less than 0.05 percent. Adjust DP DTOs and sync displays using MASTER_UPDATE_LOCK_DB_X_Y Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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263a4feb |
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18-Feb-2021 |
Anson Jacob <Anson.Jacob@amd.com> |
Revert "drm/amd/display: reuse current context instead of recreating one" This reverts commit 8866a67ab86cc0812e65c04f1ef02bcc41e24d68. Reason for revert: This breaks hotplug of HDMI on some systems, resulting in a blank screen. Caused general hangs on boot/hotplugs. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1487 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1492 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=211649 Signed-off-by: Anson Jacob <Anson.Jacob@amd.com> Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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29249676 |
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27-Jan-2021 |
Wesley Chalmers <Wesley.Chalmers@amd.com> |
Revert "drm/amd/display: New path for enabling DPG" This reverts commit f8e792dc5c45d306a542b9ee991ae80e1c78e4c5 [Why] We are not implementing the planned new HW sequence for HUBP disable. [How] Revert most related changes to minimize regressions. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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efc8278e |
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18-Feb-2021 |
Anson Jacob <Anson.Jacob@amd.com> |
Revert "drm/amd/display: reuse current context instead of recreating one" This reverts commit 8866a67ab86cc0812e65c04f1ef02bcc41e24d68. Reason for revert: This breaks hotplug of HDMI on some systems, resulting in a blank screen. Caused general hangs on boot/hotplugs. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1487 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1492 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=211649 Signed-off-by: Anson Jacob <Anson.Jacob@amd.com> Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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fa2a3786 |
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06-Jan-2021 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: reuse current context instead of recreating one [Why] Currently we discard the current context and recreate it. The current context is what is applied to the HW so we should be re-using this rather than creating a new context. Recreating the context can lead to mismatch between new context and the current context For example: gsl groups get changed when we create a new context this can cause issues in a multi display config (with flip immediate) because we don't align the existing gsl groups in the new and current context. If we reuse the current context the gsl group assignment stays the same. [How] Instead of discarding the current context, we instead just copy the current state and add/remove planes and streams. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f8e792dc |
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30-Nov-2020 |
Wesley Chalmers <Wesley.Chalmers@amd.com> |
drm/amd/display: New path for enabling DPG [WHY] We want to make enabling test pattern a part of the stream update code path. This change is the first step towards that goal. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8866a67a |
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06-Jan-2021 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: reuse current context instead of recreating one [Why] Currently we discard the current context and recreate it. The current context is what is applied to the HW so we should be re-using this rather than creating a new context. Recreating the context can lead to mismatch between new context and the current context For example: gsl groups get changed when we create a new context this can cause issues in a multi display config (with flip immediate) because we don't align the existing gsl groups in the new and current context. If we reuse the current context the gsl group assignment stays the same. [How] Instead of discarding the current context, we instead just copy the current state and add/remove planes and streams. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3c4d55c9 |
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26-Nov-2020 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: turn DPMS off on connector unplug [Why&How] Set dpms off on the connector that was unplugged, for the side effect of releasing some references held through deallocation of MST payload. This is the expected behaviour for non MST devices as well. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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20f2ffe5 |
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02-Nov-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3) Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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91d3156a |
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19-Oct-2020 |
Wayne Lin <Wayne.Lin@amd.com> |
drm/amd/display: Calculate CRC on specific frame region [why] Currently, we only support calculating CRC on whole frame. We want to extend the capability to calculate CRC on specific frame area. [how] Calculate CRC on specific area once it's specified from the input parameter. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4fbb3ae2 |
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12-Oct-2020 |
Bernard Zhao <bernard@vivo.com> |
drm/amd/display: remove no need return value Functions (disable_all_writeback_pipes_for_stream & dc_enable_stereo & dc_post_update_surfaces_to_stream) always return true, there is no need to keep the return value. This change is to make the code a bit more readable. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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54e8094a |
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18-Sep-2020 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Block ABM in case of eDP ODM [Why] enable ODM on eDP panel with ABM will result in color difference on the panel due to only one ABM module to set one pipe. [How] Block ABM in case of ODM enabled on eDP. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f0372d4f |
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10-Jun-2020 |
Brandon Syu <Brandon.Syu@amd.com> |
drm/amd/display: Keep current gain when ABM disable immediately [Why] When system enters s3/s0i3, backlight PWM would set user level. [How] ABM disable function add keep current gain to avoid it. Signed-off-by: Brandon Syu <Brandon.Syu@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cba4b52e |
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10-Jun-2020 |
Brandon Syu <Brandon.Syu@amd.com> |
drm/amd/display: Keep current gain when ABM disable immediately [Why] When system enters s3/s0i3, backlight PWM would set user level. [How] ABM disable function add keep current gain to avoid it. Signed-off-by: Brandon Syu <Brandon.Syu@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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471c1dd9 |
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15-Jul-2020 |
Reza Amini <Reza.Amini@amd.com> |
drm/amd/display: Allow asic specific FSFT timing optimization [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3d4e52d0 |
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20-Jul-2020 |
Victor Lu <victorchengchi.lu@amd.com> |
drm/amd/display: Add debugfs for forcing stream timing sync [why] There's currently no method to enable multi-stream synchronization from userspace and we don't check the VSDB bits to know whether or not specific displays should have the feature enable. [how] Add a debugfs entry that controls a new DM debug option, "force_timing_sync". This debug option will set on any newly created stream following the change to the debug option. Expose a new interface from DC that performs the timing sync and a helper to the "force_timing_sync" debugfs that iterates over the current streams and modifies the current synchornization state and grouping. Example usage to force a resync (from an X based desktop): echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_force_timing_sync xset dpms force off && xset dpms force on Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cc0f379d |
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15-Jul-2020 |
Reza Amini <Reza.Amini@amd.com> |
drm/amd/display: Allow asic specific FSFT timing optimization [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b4f71c8c |
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06-Jul-2020 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Make new dc interface for adding dsc resource [Why] dcn20_add_dsc_to_stream_resource is accessed in amdgpu_dm directly. This creates build error for configuration with DCN disabled. [How] Make the function available through a resource pool function so that dcn20 function need not be called directly. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
831010da |
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02-Jul-2020 |
Reza Amini <Reza.Amini@amd.com> |
drm/amd/display: Implement AMD VSIF V3 [Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d99f1387 |
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20-May-2020 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Add DCN3 HWSEQ Add HW sequence programing for DCN3 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d1ebfdd8 |
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31-Mar-2020 |
Wyatt Wood <wyatt.wood@amd.com> |
drm/amd/display: Unify psr feature flags [Why] As it stands, psr has feature flags in dm, stream, and link. Most are not defined well enough, and different dm layers have different uses for these same flags. [How] We define a new structure called psr_settings in dc_link that will hold the following psr feature flags: psr_feature_enable - psr is supported psr_allow_active - psr is currently active psr_version - internal psr version supported psr_frame_capture_indication_req psr_sdp_transmit_line_num_deadline The last two flags were moved out of the power module for the purposes of consolidating psr flags. Their use is already well-defined. Psr caps reported by sink will also be stored in dc_link, in dpcd_caps.psr_caps. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
acdac228 |
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14-Jan-2020 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: Indicate dsc updates explicitly [Why] DSC updates only set type to FULL UPDATE, but doesn't flag the change [How] Add DSC flag update flag Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b5abe95 |
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09-Dec-2019 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: make PSR static screen entry within 30 ms [Why] With different refresh rate panels, the PSR entry/exit time is different since it is dependent on 2 frame entry time today [How] Make static screen num frame entry time to be calculated such that entry time is within 30 ms instead of fixed num frames. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6a652f6d |
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20-Nov-2019 |
Charlene Liu <charlene.liu@amd.com> |
drm/amd/display: Add warmup escape call support Add warmup escape support, for diags, in a way that is possible to choose a new or an existing sequence. For achieving this goal, this commit adds separated MCIF buffer as VCN request. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1da37801 |
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06-Nov-2019 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED [Why] DCN2 and DSC are stable enough to be build by default. So drop the flags. [How] Remove them using the unifdef tool. The following commands were executed in sequence: $ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' $ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' In addition: * Remove from kconfig, and replace any dependencies with DCN1_0. * Remove from any makefiles. * Fix and cleanup NV defninitions in dal_asic_id.h * Expand DCN1 ifdef to include DCN2 code in the following files: * clk_mgr/clk_mgr.c: dc_clk_mgr_create() * core/dc_resources.c: dc_create_resource_pool() * dce/dce_dmcu.c: dcn20_*lock_phy() * dce/dce_dmcu.c: dcn20_funcs * dce/dce_dmcu.c: dcn20_dmcu_create() * gpio/hw_factory.c: dal_hw_factory_init() * gpio/hw_translate.c: dal_hw_translate_init() Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
00ada9d1 |
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17-Oct-2019 |
Reza Amini <Reza.Amini@amd.com> |
drm/amd/display: Unify all scaling when Integer Scaling enabled [why] We want to guarantee integer ratio scaling for all scaling modes. [how] Treat centered, fullscreen, preserve aspect ratio the same: scale the view as many times as possible, and fill in the rest with a black border. Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5ed78cd6 |
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16-Oct-2019 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP [Why] It is confusing to sinks if we send VSC SDP only on some format. Today we signal colorimetry format using MSA while in formats like sRGB. But when we switch to BT2020 we set the bit to ignore MSA colorimetry and instead use the colorimetry information in the VSC SDP. But if sink supports signaling of colorimetry via VSC SDP we should always set the MSA MISC1 bit 6, instead of doing so selectively. [How] If sink supports signaling of colorimetry via VSC SDP, and we are sending the colorimetry info via VSC SDP with packet revision 05h, then always set MSA MISC1 bit 6. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
90d26874 |
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22-Aug-2019 |
Robin Singh <robin.singh@amd.com> |
drm/amd/display: Added pixel dynamic expansion control. [Why] To compare the crc of the framebuffer data at input of display pipeline with the crc of the otg, we need to disable pixel formatter's dynamic expansion feature during crc capture and keep it enable in the normal operation. [HOW] Expose a new interface in DM and dc for pixel formatter (fmt dynamic bitdepth expansion control). Interface control the FMT_DYNAMIC_EXP_EN bit, during crc capture keep it disabled. Signed-off-by: Robin Singh <robin.singh@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
11963006 |
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15-Aug-2019 |
Jun Lei <Jun.Lei@amd.com> |
drm/amd/display: remove hw access from dc_destroy [why] dc_destroy should only clean up SW, this is because GPUs may be removed before driver unload, leading to HW to be unavailable. [how] remove GPIO close as part of GPIO destroy, this is unnecessary because GPIO is not shared, and GPIOs are generally closed after being opened Add tracking to HW access during destructor to make future issues easier to pinpoint, and block access to prevent hangs. Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b6e881c9 |
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13-Sep-2019 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: update navi to use new surface programming behaviour New behaviour will track global updates and update any hw that isn't related to current stream being updated. This should fix any issues caused by pipe split pipes being taken by other streams. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5fdb7c4c |
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28-Jun-2019 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Expose audio inst from DC to DM [Why] In order to give pin notifications to the sound driver from DM we need to know whether audio is enabled on a stream and what pin it's using from DC. [How] Expose the instance via stream status if it's a mapped resource for the stream. It will be -1 if there's no audio mapped. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e34fe1bb |
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16-Apr-2019 |
Leo (Hanghong) Ma <hanghong.ma@amd.com> |
drm/amd/display: Expose send immediate sdp message interface [Why] To send sdp message immediately from a single slot. [How] Modify the generic SDP message interface, and use GSP4 to send immediate sdp message. Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
97bda032 |
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25-Feb-2019 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Add DSC support for Navi (v2) Add support for DCN2 DSC (Display Stream Compression) HW Blocks: +--------++------+ +----------+ | HUBBUB || HUBP | <-- | MMHUBBUB | +--------++------+ +----------+ | ^ v | +--------+ +--------+ | DPP | | DWB | +--------+ +--------+ | v ^ +--------+ | | MPC | | +--------+ | | | v | +-------+ +-------+ | | OPP | <--> | DSC | | +-------+ +-------+ | | | v | +--------+ / | OPTC | -------------- +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ v2: rebase (Alex) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6fbefb84 |
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22-Feb-2019 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Add DC core changes for DCN2 Core DC changes for DCN2. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e63e2491 |
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23-Apr-2019 |
Eryk Brol <eryk.brol@amd.com> |
drm/amd/display: Ensure DRR triggers in BP [Why] In the previous implementation DRR event sometimes came in during FP2 region which is a keep-out zone. This would cause the frame not to latch until the next frame which resulted in heavy flicker. To fix this we need to make sure that it triggers in the BP. [How] 1. Remove DRR programming during flip 2. Setup manual trigger for DRR event and trigger it after surface programming is complete Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43e3ac83 |
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29-Mar-2019 |
Wenjing Liu <Wenjing.Liu@amd.com> |
drm/amd/display: Add function to copy DC streams We'll need the ability to copy a dc_stream_state for some features. Implement it here. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d5f90f3a |
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07-Mar-2019 |
Leo (Hanghong) Ma <hanghong.ma@amd.com> |
drm/amd/display: Expose generic SDP message access interface [Why] We need to add DP SDP message test debugfs to make sdp message test more convenient and efficient. [How] Add a DM accessible SDP interface for custom data. Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d6001aed |
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25-Jan-2019 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Refactor for setup periodic interrupt. [Why] Current periodic interrupt start point calc in optc is not clear. [How] 1. DM convert delta time to lines number and dc will calculate the start position as per lines number and interrupt type. 2. hwss calculates the start point as per line offset. 3. optc programs vertical interrupts register as per start point and interrupt source. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d2d7885f |
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19-Jan-2019 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: add seamless boot flag to stream [Why] If we determine the stream we are trying to commit matches HW, we want to try to optimize. [How] Try to acquire the HW resources that are already enabled and optimize. Also skip backend reprogramming Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
810ece19 |
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24-Jan-2019 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Calc vline position in dc. We need to calcualte vline position in DC for DCN. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8dac4e7d |
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20-Jan-2019 |
Su Sung Chung <Su.Chung@amd.com> |
drm/amd/display: store timing sync info in dc_stream_status in program_timing_sync, after all the pipes are grouped, store timing sync info in dc_stream_status Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8fde60b7 |
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11-Jan-2019 |
Fatemeh Darbehani <fatemeh.darbehani@amd.com> |
drm/amd/display: Add Vline1 interrupt source to InterruptManager [Why] Enhanced sync need to use vertical_interrupt1. [How] Add vertical_interrupt1 source to irq manger, Implment setup vline interrupt interface. Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
35dad45d |
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20-Nov-2018 |
David Francis <David.Francis@amd.com> |
drm/amd/display: Detach backlight from stream [Why] Backlight is conceptually a property of links, not streams. All backlight programming is done on links, but there is a stream property bl_pwm_level that is used to restore backlight on dpms on and s3 resume. This is unnecessary, as backlight is already restored by hardware with no driver intervention. [How] Remove bl_pwm_level, and the stream argument to set_backlight Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109375 Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 923fe4951282cbdfce05186c10380bbc45b5e03b)
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#
cfdb60f7 |
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10-Dec-2018 |
David Francis <David.Francis@amd.com> |
drm/amd/display: Remove unused parameter plane_states [Why] The function dc_commit_updates_for_stream had a parameter called plane_states. It was never used. It was getting in the way of some cleanup work [How] Remove it Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
09f609c3 |
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27-Nov-2018 |
Leo Li <sunpeng.li@amd.com> |
drm/amd/display: Fix driver load crash in amdgpu_dm [Why] This fixes an regression introduced by: drm/amd/display: add stream ID and otg instance in dc_stream_state During driver initialization, a null pointer deref is raised. This is caused by searching for a stream status in the dc->current_state before the dc_state swap happens at the end of dc_commit_state_no_check(). Since the swap has not happened, the dc_state to be swapped in should be searched, and not dc->current_state. [How] Add a function that searches for the stream status within the given dc_state, instead of dc->current_state. Use that before the state swap happens in dc_commit_state_no_check(). Also remove duplicate occurrences of this function in amdgpu_dm.c. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c3f574ba |
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20-Nov-2018 |
Leo Li <sunpeng.li@amd.com> |
drm/amd/display: Remove stream_status->link [Why] It's not being used anywhere. [How] Remove it. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
04a789be |
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23-Nov-2018 |
Jun Lei <Jun.Lei@amd.com> |
drm/amd/display: add stream ID and otg instance in dc_stream_state [why] stream ID allows DMs to avoid memory address comparisons to compare stream equality. otg_instance allows DC to more rigorously define when otg_instance can change. specifically, it is now defined to be only mutable when dc_stream_state changes. This is better than a "get status" function which prevents efficient caching of otherwise very stable information. [how] stream ID follows similar pattern to sink ID, which is already implemented otg_instance is an output which occurs on all dc_stream modification functions Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
923fe495 |
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20-Nov-2018 |
David Francis <David.Francis@amd.com> |
drm/amd/display: Detach backlight from stream [Why] Backlight is conceptually a property of links, not streams. All backlight programming is done on links, but there is a stream property bl_pwm_level that is used to restore backlight on dpms on and s3 resume. This is unnecessary, as backlight is already restored by hardware with no driver intervention. [How] Remove bl_pwm_level, and the stream argument to set_backlight Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ceb3dbb4 |
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09-Nov-2018 |
Jun Lei <Jun.Lei@amd.com> |
drm/amd/display: remove sink reference in dc_stream_state [why] dc_stream_state containing a pointer to sink is poor design. Sink describes the display, and the specifications or capabilities it has. That information is irrelevant for dc_stream_state, which describes hardware state, and is generally used for hardware programming. It could further be argued that dc_sink itself is just a convenience dc provides, and DC should be perfectly capable of programming hardware without any dc_sinks (for example, emulated sinks). [how] Phase 1: Deprecate use of dc_sink pointer in dc_stream. Most references are trivial to remove, but some call sites are risky (such as is_timing_changed) with no obvious logical replacement. These will be removed in follow up change. Add dc_link pointer to dc_stream. This is the typical reason DC really needed sink pointer, and most call sites are replaced with this. DMs also need minor updates, as all 3 DMs leverage stream->sink for some functionality. this is replaced instead by a pointer to private data inside dc_stream_state, which is used by DMs as a quality of life improvment for some key functionality. it allows DMs to set pointers have to their own objects which associate OS objects to dc_stream_states (such as DisplayTarget and amdgpu_dm_connector). Without the private pointer, DMs would be forced to perform a lookup for callbacks. Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ccb596f |
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07-Nov-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Program dithering if requested Dithering needs to be enabled or disabled as requested. If dc_stream_update->dither_option is non-null, program the FMT blocks. Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ecd0136b |
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05-Nov-2018 |
Harmanprit Tatla <Harmanprit.Tatla@amd.com> |
drm/amd/display: Info frame cleanup * Use provided infopacket in stream (if valid) instead of reconstructing in set_vendor_info_packet() * Use proper format for enums * Use dc info packet struct instead Signed-off-by: Harmanprit Tatla <Harmanprit.Tatla@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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37cd85ce |
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16-Oct-2018 |
David Francis <David.Francis@amd.com> |
drm/amd/display: Remove dc_stream_state->status [Why] dc_state has an array of dc_stream_status that contain pointers to the dc_plane_state and other useful information Confusingly, dc_stream_state also contains a dc_stream_status called status. This struct was partially initialized and used in a few places [How] stream->status.link has been replaced with stream->sink->link. If a stream does not have a sink, or a sink does not have a link, something has gone seriously wrong All other properties of stream->status were zeroed by kzalloc and never initialized, so they have been replaced by the number 0 This is a refactor: no functional change is intended Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d82f9942 |
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21-Aug-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: move edp fast boot optimization flag to stream [Why] During S4/S3 stress test it is possible to resume from S4 without calling mode set on eDP, meaning high level optimization flag is not reset. If this is followed by an S3 resume call, driver will see optimization flag is set and consume it and think backend is powered on when in fact it is not. This results in PHY being off in sequence where S4->Resume->S3->Resume->ApplyOpt->black screen. [How] Move optimization flag to stream instead of a DC flag. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
eb385204 |
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26-Jul-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Program csc matrix as part of stream update Add csc_transform struct to dc_stream_update, and program if set when updating streams Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8ab56172 |
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26-Jul-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Program gamut remap as part of stream update Add gamut remap to dc_stream_update struct, and program if set when updating streams. Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0e4af5f3 |
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08-Jun-2018 |
Alvin lee <alvin.lee3@amd.com> |
drm/amd/display: Program vsc_infopacket in commit_planes_for_stream Signed-off-by: Alvin lee <alvin.lee3@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1336926f |
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04-Jun-2018 |
Alvin lee <alvin.lee3@amd.com> |
drm/amd/display: Enable Stereo in Dal3 - program infoframe for Stereo - program stereo flip control registers properly v2: Add missing license headers Signed-off-by: Alvin lee <alvin.lee3@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1e7e86c4 |
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01-May-2018 |
Samson Tam <Samson.Tam@amd.com> |
drm/amd/display: decouple front and backend pgm using dpms_off as backend enable flag Signed-off-by: Samson Tam <Samson.Tam@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
98e6436d |
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21-Aug-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: Refactor FreeSync module Remove dependency on internal sink map and instead use existing stream and plane state Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6d92b5c2 |
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27-Jun-2018 |
Krunoslav Kovac <Krunoslav.Kovac@amd.com> |
drm/amd/display: Refactor SDR cursor boosting in HDR mode [Why] Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP Previous commit was implementing it in HUBP functions, and also breaking diags tests. [How] 1. Undo original commit as well as Eric's diags test fix, almost completely 2. Move programming to DPP and call via new dc_stream function 3. Also removing cur_rom_en from dpp_cursor_attributes and programming as part of normal cursor attributes as it depends on cursor color format Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e1cb3e48 |
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19-Jun-2018 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Convert remaining loggers off dc_logger - Removed dal/dm/dc loggers from linux, switched to kernel prints - Modified functions that used these directly to use macros - dc_logger support is completely dropped from Linux Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2cbe6d9b |
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30-May-2018 |
Krunoslav Kovac <Krunoslav.Kovac@amd.com> |
drm/amd/display: Drop duplicate dc_stream_set_static_screen_events definition Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a10dc97a |
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17-May-2018 |
Krunoslav Kovac <Krunoslav.Kovac@amd.com> |
drm/amd/display: Add use_dynamic_meta flag to stream_state Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4ea20907 |
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08-May-2018 |
Krunoslav Kovac <Krunoslav.Kovac@amd.com> |
drm/amd/display: Dynamic HDR metadata mem buffer Basic framework: - caps for reporting dynamic HDR metadata support - allocation of frame buffer memory and storage Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f0c0761b |
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09-Apr-2018 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Use dig enable to determine fast boot optimization. Linux doesn't know lid state, better to check dig enable value from register. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
339cc82a |
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04-Apr-2018 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Check lid state to determine fast boot optimization. For legacy enable boot up with lid closed, eDP information couldn't be read correctly via SBIOS_SCRATCH_3 results in eDP cannot be light up properly when open lid. Check lid state instead can resolve the issue. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a2e8f540 |
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09-Apr-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: Refactor color module Remove some unnecessary TF definitions from update structures Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
586f27a3 |
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26-Mar-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: csc_transform to dc_csc_transform Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0eeef690 |
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09-Apr-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: Updated HDR Static Metadata to directly take info packet raw Updated HDR Static Metadata to directly take info packet raw Updating Infopacket does not require Passive Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
44d09c6a |
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15-Mar-2018 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Move commit_planes_to_stream to amdgpu_dm Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e5b3587 |
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14-Mar-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Add vline IRQ programming for DCN Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6133470c |
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13-Mar-2018 |
Julian Parkin <jparkin@amd.com> |
drm/amd/display: drop dc_validate_guaranteed Block FP16 scaling in validate_resources codepath. Signed-off-by: Julian Parkin <jparkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
14d6f644 |
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05-Mar-2018 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Fixed dim around 1sec when resume from S3 (v2) root cause: DMCU try to perform a smoothness brightness change.Incorrect initial brightness level causes the 1 sec dim. Change: Cache brightness level in stream, and clear it when edp backlight on. If brightness level in stream is 0, set brightness with ramp value is 0. DMCU will set the brightness without smoothness transition. v2: squash in null pointer fix (Harry) Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
64ed6a2e |
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28-Feb-2018 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: Add variable refresh rate parameters to DC structures Time stamping will be part of surface, and will be updated when address is flipped. FreeSync parameters will be attached to stream, as it adjusts the timing dynamically. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9aef1a31 |
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23-Feb-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Varibright fix bug and review comments Fix bug and make changes from review 132656 Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aa5a5777 |
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13-Feb-2018 |
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> |
drm/amd/display: Vari-bright looks disabled near end of MM14 Avoid hanging DMCU by setting abm level only when OTG unblanked Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3549130e |
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17-Dec-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Call update_stream_signal directly from amdgpu_dm There's no good place in DC to cover all place where stream signal should be updated. update_stream_signal depends on timing which comes from DM. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
85075fa0 |
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16-Feb-2018 |
Xingyue Tao <xingyue.tao@amd.com> |
drm/amd/display: add psr_version to stream Brightness could not be changed for some panels whose DPCD_version is below 1.2 Now psr_version is added into stream, and it copies from the displayTarget's psr_version. It checks if the stream's psr_versio is non-zero and sets the vsc info packet revision now. Signed-off-by: Xingyue Tao <xingyue.tao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
44af70a7 |
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06-Feb-2018 |
Leo (Sunpeng) Li <sunpeng.li@amd.com> |
drm/amd/display: Expose dither setting functionality to Linux We will need this to disable dither for CRC capture. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9182b4cb |
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17-Dec-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Call update_stream_signal directly from amdgpu_dm There's no good place in DC to cover all place where stream signal should be updated. update_stream_signal depends on timing which comes from DM. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ff1374c9 |
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03-Jan-2018 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Move output_tf to stream_state/update Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
aa8e286a |
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19-Jan-2018 |
Samuel Li <Samuel.Li@amd.com> |
drm/amdgpu: rename amdgpu_get_crtc_scanoutpos Add display to the name for consistency. Signed-off-by: Samuel Li <Samuel.Li@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
31aec354 |
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18-Dec-2017 |
Leo (Sunpeng) Li <sunpeng.li@amd.com> |
drm/amd/display: Implement interface for CRC on CRTC Add interfaces in DC for per CRTC CRC configuration and fetching. Also implement amdgpu_dm functions to hook onto DRM. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
ea783c31 |
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21-Nov-2017 |
Yongqiang Sun <yongqiang.sun@amd.com> |
drm/amd/display: Cache cursor position. When programming cursor position after front end programmed, if position is already set previously, it doesn't make sense to program position with all 0. Cache position and use the parameter after front end programming. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
27b3f4fc |
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10-Nov-2017 |
Leo (Sunpeng) Li <sunpeng.li@amd.com> |
drm/amd/display: Do not program front-end twice The sequence of front-end > back-end > front-end programming will program the front-end more than once. Add a mode_changed flag, and use it to determine whether the front-end should be programmed before, or after back-end. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2a06e0a5 |
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01-Nov-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Remove unnecessary dc_stream vtable There's no need to have this as a vtable. The vtable was initially used for stream_adjust_vmin_vmax but the condition checked here (set_drr) is always true, hence we don't need to assign this dynamically anymore. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7c0c9672 |
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08-Nov-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Move dc_stream interface to separate header Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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