Searched refs:adev (Results 101 - 125 of 325) sorted by relevance

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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A D	amdgpu_sdma_v5_0.c	66 static void sdma_v5_0_set_ring_funcs(struct amdgpu_device *adev); 67 static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev); 68 static void sdma_v5_0_set_vm_pte_funcs(struct amdgpu_device *adev); 69 static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev); 113 static u32 sdma_v5_0_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) argument 119 base = adev->reg_offset[GC_HWIP][0][1]; 123 base = adev->reg_offset[GC_HWIP][0][0]; 131 static void sdma_v5_0_init_golden_registers(struct amdgpu_device *adev) argument 133 switch (adev->asic_type) { 135 soc15_program_register_sequence(adev, 175 sdma_v5_0_init_microcode(struct amdgpu_device *adev) argument 295 struct amdgpu_device *adev = ring->adev; local 331 struct amdgpu_device *adev = ring->adev; local 421 struct amdgpu_device *adev = ring->adev; local 454 struct amdgpu_device *adev = ring->adev; local 493 sdma_v5_0_gfx_stop(struct amdgpu_device *adev) argument 524 sdma_v5_0_rlc_stop(struct amdgpu_device *adev) argument 537 sdma_v5_0_ctx_switch_enable(struct amdgpu_device *adev, bool enable) argument 591 sdma_v5_0_enable(struct amdgpu_device *adev, bool enable) argument 616 sdma_v5_0_gfx_resume(struct amdgpu_device *adev) argument 777 sdma_v5_0_rlc_resume(struct amdgpu_device *adev) argument 790 sdma_v5_0_load_microcode(struct amdgpu_device *adev) argument 834 sdma_v5_0_start(struct amdgpu_device *adev) argument 882 struct amdgpu_device *adev = ring->adev; local 942 struct amdgpu_device *adev = ring->adev; local 1192 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1209 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1258 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1270 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1281 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1294 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1301 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1308 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1325 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1348 struct amdgpu_device *adev = ring->adev; local 1392 sdma_v5_0_set_trap_irq_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 1411 sdma_v5_0_process_trap_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1453 sdma_v5_0_process_illegal_inst_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1460 sdma_v5_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 1497 sdma_v5_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) argument 1525 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1554 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1625 sdma_v5_0_set_ring_funcs(struct amdgpu_device *adev) argument 1644 sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev) argument 1711 sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev) argument 1726 sdma_v5_0_set_vm_pte_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_vcn_v2_5.c	60 static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev); 61 static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev); 62 static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev); 65 static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev, 67 static int vcn_v2_5_sriov_start(struct amdgpu_device *adev); 83 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 84 if (adev->asic_type == CHIP_ARCTURUS) { 88 adev->vcn.num_vcn_inst = VCN25_MAX_HW_INSTANCES_ARCTURUS; 89 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { 92 adev 128 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 240 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 263 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 316 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 351 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 372 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 390 vcn_v2_5_mc_resume(struct amdgpu_device *adev) argument 436 vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument 536 vcn_v2_5_disable_clock_gating(struct amdgpu_device *adev) argument 647 vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument 702 vcn_v2_5_enable_clock_gating(struct amdgpu_device *adev) argument 757 vcn_v2_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument 889 vcn_v2_5_start(struct amdgpu_device *adev) argument 1074 vcn_v2_5_mmsch_start(struct amdgpu_device *adev, struct amdgpu_mm_table *table) argument 1130 vcn_v2_5_sriov_start(struct amdgpu_device *adev) argument 1272 vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument 1301 vcn_v2_5_stop(struct amdgpu_device *adev) argument 1369 vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument 1439 struct amdgpu_device *adev = ring->adev; local 1453 struct amdgpu_device *adev = ring->adev; local 1470 struct amdgpu_device *adev = ring->adev; local 1523 struct amdgpu_device *adev = ring->adev; local 1540 struct amdgpu_device *adev = ring->adev; local 1564 struct amdgpu_device *adev = ring->adev; local 1613 vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev) argument 1626 vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev) argument 1643 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1657 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1675 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1695 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1715 vcn_v2_5_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 1723 vcn_v2_5_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1767 vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_gfx_v8_0.c	731 static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev); 732 static void gfx_v8_0_set_irq_funcs(struct amdgpu_device *adev); 733 static void gfx_v8_0_set_gds_init(struct amdgpu_device *adev); 734 static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev); 735 static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev); 736 static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev); 740 static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev) argument 742 switch (adev->asic_type) { 744 amdgpu_device_program_register_sequence(adev, 747 amdgpu_device_program_register_sequence(adev, 837 gfx_v8_0_scratch_init(struct amdgpu_device *adev) argument 846 struct amdgpu_device *adev = ring->adev; local 883 struct amdgpu_device *adev = ring->adev; local 937 gfx_v8_0_free_microcode(struct amdgpu_device *adev) argument 957 gfx_v8_0_init_microcode(struct amdgpu_device *adev) argument 1250 gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev, volatile u32 *buffer) argument 1297 gfx_v8_0_cp_jump_table_num(struct amdgpu_device *adev) argument 1305 gfx_v8_0_rlc_init(struct amdgpu_device *adev) argument 1332 gfx_v8_0_mec_fini(struct amdgpu_device *adev) argument 1337 gfx_v8_0_mec_init(struct amdgpu_device *adev) argument 1522 gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev) argument 1685 gfx_v8_0_gpu_early_init(struct amdgpu_device *adev) argument 1888 gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, int mec, int pipe, int queue) argument 1930 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 2071 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 2099 gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) argument 3422 gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) argument 3445 gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm) argument 3451 gfx_v8_0_get_rb_active_bitmap(struct amdgpu_device *adev) argument 3467 gfx_v8_0_raster_config(struct amdgpu_device *adev, u32 *rconf, u32 *rconf1) argument 3508 gfx_v8_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, u32 raster_config_1, unsigned rb_mask, unsigned num_rb) argument 3616 gfx_v8_0_setup_rb(struct amdgpu_device *adev) argument 3684 gfx_v8_0_init_compute_vmid(struct amdgpu_device *adev) argument 3727 gfx_v8_0_init_gds_vmid(struct amdgpu_device *adev) argument 3745 gfx_v8_0_config_init(struct amdgpu_device *adev) argument 3758 gfx_v8_0_constants_init(struct amdgpu_device *adev) argument 3841 gfx_v8_0_wait_for_rlc_serdes(struct amdgpu_device *adev) argument 3879 gfx_v8_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, bool enable) argument 3892 gfx_v8_0_init_csb(struct amdgpu_device *adev) argument 3954 gfx_v8_0_init_save_restore_list(struct amdgpu_device *adev) argument 4017 gfx_v8_0_enable_save_restore_machine(struct amdgpu_device *adev) argument 4022 gfx_v8_0_init_power_gating(struct amdgpu_device *adev) argument 4039 cz_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev, bool enable) argument 4045 cz_enable_sck_slow_down_on_power_down(struct amdgpu_device *adev, bool enable) argument 4051 cz_enable_cp_power_gating(struct amdgpu_device *adev, bool enable) argument 4056 gfx_v8_0_init_pg(struct amdgpu_device *adev) argument 4077 gfx_v8_0_rlc_stop(struct amdgpu_device *adev) argument 4085 gfx_v8_0_rlc_reset(struct amdgpu_device *adev) argument 4094 gfx_v8_0_rlc_start(struct amdgpu_device *adev) argument 4105 gfx_v8_0_rlc_resume(struct amdgpu_device *adev) argument 4120 gfx_v8_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) argument 4140 gfx_v8_0_get_csb_size(struct amdgpu_device *adev) argument 4169 gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev) argument 4232 gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu_ring *ring) argument 4266 gfx_v8_0_cp_gfx_resume(struct amdgpu_device *adev) argument 4320 gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) argument 4339 struct amdgpu_device *adev = ring->adev; local 4350 gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev) argument 4411 gfx_v8_0_deactivate_hqd(struct amdgpu_device *adev, u32 req) argument 4434 struct amdgpu_device *adev = ring->adev; local 4578 gfx_v8_0_mqd_commit(struct amdgpu_device *adev, struct vi_mqd *mqd) argument 4617 struct amdgpu_device *adev = ring->adev; local 4656 struct amdgpu_device *adev = ring->adev; local 4685 gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev) argument 4695 gfx_v8_0_kiq_resume(struct amdgpu_device *adev) argument 4718 gfx_v8_0_kcq_resume(struct amdgpu_device *adev) argument 4752 gfx_v8_0_cp_test_all_rings(struct amdgpu_device *adev) argument 4776 gfx_v8_0_cp_resume(struct amdgpu_device *adev) argument 4804 gfx_v8_0_cp_enable(struct amdgpu_device *adev, bool enable) argument 4813 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4827 gfx_v8_0_kcq_disable(struct amdgpu_device *adev) argument 4859 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4870 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4881 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4895 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4908 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4950 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5012 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5053 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5115 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5162 gfx_v8_0_get_gpu_clock_counter(struct amdgpu_device *adev) argument 5213 wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) argument 5223 wave_read_regs(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t thread, uint32_t regno, uint32_t num, uint32_t *out) argument 5238 gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) argument 5262 gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t start, uint32_t size, uint32_t *dst) argument 5282 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5297 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5330 gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 5343 gfx_v8_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 5349 polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 5355 cz_enable_gfx_cg_power_gating(struct amdgpu_device *adev, bool enable) argument 5361 cz_enable_gfx_pipeline_power_gating(struct amdgpu_device *adev, bool enable) argument 5371 cz_update_gfx_cg_power_gating(struct amdgpu_device *adev, bool enable) argument 5387 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5457 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 5497 gfx_v8_0_send_serdes_cmd(struct amdgpu_device *adev, uint32_t reg_addr, uint32_t cmd) argument 5545 gfx_v8_0_is_rlc_enabled(struct amdgpu_device *adev) argument 5556 gfx_v8_0_set_safe_mode(struct amdgpu_device *adev) argument 5583 gfx_v8_0_unset_safe_mode(struct amdgpu_device *adev) argument 5614 gfx_v8_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 5718 gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 5810 gfx_v8_0_update_gfx_clock_gating(struct amdgpu_device *adev, bool enable) argument 5829 gfx_v8_0_tonga_update_gfx_clock_gating(struct amdgpu_device *adev, enum amd_clockgating_state state) argument 5880 gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev, enum amd_clockgating_state state) argument 5986 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 6020 struct amdgpu_device *adev = ring->adev; local 6031 struct amdgpu_device *adev = ring->adev; local 6240 struct amdgpu_device *adev = ring->adev; local 6250 struct amdgpu_device *adev = ring->adev; local 6266 gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev, struct amdgpu_ring *ring, bool acquire) argument 6316 gfx_v8_0_hqd_set_priority(struct amdgpu_device *adev, struct amdgpu_ring *ring, bool acquire) argument 6335 struct amdgpu_device *adev = ring->adev; local 6459 struct amdgpu_device *adev = ring->adev; local 6500 struct amdgpu_device *adev = ring->adev; local 6510 gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, enum amdgpu_interrupt_state state) argument 6517 gfx_v8_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, int me, int pipe, enum amdgpu_interrupt_state state) argument 6568 gfx_v8_0_set_priv_reg_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 6579 gfx_v8_0_set_priv_inst_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 6590 gfx_v8_0_set_eop_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) argument 6629 gfx_v8_0_set_cp_ecc_int_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned int type, enum amdgpu_interrupt_state state) argument 6674 gfx_v8_0_set_sq_int_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned int type, enum amdgpu_interrupt_state state) argument 6700 gfx_v8_0_eop_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 6732 gfx_v8_0_fault(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry) argument 6759 gfx_v8_0_priv_reg_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 6768 gfx_v8_0_priv_inst_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 6777 gfx_v8_0_cp_ecc_error_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 6785 gfx_v8_0_parse_sq_irq(struct amdgpu_device *adev, unsigned ih_data) argument 6858 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, gfx.sq_work.work); local 6864 gfx_v8_0_sq_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 7005 gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev) argument 7043 gfx_v8_0_set_irq_funcs(struct amdgpu_device *adev) argument 7061 gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev) argument 7066 gfx_v8_0_set_gds_init(struct amdgpu_device *adev) argument 7075 gfx_v8_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, u32 bitmap) argument 7089 gfx_v8_0_get_cu_active_bitmap(struct amdgpu_device *adev) argument 7101 gfx_v8_0_get_cu_info(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_kms.c	53 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) argument 62 if (gpu_instance->adev == adev) { 66 if (adev->flags & AMD_IS_APU) 87 struct amdgpu_device *adev = dev->dev_private; local 89 if (adev == NULL) 92 amdgpu_unregister_gpu_instance(adev); 94 if (adev->rmmio_size == 0) 97 if (amdgpu_sriov_vf(adev)) 98 amdgpu_virt_request_full_gpu(adev, fals 114 amdgpu_register_gpu_instance(struct amdgpu_device *adev) argument 150 struct amdgpu_device *adev; local 216 amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info, struct drm_amdgpu_query_fw *query_fw, struct amdgpu_device *adev) argument 318 amdgpu_hw_ip_info(struct amdgpu_device *adev, struct drm_amdgpu_info *info, struct drm_amdgpu_info_hw_ip *result) argument 469 struct amdgpu_device *adev = dev->dev_private; local 981 struct amdgpu_device *adev = dev->dev_private; local 1065 struct amdgpu_device *adev = dev->dev_private; local 1129 struct amdgpu_device *adev = dev->dev_private; local 1196 struct amdgpu_device *adev = dev->dev_private; local 1212 struct amdgpu_device *adev = dev->dev_private; local 1248 struct amdgpu_device *adev = dev->dev_private; local 1435 amdgpu_debugfs_firmware_init(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_virt.h	57 int (*req_full_gpu)(struct amdgpu_device *adev, bool init); 58 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init); 59 int (*reset_gpu)(struct amdgpu_device *adev); 60 int (*wait_reset)(struct amdgpu_device *adev); 61 void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3); 223 #define AMDGPU_FW_VRAM_VF2PF_WRITE(adev, field, val) \ 225 ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field = (val); \ 228 #define AMDGPU_FW_VRAM_VF2PF_READ(adev, field, val) \ 230 (*val) = ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field; \ 233 #define AMDGPU_FW_VRAM_PF2VF_READ(adev, fiel [all...]
H A D	amdgpu_iceland_ih.c	56 static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev); 61 * @adev: amdgpu_device pointer 65 static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) argument 74 adev->irq.ih.enabled = true; 80 * @adev: amdgpu_device pointer 84 static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) argument 96 adev->irq.ih.enabled = false; 97 adev->irq.ih.rptr = 0; 103 * @adev: amdgpu_device pointer 111 static int iceland_ih_irq_init(struct amdgpu_device *adev) argument 175 iceland_ih_irq_disable(struct amdgpu_device *adev) argument 194 iceland_ih_get_wptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) argument 225 iceland_ih_decode_iv(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, struct amdgpu_iv_entry *entry) argument 256 iceland_ih_set_rptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) argument 264 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 279 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 292 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 304 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 315 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 324 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 331 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 338 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 351 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 366 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 428 iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_cz_ih.c	56 static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev); 61 * @adev: amdgpu_device pointer 65 static void cz_ih_enable_interrupts(struct amdgpu_device *adev) argument 74 adev->irq.ih.enabled = true; 80 * @adev: amdgpu_device pointer 84 static void cz_ih_disable_interrupts(struct amdgpu_device *adev) argument 96 adev->irq.ih.enabled = false; 97 adev->irq.ih.rptr = 0; 103 * @adev: amdgpu_device pointer 111 static int cz_ih_irq_init(struct amdgpu_device *adev) argument 175 cz_ih_irq_disable(struct amdgpu_device *adev) argument 194 cz_ih_get_wptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) argument 225 cz_ih_decode_iv(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, struct amdgpu_iv_entry *entry) argument 256 cz_ih_set_rptr(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) argument 264 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 279 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 292 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 304 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 315 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 324 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 331 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 338 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 351 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 366 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 430 cz_ih_set_interrupt_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_gfx_v9_0.c	736 static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev); 737 static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev); 738 static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev); 739 static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev); 740 static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, 742 static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev); 743 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance); 746 static int gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev, 748 static void gfx_v9_0_clear_ras_edc_counter(struct amdgpu_device *adev); 749 static int gfx_v9_0_ras_error_inject(struct amdgpu_device *adev, 773 struct amdgpu_device *adev = kiq_ring->adev; local 875 gfx_v9_0_set_kiq_pm4_funcs(struct amdgpu_device *adev) argument 880 gfx_v9_0_init_golden_registers(struct amdgpu_device *adev) argument 938 gfx_v9_0_scratch_init(struct amdgpu_device *adev) argument 981 struct amdgpu_device *adev = ring->adev; local 1018 struct amdgpu_device *adev = ring->adev; local 1072 gfx_v9_0_free_microcode(struct amdgpu_device *adev) argument 1090 gfx_v9_0_init_rlc_ext_microcode(struct amdgpu_device *adev) argument 1111 gfx_v9_0_check_fw_write_wait(struct amdgpu_device *adev) argument 1203 is_raven_kicker(struct amdgpu_device *adev) argument 1211 gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev) argument 1245 gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, const char *chip_name) argument 1325 gfx_v9_0_init_rlc_microcode(struct amdgpu_device *adev, const char *chip_name) argument 1456 gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, const char *chip_name) argument 1547 gfx_v9_0_init_microcode(struct amdgpu_device *adev) argument 1600 gfx_v9_0_get_csb_size(struct amdgpu_device *adev) argument 1628 gfx_v9_0_get_csb_buffer(struct amdgpu_device *adev, volatile u32 *buffer) argument 1669 gfx_v9_0_init_always_on_cu_mask(struct amdgpu_device *adev) argument 1713 gfx_v9_0_init_lbpw(struct amdgpu_device *adev) argument 1762 gfx_v9_4_init_lbpw(struct amdgpu_device *adev) argument 1811 gfx_v9_0_enable_lbpw(struct amdgpu_device *adev, bool enable) argument 1816 gfx_v9_0_cp_jump_table_num(struct amdgpu_device *adev) argument 1821 gfx_v9_0_rlc_init(struct amdgpu_device *adev) argument 1859 gfx_v9_0_mec_fini(struct amdgpu_device *adev) argument 1865 gfx_v9_0_mec_init(struct amdgpu_device *adev) argument 1924 wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) argument 1934 wave_read_regs(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t thread, uint32_t regno, uint32_t num, uint32_t *out) argument 1949 gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) argument 1969 gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t start, uint32_t size, uint32_t *dst) argument 1978 gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t thread, uint32_t start, uint32_t size, uint32_t *dst) argument 1988 gfx_v9_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm) argument 2016 gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) argument 2132 gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, int mec, int pipe, int queue) argument 2172 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 2306 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 2332 gfx_v9_0_tiling_mode_table_init(struct amdgpu_device *adev) argument 2337 gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) argument 2359 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev) argument 2375 gfx_v9_0_setup_rb(struct amdgpu_device *adev) argument 2402 gfx_v9_0_init_compute_vmid(struct amdgpu_device *adev) argument 2440 gfx_v9_0_init_gds_vmid(struct amdgpu_device *adev) argument 2458 gfx_v9_0_init_sq_config(struct amdgpu_device *adev) argument 2474 gfx_v9_0_constants_init(struct amdgpu_device *adev) argument 2522 gfx_v9_0_wait_for_rlc_serdes(struct amdgpu_device *adev) argument 2560 gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, bool enable) argument 2573 gfx_v9_0_init_csb(struct amdgpu_device *adev) argument 2622 gfx_v9_1_init_rlc_save_restore_list(struct amdgpu_device *adev) argument 2725 gfx_v9_0_enable_save_restore_machine(struct amdgpu_device *adev) argument 2730 pwr_10_0_gfxip_control_over_cgpg(struct amdgpu_device *adev, bool enable) argument 2756 gfx_v9_0_init_gfx_power_gating(struct amdgpu_device *adev) argument 2798 gfx_v9_0_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev, bool enable) argument 2812 gfx_v9_0_enable_sck_slow_down_on_power_down(struct amdgpu_device *adev, bool enable) argument 2826 gfx_v9_0_enable_cp_power_gating(struct amdgpu_device *adev, bool enable) argument 2840 gfx_v9_0_enable_gfx_cg_power_gating(struct amdgpu_device *adev, bool enable) argument 2853 gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev, bool enable) argument 2870 gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 2883 gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 2896 gfx_v9_0_init_pg(struct amdgpu_device *adev) argument 2924 gfx_v9_0_rlc_stop(struct amdgpu_device *adev) argument 2931 gfx_v9_0_rlc_reset(struct amdgpu_device *adev) argument 2939 gfx_v9_0_rlc_start(struct amdgpu_device *adev) argument 2971 gfx_v9_0_rlc_load_microcode(struct amdgpu_device *adev) argument 2996 gfx_v9_0_rlc_resume(struct amdgpu_device *adev) argument 3041 gfx_v9_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) argument 3057 gfx_v9_0_cp_gfx_load_microcode(struct amdgpu_device *adev) argument 3114 gfx_v9_0_cp_gfx_start(struct amdgpu_device *adev) argument 3176 gfx_v9_0_cp_gfx_resume(struct amdgpu_device *adev) argument 3246 gfx_v9_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) argument 3262 gfx_v9_0_cp_compute_load_microcode(struct amdgpu_device *adev) argument 3308 struct amdgpu_device *adev = ring->adev; local 3321 struct amdgpu_device *adev = ring->adev; local 3466 struct amdgpu_device *adev = ring->adev; local 3571 struct amdgpu_device *adev = ring->adev; local 3610 struct amdgpu_device *adev = ring->adev; local 3650 struct amdgpu_device *adev = ring->adev; local 3681 gfx_v9_0_kiq_resume(struct amdgpu_device *adev) argument 3704 gfx_v9_0_kcq_resume(struct amdgpu_device *adev) argument 3733 gfx_v9_0_cp_resume(struct amdgpu_device *adev) argument 3785 gfx_v9_0_init_tcp_config(struct amdgpu_device *adev) argument 3802 gfx_v9_0_cp_enable(struct amdgpu_device *adev, bool enable) argument 3812 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 3834 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 3887 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 3899 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 3913 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 3972 gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) argument 4005 struct amdgpu_device *adev = ring->adev; local 4153 gfx_v9_0_do_edc_gds_workarounds(struct amdgpu_device *adev) argument 4200 gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev) argument 4372 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4390 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4419 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4437 gfx_v9_0_is_rlc_enabled(struct amdgpu_device *adev) argument 4449 gfx_v9_0_set_safe_mode(struct amdgpu_device *adev) argument 4466 gfx_v9_0_unset_safe_mode(struct amdgpu_device *adev) argument 4474 gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev, bool enable) argument 4492 gfx_v9_0_update_gfx_mg_power_gating(struct amdgpu_device *adev, bool enable) argument 4511 gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 4586 gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, bool enable) argument 4637 gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 4689 gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device *adev, bool enable) argument 4731 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4781 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4804 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 4853 struct amdgpu_device *adev = ring->adev; local 4869 struct amdgpu_device *adev = ring->adev; local 4883 struct amdgpu_device *adev = ring->adev; local 5056 struct amdgpu_device *adev = ring->adev; local 5072 gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev, struct amdgpu_ring *ring, bool acquire) argument 5122 gfx_v9_0_hqd_set_priority(struct amdgpu_device *adev, struct amdgpu_ring *ring, bool acquire) argument 5142 struct amdgpu_device *adev = ring->adev; local 5154 struct amdgpu_device *adev = ring->adev; local 5168 struct amdgpu_device *adev = ring->adev; local 5306 struct amdgpu_device *adev = ring->adev; local 5355 struct amdgpu_device *adev = ring->adev; local 5369 struct amdgpu_device *adev = ring->adev; local 5379 gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, enum amdgpu_interrupt_state state) argument 5394 gfx_v9_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, int me, int pipe, enum amdgpu_interrupt_state state) argument 5447 gfx_v9_0_set_priv_reg_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 5466 gfx_v9_0_set_priv_inst_fault_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 5492 gfx_v9_0_set_cp_ecc_error_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 5523 gfx_v9_0_set_eop_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) argument 5562 gfx_v9_0_eop_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 5594 gfx_v9_0_fault(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry) argument 5621 gfx_v9_0_priv_reg_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 5630 gfx_v9_0_priv_inst_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 6081 gfx_v9_0_ras_error_inject(struct amdgpu_device *adev, void *inject_if) argument 6198 gfx_v9_0_query_utc_edc_status(struct amdgpu_device *adev, struct ras_err_data *err_data) argument 6331 gfx_v9_0_clear_ras_edc_counter(struct amdgpu_device *adev) argument 6383 gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) argument 6557 gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev) argument 6591 gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev) argument 6606 gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev) argument 6622 gfx_v9_0_set_gds_init(struct amdgpu_device *adev) argument 6667 gfx_v9_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, u32 bitmap) argument 6681 gfx_v9_0_get_cu_active_bitmap(struct amdgpu_device *adev) argument 6696 gfx_v9_0_get_cu_info(struct amdgpu_device *adev, struct amdgpu_cu_info *cu_info) argument [all...]
H A D	amdgpu_sdma_v2_4.c	58 static void sdma_v2_4_set_ring_funcs(struct amdgpu_device *adev); 59 static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev); 60 static void sdma_v2_4_set_vm_pte_funcs(struct amdgpu_device *adev); 61 static void sdma_v2_4_set_irq_funcs(struct amdgpu_device *adev); 103 static void sdma_v2_4_init_golden_registers(struct amdgpu_device *adev) argument 105 switch (adev->asic_type) { 107 amdgpu_device_program_register_sequence(adev, 110 amdgpu_device_program_register_sequence(adev, 119 static void sdma_v2_4_free_microcode(struct amdgpu_device *adev) argument 122 for (i = 0; i < adev 137 sdma_v2_4_init_microcode(struct amdgpu_device *adev) argument 215 struct amdgpu_device *adev = ring->adev; local 230 struct amdgpu_device *adev = ring->adev; local 345 sdma_v2_4_gfx_stop(struct amdgpu_device *adev) argument 375 sdma_v2_4_rlc_stop(struct amdgpu_device *adev) argument 388 sdma_v2_4_enable(struct amdgpu_device *adev, bool enable) argument 416 sdma_v2_4_gfx_resume(struct amdgpu_device *adev) argument 511 sdma_v2_4_rlc_resume(struct amdgpu_device *adev) argument 526 sdma_v2_4_start(struct amdgpu_device *adev) argument 555 struct amdgpu_device *adev = ring->adev; local 607 struct amdgpu_device *adev = ring->adev; local 832 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 848 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 893 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 906 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 919 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 928 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 935 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 942 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 956 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 972 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1010 sdma_v2_4_set_trap_irq_state(struct amdgpu_device *adev, struct amdgpu_irq_src *src, unsigned type, enum amdgpu_interrupt_state state) argument 1056 sdma_v2_4_process_trap_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1096 sdma_v2_4_process_illegal_inst_irq(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1168 sdma_v2_4_set_ring_funcs(struct amdgpu_device *adev) argument 1187 sdma_v2_4_set_irq_funcs(struct amdgpu_device *adev) argument 1253 sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev) argument 1267 sdma_v2_4_set_vm_pte_funcs(struct amdgpu_device *adev) argument [all...]
H A D	jpeg_v1_0.h	32 void jpeg_v1_0_start(struct amdgpu_device *adev, int mode);
H A D	gfx_v8_0.h	35 int gfx_v8_0_mqd_commit(struct amdgpu_device *adev, struct vi_mqd *mqd);
H A D	mxgpu_ai.h	56 void xgpu_ai_mailbox_set_irq_funcs(struct amdgpu_device *adev); 57 int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev); 58 int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev); 59 void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev);
H A D	amdgpu_nbio_v7_0.c	41 static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev) argument 44 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); 46 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); 49 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) argument 59 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) argument 68 static void nbio_v7_0_hdp_flush(struct amdgpu_device *adev, argument 72 WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); 74 amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); 77 static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev) argument 82 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, in argument 99 nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index, int instance) argument 119 nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, bool enable) argument 125 nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, bool enable) argument 131 nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, int doorbell_index) argument 145 nbio_7_0_read_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset) argument 155 nbio_7_0_write_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset, uint32_t data) argument 162 nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable) argument 201 nbio_v7_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable) argument 221 nbio_v7_0_get_clockgating_state(struct amdgpu_device *adev, u32 *flags) argument 237 nbio_v7_0_ih_control(struct amdgpu_device *adev) argument 253 nbio_v7_0_get_hdp_flush_req_offset(struct amdgpu_device *adev) argument 258 nbio_v7_0_get_hdp_flush_done_offset(struct amdgpu_device *adev) argument 263 nbio_v7_0_get_pcie_index_offset(struct amdgpu_device *adev) argument 268 nbio_v7_0_get_pcie_data_offset(struct amdgpu_device *adev) argument 288 nbio_v7_0_detect_hw_virt(struct amdgpu_device *adev) argument 294 nbio_v7_0_init_registers(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_uvd.h	38 #define AMDGPU_UVD_FIRMWARE_SIZE(adev) \ 39 (AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(((const struct common_firmware_header *)(adev)->uvd.fw->data)->ucode_size_bytes) + \ 74 int amdgpu_uvd_sw_init(struct amdgpu_device *adev); 75 int amdgpu_uvd_sw_fini(struct amdgpu_device *adev); 76 int amdgpu_uvd_entity_init(struct amdgpu_device *adev); 77 int amdgpu_uvd_suspend(struct amdgpu_device *adev); 78 int amdgpu_uvd_resume(struct amdgpu_device *adev); 83 void amdgpu_uvd_free_handles(struct amdgpu_device *adev, 89 uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev);
H A D	amdgpu_vce_v3_0.c	69 static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx); 70 static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev); 71 static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev); 84 struct amdgpu_device *adev = ring->adev; local 87 mutex_lock(&adev->grbm_idx_mutex); 88 if (adev->vce.harvest_config == 0 || 89 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) 91 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) 102 mutex_unlock(&adev 116 struct amdgpu_device *adev = ring->adev; local 148 struct amdgpu_device *adev = ring->adev; local 168 vce_v3_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override) argument 173 vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev, bool gated) argument 240 vce_v3_0_firmware_loaded(struct amdgpu_device *adev) argument 270 vce_v3_0_start(struct amdgpu_device *adev) argument 336 vce_v3_0_stop(struct amdgpu_device *adev) argument 369 vce_v3_0_get_harvest_config(struct amdgpu_device *adev) argument 406 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 425 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 463 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 475 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 495 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 508 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 520 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 529 vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx) argument 582 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 594 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 611 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 652 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 683 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 696 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 706 vce_v3_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 720 vce_v3_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 746 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 794 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 813 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 948 vce_v3_0_set_ring_funcs(struct amdgpu_device *adev) argument 972 vce_v3_0_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_dce_virtual.c	51 static void dce_virtual_set_display_funcs(struct amdgpu_device *adev); 52 static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev); 53 static int dce_virtual_connector_encoder_init(struct amdgpu_device *adev, 55 static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, 59 static u32 dce_virtual_vblank_get_counter(struct amdgpu_device *adev, int crtc) argument 64 static void dce_virtual_page_flip(struct amdgpu_device *adev, argument 70 static int dce_virtual_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, argument 79 static bool dce_virtual_hpd_sense(struct amdgpu_device *adev, argument 85 static void dce_virtual_hpd_set_polarity(struct amdgpu_device *adev, argument 91 static u32 dce_virtual_hpd_get_gpio_reg(struct amdgpu_device *adev) argument 104 dce_virtual_bandwidth_update(struct amdgpu_device *adev) argument 136 struct amdgpu_device *adev = dev->dev_private; local 228 dce_virtual_crtc_init(struct amdgpu_device *adev, int index) argument 254 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 366 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 409 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 424 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 469 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 589 dce_virtual_connector_encoder_init(struct amdgpu_device *adev, int index) argument 639 dce_virtual_set_display_funcs(struct amdgpu_device *adev) argument 644 dce_virtual_pageflip(struct amdgpu_device *adev, unsigned crtc_id) argument 696 struct amdgpu_device *adev = ddev->dev_private; local 706 dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, int crtc, enum amdgpu_interrupt_state state) argument 735 dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 753 dce_virtual_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_vcn.c	62 int amdgpu_vcn_sw_init(struct amdgpu_device *adev) argument 70 INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler); 72 switch (adev->asic_type) { 74 if (adev->rev_id >= 8) 76 else if (adev->pdev->device == 0x15d8) 83 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && 84 (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) 85 adev->vcn.indirect_sram = true; 89 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && 90 (adev 191 amdgpu_vcn_sw_fini(struct amdgpu_device *adev) argument 222 amdgpu_vcn_suspend(struct amdgpu_device *adev) argument 248 amdgpu_vcn_resume(struct amdgpu_device *adev) argument 287 struct amdgpu_device *adev = local 326 struct amdgpu_device *adev = ring->adev; local 362 struct amdgpu_device *adev = ring->adev; local 391 struct amdgpu_device *adev = ring->adev; local 442 struct amdgpu_device *adev = ring->adev; local 476 struct amdgpu_device *adev = ring->adev; local 501 struct amdgpu_device *adev = ring->adev; local 530 struct amdgpu_device *adev = ring->adev; local 664 struct amdgpu_device *adev = ring->adev; local [all...]
H A D	amdgpu_vcn_v1_0.c	54 static int vcn_v1_0_stop(struct amdgpu_device *adev); 55 static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev); 56 static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev); 57 static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev); 59 static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, 73 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 75 adev->vcn.num_vcn_inst = 1; 76 adev->vcn.num_enc_rings = 2; 78 vcn_v1_0_set_dec_ring_funcs(adev); 79 vcn_v1_0_set_enc_ring_funcs(adev); 98 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 177 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 199 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 236 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 258 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 279 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 297 vcn_v1_0_mc_resume_spg_mode(struct amdgpu_device *adev) argument 364 vcn_v1_0_mc_resume_dpg_mode(struct amdgpu_device *adev) argument 444 vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev) argument 571 vcn_v1_0_enable_clock_gating(struct amdgpu_device *adev) argument 636 vcn_v1_0_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel) argument 690 vcn_1_0_disable_static_power_gating(struct amdgpu_device *adev) argument 736 vcn_1_0_enable_static_power_gating(struct amdgpu_device *adev) argument 785 vcn_v1_0_start_spg_mode(struct amdgpu_device *adev) argument 959 vcn_v1_0_start_dpg_mode(struct amdgpu_device *adev) argument 1103 vcn_v1_0_start(struct amdgpu_device *adev) argument 1121 vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev) argument 1162 vcn_v1_0_stop_dpg_mode(struct amdgpu_device *adev) argument 1196 vcn_v1_0_stop(struct amdgpu_device *adev) argument 1208 vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument 1338 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1345 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1357 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1381 struct amdgpu_device *adev = ring->adev; local 1395 struct amdgpu_device *adev = ring->adev; local 1409 struct amdgpu_device *adev = ring->adev; local 1427 struct amdgpu_device *adev = ring->adev; local 1446 struct amdgpu_device *adev = ring->adev; local 1464 struct amdgpu_device *adev = ring->adev; local 1505 struct amdgpu_device *adev = ring->adev; local 1527 struct amdgpu_device *adev = ring->adev; local 1561 struct amdgpu_device *adev = ring->adev; local 1583 struct amdgpu_device *adev = ring->adev; local 1600 struct amdgpu_device *adev = ring->adev; local 1617 struct amdgpu_device *adev = ring->adev; local 1704 vcn_v1_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 1712 vcn_v1_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1739 struct amdgpu_device *adev = ring->adev; local 1761 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1778 struct amdgpu_device *adev = local 1818 struct amdgpu_device *adev = ring->adev; local 1941 vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) argument 1947 vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev) argument 1962 vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_fb.c	98 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) argument 140 struct amdgpu_device *adev = rfbdev->adev; local 154 info = drm_get_format_info(adev->ddev, mode_cmd); 158 mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, 160 domain = amdgpu_display_supported_domains(adev, flags); 164 ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags, 183 dev_err(adev->dev, "FB failed to set tiling flags\n"); 195 dev_err(adev->dev, "%p bind failed\n", abo); 217 struct amdgpu_device *adev local 352 amdgpu_fbdev_init(struct amdgpu_device *adev) argument 397 amdgpu_fbdev_fini(struct amdgpu_device *adev) argument 407 amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) argument 414 amdgpu_fbdev_total_size(struct amdgpu_device *adev) argument 427 amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) argument [all...]
H A D	amdgpu_uvd_v5_0.c	46 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev); 47 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev); 48 static int uvd_v5_0_start(struct amdgpu_device *adev); 49 static void uvd_v5_0_stop(struct amdgpu_device *adev); 52 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev, 63 struct amdgpu_device *adev = ring->adev; local 77 struct amdgpu_device *adev = ring->adev; local 91 struct amdgpu_device *adev local 98 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 110 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 140 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 158 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 215 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 229 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 242 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 258 uvd_v5_0_mc_resume(struct amdgpu_device *adev) argument 297 uvd_v5_0_start(struct amdgpu_device *adev) argument 438 uvd_v5_0_stop(struct amdgpu_device *adev) argument 499 struct amdgpu_device *adev = ring->adev; local 559 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 567 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 578 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 589 uvd_v5_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 598 uvd_v5_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 607 uvd_v5_0_enable_clock_gating(struct amdgpu_device *adev, bool enable) argument 653 uvd_v5_0_set_sw_clock_gating(struct amdgpu_device *adev) argument 741 uvd_v5_0_enable_mgcg(struct amdgpu_device *adev, bool enable) argument 770 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 799 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 816 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 876 uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev) argument 886 uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_si_smc.c	38 static int si_set_smc_sram_address(struct amdgpu_device *adev, argument 52 int amdgpu_si_copy_bytes_to_smc(struct amdgpu_device *adev, argument 67 spin_lock_irqsave(&adev->smc_idx_lock, flags); 72 ret = si_set_smc_sram_address(adev, addr, limit); 87 ret = si_set_smc_sram_address(adev, addr, limit); 103 ret = si_set_smc_sram_address(adev, addr, limit); 111 spin_unlock_irqrestore(&adev->smc_idx_lock, flags); 116 void amdgpu_si_start_smc(struct amdgpu_device *adev) argument 125 void amdgpu_si_reset_smc(struct amdgpu_device *adev) argument 139 int amdgpu_si_program_jump_on_start(struct amdgpu_device *adev) argument 146 amdgpu_si_smc_clock(struct amdgpu_device *adev, bool enable) argument 158 amdgpu_si_is_smc_running(struct amdgpu_device *adev) argument 169 amdgpu_si_send_msg_to_smc(struct amdgpu_device *adev, PPSMC_Msg msg) argument 190 amdgpu_si_wait_for_smc_inactive(struct amdgpu_device *adev) argument 208 amdgpu_si_load_smc_ucode(struct amdgpu_device *adev, u32 limit) argument 250 amdgpu_si_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, u32 *value, u32 limit) argument 265 amdgpu_si_write_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, u32 value, u32 limit) argument [all...]
H A D	amdgpu_sdma.h	56 int (*ras_late_init)(struct amdgpu_device *adev, 58 void (*ras_fini)(struct amdgpu_device *adev); 59 int (*query_ras_error_count)(struct amdgpu_device *adev, 113 #define amdgpu_emit_copy_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_copy_buffer((ib), (s), (d), (b)) 114 #define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b)) 120 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev, 122 void amdgpu_sdma_ras_fini(struct amdgpu_device *adev); 123 int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev, [all...]
H A D	amdgpu_vcn_v2_0.c	57 static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev); 58 static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev); 59 static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev); 62 static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, 74 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 76 adev->vcn.num_vcn_inst = 1; 77 adev->vcn.num_enc_rings = 2; 79 vcn_v2_0_set_dec_ring_funcs(adev); 80 vcn_v2_0_set_enc_ring_funcs(adev); 81 vcn_v2_0_set_irq_funcs(adev); 97 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 186 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 206 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 241 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 270 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 291 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 309 vcn_v2_0_mc_resume(struct amdgpu_device *adev) argument 353 vcn_v2_0_mc_resume_dpg_mode(struct amdgpu_device *adev, bool indirect) argument 454 vcn_v2_0_disable_clock_gating(struct amdgpu_device *adev) argument 556 vcn_v2_0_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, uint8_t indirect) argument 612 vcn_v2_0_enable_clock_gating(struct amdgpu_device *adev) argument 663 vcn_v2_0_disable_static_power_gating(struct amdgpu_device *adev) argument 710 vcn_v2_0_enable_static_power_gating(struct amdgpu_device *adev) argument 750 vcn_v2_0_start_dpg_mode(struct amdgpu_device *adev, bool indirect) argument 876 vcn_v2_0_start(struct amdgpu_device *adev) argument 1042 vcn_v2_0_stop_dpg_mode(struct amdgpu_device *adev) argument 1071 vcn_v2_0_stop(struct amdgpu_device *adev) argument 1139 vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument 1203 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1210 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1222 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1246 struct amdgpu_device *adev = ring->adev; local 1260 struct amdgpu_device *adev = ring->adev; local 1277 struct amdgpu_device *adev = ring->adev; local 1300 struct amdgpu_device *adev = ring->adev; local 1317 struct amdgpu_device *adev = ring->adev; local 1332 struct amdgpu_device *adev = ring->adev; local 1354 struct amdgpu_device *adev = ring->adev; local 1393 struct amdgpu_device *adev = ring->adev; local 1410 struct amdgpu_device *adev = ring->adev; local 1444 struct amdgpu_device *adev = ring->adev; local 1466 struct amdgpu_device *adev = ring->adev; local 1483 struct amdgpu_device *adev = ring->adev; local 1507 struct amdgpu_device *adev = ring->adev; local 1601 vcn_v2_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 1609 vcn_v2_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1636 struct amdgpu_device *adev = ring->adev; local 1675 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 1770 vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev) argument 1776 vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev) argument 1791 vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_uvd_v7_0.c	59 static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev); 60 static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev); 61 static void uvd_v7_0_set_irq_funcs(struct amdgpu_device *adev); 62 static int uvd_v7_0_start(struct amdgpu_device *adev); 63 static void uvd_v7_0_stop(struct amdgpu_device *adev); 64 static int uvd_v7_0_sriov_start(struct amdgpu_device *adev); 80 struct amdgpu_device *adev = ring->adev; local 94 struct amdgpu_device *adev = ring->adev; local 111 struct amdgpu_device *adev = ring->adev; local 125 struct amdgpu_device *adev = ring->adev; local 145 struct amdgpu_device *adev = ring->adev; local 159 struct amdgpu_device *adev = ring->adev; local 184 struct amdgpu_device *adev = ring->adev; local 378 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 415 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 503 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 529 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 607 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 629 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 641 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 657 uvd_v7_0_mc_resume(struct amdgpu_device *adev) argument 715 uvd_v7_0_mmsch_start(struct amdgpu_device *adev, struct amdgpu_mm_table *table) argument 771 uvd_v7_0_sriov_start(struct amdgpu_device *adev) argument 937 uvd_v7_0_start(struct amdgpu_device *adev) argument 1124 uvd_v7_0_stop(struct amdgpu_device *adev) argument 1165 struct amdgpu_device *adev = ring->adev; local 1233 struct amdgpu_device *adev = ring->adev; local 1302 struct amdgpu_device *adev = ring->adev; local 1345 struct amdgpu_device *adev = ring->adev; local 1361 struct amdgpu_device *adev = ring->adev; local 1394 struct amdgpu_device *adev = ring->adev; local 1538 uvd_v7_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 1547 uvd_v7_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 1844 uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev) argument 1857 uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev) argument 1878 uvd_v7_0_set_irq_funcs(struct amdgpu_device *adev) argument [all...]
H A D	amdgpu_uvd_v4_2.c	47 static void uvd_v4_2_mc_resume(struct amdgpu_device *adev); 48 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev); 49 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev); 50 static int uvd_v4_2_start(struct amdgpu_device *adev); 51 static void uvd_v4_2_stop(struct amdgpu_device *adev); 54 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev, 65 struct amdgpu_device *adev = ring->adev; local 79 struct amdgpu_device *adev = ring->adev; local 93 struct amdgpu_device *adev = ring->adev; local 100 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 112 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 142 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 162 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 217 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 231 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 243 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 259 uvd_v4_2_start(struct amdgpu_device *adev) argument 386 uvd_v4_2_stop(struct amdgpu_device *adev) argument 482 struct amdgpu_device *adev = ring->adev; local 546 uvd_v4_2_mc_resume(struct amdgpu_device *adev) argument 581 uvd_v4_2_enable_mgcg(struct amdgpu_device *adev, bool enable) argument 607 uvd_v4_2_set_dcm(struct amdgpu_device *adev, bool sw_mode) argument 636 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 644 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 655 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 666 uvd_v4_2_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source, unsigned type, enum amdgpu_interrupt_state state) argument 675 uvd_v4_2_process_interrupt(struct amdgpu_device *adev, struct amdgpu_irq_src *source, struct amdgpu_iv_entry *entry) argument 700 struct amdgpu_device *adev = (struct amdgpu_device *)handle; local 767 uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev) argument 777 uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev) argument [all...]

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Indexes created Sun Jun 23 19:15:37 MDT 2024