/linux-master/drivers/media/platform/nxp/imx8-isi/ |
H A D | imx8-isi-pipe.c | 761 pipe->regs = isi->regs + id * isi->pdata->reg_offset;
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7996/ |
H A D | mac.c | 1490 u32 reg_offset; local 1510 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | 1513 mt76_wr(dev, MT_TMAC_CDTR(band_idx), cck + reg_offset); 1514 mt76_wr(dev, MT_TMAC_ODTR(band_idx), ofdm + reg_offset);
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/linux-master/drivers/net/ethernet/intel/igb/ |
H A D | igb_ethtool.c | 1003 u16 reg_offset; member in struct:igb_reg_test 1330 (i * test->reg_offset), 1336 (i * test->reg_offset), 1343 + (i * test->reg_offset));
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H A D | igb_main.c | 9851 u32 reg_val, reg_offset; local 9859 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC; 9860 reg_val = rd32(reg_offset); 9867 wr32(reg_offset, reg_val);
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/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | kv_dpm.c | 1408 u16 reg_offset, u32 value) 1412 return amdgpu_kv_copy_bytes_to_smc(adev, pi->soft_regs_start + reg_offset, 1417 u16 reg_offset, u32 *value) 1421 return amdgpu_kv_read_smc_sram_dword(adev, pi->soft_regs_start + reg_offset,
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H A D | si_dpm.c | 1840 u16 reg_offset, u32 value); 3638 u16 reg_offset, u32 *value) 3643 si_pi->soft_regs_start + reg_offset, value, 3649 u16 reg_offset, u32 value) 3654 si_pi->soft_regs_start + reg_offset, 3648 si_write_smc_soft_register(struct amdgpu_device *adev, u16 reg_offset, u32 value) argument
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/linux-master/include/sound/ |
H A D | cs35l41.h | 862 .reg_offset = (CS35L41_ ## _reg) - CS35L41_IRQ1_STATUS1,\
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/linux-master/drivers/accel/habanalabs/goya/ |
H A D | goya.c | 3610 u16 reg_offset; local 3612 reg_offset = le32_to_cpu(wreg_pkt->ctl) & 3616 dev_dbg(hdev->dev, "reg_offset == 0x%x\n", reg_offset); 3620 if (reg_offset != (mmDMA_CH_0_WR_COMP_ADDR_LO & 0x1FFF)) { 3622 reg_offset);
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/linux-master/drivers/scsi/ |
H A D | FlashPoint.c | 4925 u32 reg_offset; local 4936 reg_offset = hp_aramBase; 4961 WR_HARP32(p_port, reg_offset, addr); 4962 reg_offset += 4; 4964 WR_HARP32(p_port, reg_offset, count); 4965 reg_offset += 4;
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v9_4_2.c | 1460 if (gfx_v9_4_2_ras_fields[i].reg_offset != reg->reg_offset ||
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H A D | sdma_v4_4_2.c | 66 return (adev->reg_offset[SDMA0_HWIP][dev_inst][0] + offset);
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H A D | gfx_v9_0.c | 4927 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; 6637 if(gfx_v9_0_ras_fields[i].reg_offset != reg->reg_offset ||
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H A D | amdgpu_discovery.c | 1348 * so that we don't need to convert them when accessing adev->reg_offset. 1352 * and only store lower 32bit ip base in reg_offset[]. 1355 * By this way reg_offset[] and related helpers can 1372 adev->reg_offset[hw_ip][ip->instance_number] =
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/linux-master/arch/arm64/kvm/vgic/ |
H A D | vgic-its.c | 1726 .reg_offset = off, \ 1735 .reg_offset = off, \
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/linux-master/drivers/net/ethernet/mediatek/ |
H A D | mtk_eth_soc.h | 655 * @reg_offset: the status register offset of the SoC 679 u32 reg_offset; member in struct:mtk_hw_stats
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H A D | mtk_eth_soc.c | 980 unsigned int offs = hw_stats->reg_offset; 4552 mac->hw_stats->reg_offset = id * 0x80; 4554 mac->hw_stats->reg_offset = id * 0x40;
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/linux-master/drivers/mfd/ |
H A D | axp20x.c | 447 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
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/linux-master/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_sp.c | 806 u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM : local 820 reg_offset += 8*index; 826 REG_WR_DMAE(bp, reg_offset, wb_data, 2);
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | ci_dpm.c | 1252 u16 reg_offset, u32 *value) 1257 pi->soft_regs_start + reg_offset, 1263 u16 reg_offset, u32 value) 1268 pi->soft_regs_start + reg_offset, 1262 ci_write_smc_soft_register(struct radeon_device *rdev, u16 reg_offset, u32 value) argument
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H A D | si_dpm.c | 1688 u16 reg_offset, u32 value); 3121 u16 reg_offset, u32 *value) 3126 si_pi->soft_regs_start + reg_offset, value, 3132 u16 reg_offset, u32 value) 3137 si_pi->soft_regs_start + reg_offset, 3131 si_write_smc_soft_register(struct radeon_device *rdev, u16 reg_offset, u32 value) argument
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/linux-master/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | mbox.h | 1736 u64 reg_offset; member in struct:cpt_rd_wr_reg_msg
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/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_device_queue_manager.c | 1682 uint32_t reg_offset = 0; local 1693 grace_period, ®_offset,
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm.c | 1732 init_data.dcn_reg_offsets = adev->reg_offset[DCE_HWIP][0]; 1733 init_data.nbio_reg_offsets = adev->reg_offset[NBIO_HWIP][0]; 1734 init_data.clk_reg_offsets = adev->reg_offset[CLK_HWIP][0];
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/linux-master/include/linux/mfd/ |
H A D | palmas.h | 96 int reg_offset; member in struct:palmas_sleep_requestor_info
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/linux-master/sound/soc/codecs/ |
H A D | wcd9335.c | 5000 .reg_offset = 0,
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