Searched refs:pipes (Results 51 - 75 of 103) sorted by relevance

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/linux-master/tools/perf/
H A Dbuiltin-record.c107 } pipes; member in struct:record_thread
1011 thread_data->pipes.msg[0] = -1;
1012 thread_data->pipes.msg[1] = -1;
1013 thread_data->pipes.ack[0] = -1;
1014 thread_data->pipes.ack[1] = -1;
1019 if (pipe(thread_data->pipes.msg))
1022 if (pipe(thread_data->pipes.ack)) {
1023 close(thread_data->pipes.msg[0]);
1024 thread_data->pipes.msg[0] = -1;
1025 close(thread_data->pipes
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/linux-master/drivers/staging/media/atomisp/pci/
H A Datomisp_compat_css20.h68 struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; member in struct:atomisp_stream_env
H A Dsh_css.c120 * @num_pipes: number of pipes
121 * @pipes: pipe handles
133 struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; member in struct:sh_css_stream_seed
1217 assert(stream->pipes[i]);
1218 sh_css_pipe_free_shading_table(stream->pipes[i]);
1565 /* DH regular multi pipe - not continuous mode: map the next pipes too */
1570 ia_css_pipeline_map(stream->pipes[i]->pipe_num, map);
1578 * creates a host pipeline skeleton for all pipes in a stream. Called during
1656 main_pipe = stream->pipes[i];
1669 * creates a host pipeline for all pipes i
7865 find_pipe(struct ia_css_pipe *pipes[], unsigned int num_pipes, enum ia_css_pipe_mode mode, bool copy_pipe) argument
7901 ia_css_stream_create(const struct ia_css_stream_config *stream_config, int num_pipes, struct ia_css_pipe *pipes[], struct ia_css_stream **stream) argument
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H A Dia_css_stream_public.h122 to system memory and run pipes in offline mode */
162 * create the internal structures and fill in the configuration data and pipes
167 * @param[in] num_pipes The number of pipes to incorporate in the stream.
168 * @param[in] pipes The pipes.
172 * This function will create a stream with a given configuration and given pipes.
177 struct ia_css_pipe *pipes[],
218 * NOTE: this function will send stop event to pipes belong to this
237 * Destroy the stream and all the pipes related to it.
467 * update all pipes i
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H A Datomisp_compat_css20.c189 if (stream_env->pipes[pipe_id]) {
275 if (stream_env->pipes[j]) {
447 if (stream_env->pipes[i])
448 multi_pipes[pipe_index++] = stream_env->pipes[i];
499 if (!stream_env->pipes[i])
501 if (ia_css_pipe_destroy(stream_env->pipes[i])
507 stream_env->pipes[i] = NULL;
522 "cannot destroy css pipes for stream[%d].\n",
669 &stream_env->pipes[pipe_id]);
674 &stream_env->pipes[pipe_i
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H A Dsh_css_params.c881 struct ia_css_pipe *pipe = stream->pipes[i];
1048 * shading table for all pipes. Should replaced by a loop
1845 err = sh_css_set_global_isp_config_on_pipe(stream->pipes[0], config, pipe);
1944 err2 = sh_css_init_isp_params_from_config(stream->pipes[0], params, config, pipe);
1957 err3 = sh_css_param_update_isp_params(stream->pipes[0], params, sh_css_sp_is_running(), pipe);
2037 ia_css_pipe_get_isp_config(stream->pipes[0], config);
2398 stream->pipes[0]);
2522 sh_css_select_dp_10bpp_config(stream->pipes[i], &is_dp_10bpp)) {
3101 pipe = curr_pipe->stream->pipes[i];
3689 pipe = stream->pipes[
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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1322 display_e2e_pipe_params_st *pipes,
1329 dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
1336 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth =
1344 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes)
1347 dcn30_fpu_populate_dml_writeback_from_context(dc, res_ctx, pipes);
1377 display_e2e_pipe_params_st *pipes,
1408 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j);
1612 * May need to fix pipes getting tossed from 1 opp to another on flip
1631 display_e2e_pipe_params_st *pipes,
1645 ASSERT(pipes);
1320 dcn30_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
1343 dcn30_populate_dml_writeback_from_context( struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) argument
1374 dcn30_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
1628 dcn30_internal_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *vlevel_out, bool fast_validate, bool allow_self_refresh_only) argument
2027 dcn30_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
2048 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); local
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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c769 display_e2e_pipe_params_st *pipes,
779 ASSERT(pipes);
780 if (!pipes)
786 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
802 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
814 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
930 display_e2e_pipe_params_st *pipes; local
932 pipes = kcalloc(dc->res_pool->pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
933 if (!pipes)
937 voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate, pipes);
767 dcn21_fast_validate_bw(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *pipe_split_from, int *vlevel_out, bool fast_validate) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h34 #define dml_get_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes)
75 #define dml_get_pipe_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int which_pipe)
150 const display_e2e_pipe_params_st *pipes,
154 const display_e2e_pipe_params_st *pipes,
158 const display_e2e_pipe_params_st *pipes,
162 const display_e2e_pipe_params_st *pipes,
167 const display_e2e_pipe_params_st *pipes,
171 const display_e2e_pipe_params_st *pipes,
/linux-master/drivers/staging/media/ipu3/
H A Dipu3-css.c652 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
686 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1161 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1184 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1216 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1374 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1395 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1424 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1466 struct imgu_css_pipe *css_pipe = &css->pipes[pipe];
1512 struct imgu_css_pipe *css_pipe = &css->pipes[pip
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H A Dipu3-css.h43 * The pipe id type, distinguishes the kind of pipes that
159 struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM]; member in struct:imgu_css
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c1613 display_e2e_pipe_params_st *pipes,
1622 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
1638 pipes[pipe_cnt].pipe.src.immediate_flip = true;
1640 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
1641 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;
1642 pipes[pipe_cnt].pipe.src.dcc_rate = 3;
1643 pipes[pipe_cnt].dout.dsc_input_bpc = 0;
1645 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt);
1648 if (pipes[pipe_cnt].dout.dsc_enable) {
1651 pipes[pipe_cn
1611 dcn316_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
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/linux-master/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c417 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*layer),
536 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*wb_layer),
677 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*compiz),
846 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*scaler),
954 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*splitter),
1024 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*merger),
1135 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*improc),
1262 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*ctrlr),
1293 pipe = d71->pipes[blk_id];
1306 pipe = d71->pipes[blk_i
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/linux-master/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_dev.h81 u64 pipes[KOMEDA_MAX_PIPELINES]; member in struct:komeda_events
/linux-master/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-debug.c118 struct mxc_isi_pipe *pipe = &isi->pipes[i];
/linux-master/net/nfc/hci/
H A Dcommand.c193 * number of pipes already open on this gate before
338 hdev->pipes[pipe].gate = dest_gate;
339 hdev->pipes[pipe].dest_host = dest_host;
/linux-master/drivers/nfc/st21nfca/
H A Dcore.c88 /* Secure element pipes are created by secure element host */
117 /* On ST21NFCA device pipes number are dynamics
118 * A maximum of 16 pipes can be created at the same time
119 * If pipes are already created, hci_dev_up will fail.
185 hdev->pipes[pipe_info[2]].gate =
187 hdev->pipes[pipe_info[2]].dest_host =
836 u8 gate = hdev->pipes[pipe].gate;
843 hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID)
892 u8 gate = hdev->pipes[pipe].gate;
893 u8 host = hdev->pipes[pip
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/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_modeset_setup.c191 * Return all the pipes using a transcoder in @transcoder_mask.
198 u8 pipes = 0; local
211 pipes |= BIT(temp_crtc->pipe);
214 return pipes;
218 * Return the port sync master and slave pipes linked to @crtc.
219 * For bigjoiner configs return only the bigjoiner master pipes.
254 u8 pipes = 0; local
260 pipes |= intel_crtc_bigjoiner_slave_pipes(master_crtc_state);
263 return pipes;
435 * pipes t
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c1142 struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; local
1149 if (pipes[i].stream == NULL)
1152 if (pipes[i].stream->link == link && !pipes[i].top_pipe &&
1153 !pipes[i].prev_odm_pipe) {
1154 pipe_ctx = &pipes[i];
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_display.c742 int pipes = ilog2(num_pipes); local
800 DRM_ERROR("invalid number of pipes and packers\n");
806 pipe_xor_bits = min(block_size_bits - 8, pipes);
810 pipe_xor_bits = min(block_size_bits - 8, pipes);
815 pipe_xor_bits = min(block_size_bits - 8, pipes);
820 pipe_xor_bits = min(block_size_bits - 8, pipes +
887 pipes == packers && pipes > 1)
890 dcc_block_bits = max(20, 16 + pipes + extra_pipe);
893 AMD_FMT_MOD_SET(PIPE, pipes);
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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1328 /* Always do 1-to-1 mapping when number of DSCs is same as number of pipes */
1389 /* The number of DSCs can be less than the number of pipes */
1616 display_e2e_pipe_params_st *pipes,
1646 dcn20_fpu_set_wb_arb_params(wb_arb_params, context, pipes, pipe_cnt, i);
1715 * Same logic applies for ODM pipes
1784 /* merge previously split odm pipes since mode support needs to make the decision */
1813 /* merge previously mpc split pipes since mode support needs to make the decision */
1897 /* Avoid split loop looks for lowest voltage level that allows most unsplit pipes possible */
2028 display_e2e_pipe_params_st *pipes,
2038 ASSERT(pipes);
1613 dcn20_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
2025 dcn20_fast_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *pipe_split_from, int *vlevel_out, bool fast_validate) argument
2151 display_e2e_pipe_params_st *pipes; local
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/linux-master/include/net/nfc/
H A Dhci.h130 struct nfc_hci_pipe pipes[NFC_HCI_MAX_PIPES]; member in struct:nfc_hci_dev
/linux-master/drivers/gpu/drm/omapdrm/
H A Domap_irq.c221 struct drm_crtc *crtc = priv->pipes[id].crtc;
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_device.c266 .pipes = 2,
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c1670 display_e2e_pipe_params_st *pipes,
1676 pipe_cnt = dcn314_populate_dml_pipes_from_context_fpu(dc, context, pipes, fast_validate);
1727 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); local
1732 if (!pipes)
1740 out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, false);
1757 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
1771 kfree(pipes);
1668 dcn314_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument

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