/linux-master/drivers/clk/starfive/ |
H A D | clk-starfive-jh7110-sys.c | 446 struct clk_parent_data parents[4] = {}; local 450 .parent_data = parents, 459 unsigned int pidx = jh7110_sysclk_data[idx].parents[i]; 462 parents[i].hw = &priv->reg[pidx].hw; 464 parents[i].fw_name = "osc"; 466 parents[i].fw_name = "gmac1_rmii_refin"; 468 parents[i].fw_name = "gmac1_rgmii_rxin"; 470 parents[i].fw_name = "i2stx_bclk_ext"; 472 parents[i].fw_name = "i2stx_lrck_ext"; 474 parents[ [all...] |
H A D | clk-starfive-jh7100.c | 317 struct clk_parent_data parents[4] = {}; local 321 .parent_data = parents, 329 unsigned int pidx = jh7100_clk_data[idx].parents[i]; 332 parents[i].hw = &priv->reg[pidx].hw; 334 parents[i].hw = priv->pll[pidx - JH7100_CLK_PLL0_OUT]; 336 parents[i].fw_name = "osc_sys"; 338 parents[i].fw_name = "osc_aud"; 340 parents[i].fw_name = "gmac_rmii_ref"; 342 parents[i].fw_name = "gmac_gr_mii_rxclk";
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H A D | clk-starfive-jh7110-isp.c | 153 struct clk_parent_data parents[4] = {}; local 157 .parent_data = parents, 172 unsigned int pidx = jh7110_ispclk_data[idx].parents[i]; 175 parents[i].hw = &priv->reg[pidx].hw; 177 parents[i].fw_name = fw_name[pidx - JH7110_ISPCLK_END];
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H A D | clk-starfive-jh7110-vout.c | 158 struct clk_parent_data parents[4] = {}; local 162 .parent_data = parents, 179 unsigned int pidx = jh7110_voutclk_data[idx].parents[i]; 182 parents[i].hw = &priv->reg[pidx].hw; 184 parents[i].fw_name = fw_name[pidx - JH7110_VOUTCLK_END];
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/linux-master/drivers/clk/pxa/ |
H A D | clk-pxa.h | 91 * This clock takes it source from 2 possible parents : 120 #define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \ 124 .dev_id = _dev_id, .con_id = _con_id, .parent_names = parents,\ 131 #define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \ 133 PXA_CKEN(dev_id, con_id, name, parents, 1, 1, 1, 1, \
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H A D | clk-pxa25x.c | 115 #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ 117 PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div, \ 129 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ 130 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \ 132 #define PXA25X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ 133 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
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H A D | clk-pxa27x.c | 110 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ 112 PXA_CKEN(dev_id, con_id, bit, parents, 1, 1, mult_hp, div_hp, \ 124 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ 125 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \ 127 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ 128 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
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/linux-master/drivers/clk/x86/ |
H A D | clk-pmc-atom.c | 36 struct clk_plt_fixed **parents; member in struct:clk_plt_data 237 plt_clk_unregister_fixed_rate(data->parents[i]); 268 data->parents = devm_kcalloc(&pdev->dev, nparents, 269 sizeof(*data->parents), GFP_KERNEL); 270 if (!data->parents) 279 data->parents[i] = 283 if (IS_ERR(data->parents[i])) { 284 err = PTR_ERR(data->parents[i]);
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/linux-master/drivers/gpu/drm/sun4i/ |
H A D | sun4i_hdmi_tmds_clk.c | 207 const char *parents[2]; local 209 parents[0] = __clk_get_name(hdmi->pll0_clk); 210 if (!parents[0]) 213 parents[1] = __clk_get_name(hdmi->pll1_clk); 214 if (!parents[1]) 223 init.parent_names = parents;
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/linux-master/drivers/clk/keystone/ |
H A D | pll.c | 303 const char *parents[2]; local 313 of_clk_parent_fill(node, parents, 2); 314 if (!parents[0] || !parents[1]) { 329 clk = clk_register_mux(NULL, clk_name, (const char **)&parents, 330 ARRAY_SIZE(parents) , 0, reg, shift, mask,
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/linux-master/drivers/clk/samsung/ |
H A D | clk-exynos-clkout.c | 114 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; local 147 parents[i] = of_clk_get_by_name(clkout->np, name); 148 if (IS_ERR(parents[i])) { 153 parent_names[i] = __clk_get_name(parents[i]); 199 if (!IS_ERR(parents[i])) 200 clk_put(parents[i]);
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/linux-master/drivers/clk/nxp/ |
H A D | clk-lpc18xx-cgu.c | 534 const char *parents[CLK_SRC_MAX]; local 540 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); 542 return clk_register_composite(NULL, name, parents, clk->n_parents, 554 const char *parents[CLK_SRC_MAX]; local 562 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); 566 return clk_register_composite(NULL, name, parents, clk->n_parents, 570 return clk_register_composite(NULL, name, parents, clk->n_parents, 581 const char *parents[CLK_SRC_MAX]; local 587 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); 589 return clk_register_composite(NULL, name, parents, cl 598 const char *parents[CLK_SRC_MAX]; local [all...] |
/linux-master/drivers/clk/zynqmp/ |
H A D | clk-gate-zynqmp.c | 101 * @parents: Name of this clock's parents 102 * @num_parents: Number of parents 108 const char * const *parents, 127 init.parent_names = parents; 107 zynqmp_clk_register_gate(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument
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H A D | clk-mux-zynqmp.c | 16 * prepare - clk_prepare only ensures that parents are prepared 17 * enable - clk_enable only ensures that parents are enabled 41 * Return: Parent index on success or number of parents in case of error 125 * @parents: Name of this clock's parents 126 * @num_parents: Number of parents 132 const char * const *parents, 153 init.parent_names = parents; 131 zynqmp_clk_register_mux(const char *name, u32 clk_id, const char * const *parents, u8 num_parents, const struct clock_topology *nodes) argument
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/linux-master/drivers/gpio/ |
H A D | gpio-ep93xx.c | 381 girq->parents = devm_kcalloc(dev, girq->num_parents, 382 sizeof(*girq->parents), 384 if (!girq->parents) 388 girq->parents[0] = ab_parent_irq; 403 girq->parents = devm_kcalloc(dev, girq->num_parents, 404 sizeof(*girq->parents), 406 if (!girq->parents) 410 girq->parents[i] = platform_get_irq(pdev, i + 1);
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H A D | gpio-rda.c | 262 girq->parents = devm_kcalloc(dev, 1, 263 sizeof(*girq->parents), 265 if (!girq->parents) 267 girq->parents[0] = rda_gpio->irq;
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H A D | gpio-idt3243x.c | 180 girq->parents = devm_kcalloc(dev, girq->num_parents, 181 sizeof(*girq->parents), 183 if (!girq->parents) 186 girq->parents[0] = parent_irq;
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/linux-master/drivers/clk/imx/ |
H A D | clk-fixup-mux.c | 69 u8 shift, u8 width, const char * const *parents, 86 init.parent_names = parents; 68 imx_clk_hw_fixup_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, void (*fixup)(u32 *val)) argument
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/linux-master/drivers/clk/st/ |
H A D | clk-flexgen.c | 281 const char **parents; local 288 parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL); 289 if (!parents) 292 *num_parents = of_clk_parent_fill(np, parents, nparents); 294 return parents; 647 const char **parents; local 666 parents = flexgen_get_parents(np, &num_parents); 667 if (!parents) { 727 clk = clk_register_flexgen(clk_name, parents, num_parents, 736 kfree(parents); [all...] |
/linux-master/drivers/clk/ |
H A D | clk-lochnagar.c | 123 const struct clk_parent_data *parents; member in struct:lochnagar_config 129 .parents = lochnagar1_clk_parents, 135 .parents = lochnagar2_clk_parents, 259 clk_init.parent_data = conf->parents;
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/linux-master/drivers/clk/renesas/ |
H A D | clk-div6.c | 33 * @parents: Array to map from valid parent clocks indices to hardware indices 41 u8 parents[]; member in struct:div6_clock 177 if (clock->parents[i] == hw_index) 194 src = clock->parents[index] << __ffs(clock->src_mask); 219 * parents, as the parent selection bits are not restored. 254 clock = kzalloc(struct_size(clock, parents, num_parents), GFP_KERNEL); 280 pr_err("%s: invalid number of parents for DIV6 clock %s\n", 286 /* Filter out invalid parents */ 290 clock->parents[valid_parents] = i;
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/linux-master/tools/perf/pmu-events/ |
H A D | jevents.py | 72 def file_name_to_table_name(prefix: str, parents: Sequence[str], 76 for p in parents: 595 def preprocess_one_file(parents: Sequence[str], item: os.DirEntry) -> None: 601 level = len(parents) 613 assert len(mgroup) > 1, parents 631 def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None: 645 _pending_events_tblname = file_name_to_table_name('pmu_events_', parents, item.name) 647 _pending_metrics_tblname = file_name_to_table_name('pmu_metrics_', parents, item.name) 654 level = len(parents) 1227 def ftw(path: str, parents [all...] |
/linux-master/drivers/clk/pistachio/ |
H A D | clk.h | 34 const char *const *parents; member in struct:pistachio_mux 45 .parents = _pnames, \
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/linux-master/drivers/mmc/host/ |
H A D | meson-mx-sdhc-clkc.c | 49 const struct clk_parent_data *parents, 63 init.parent_data = parents; 47 meson_mx_sdhc_clk_hw_register(struct device *dev, const char *name_suffix, const struct clk_parent_data *parents, unsigned int num_parents, const struct clk_ops *ops, struct clk_hw *hw) argument
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/linux-master/drivers/clk/ingenic/ |
H A D | cgu.h | 147 * @parents: an array of the indices of potential parents of this clock 174 int parents[4]; member in struct:ingenic_cgu_clk_info
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