Searched refs:mux (Results 251 - 275 of 399) sorted by relevance

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/linux-master/drivers/clk/stm32/
H A Dclk-stm32-core.h36 int mux; member in struct:stm32_composite_cfg
/linux-master/drivers/phy/
H A Dphy-can-transceiver.c14 #include <linux/mux/consumer.h>
38 dev_err(&phy->dev, "Failed to select CAN mux: %d\n", ret);
116 if (of_property_read_bool(dev->of_node, "mux-states")) {
122 "failed to get mux\n");
/linux-master/drivers/pinctrl/
H A Dcore.h133 * struct pinctrl_setting - an individual mux or config setting
147 struct pinctrl_setting_mux mux; member in union:pinctrl_setting::__anon420
165 * @mux_setting: The most recent selected mux setting for this pin, if any.
/linux-master/drivers/media/pci/dt3155/
H A Ddt3155.h157 * @mux: mutex to protect the instance
175 struct mutex mux; member in struct:dt3155_priv
/linux-master/sound/soc/intel/avs/
H A Dtopology.h105 } mux; member in union:avs_tplg_modcfg_ext::__anon1492
/linux-master/drivers/i2c/muxes/
H A Di2c-arb-gpio-challenge.c12 #include <linux/i2c-mux.h>
169 /* Actually add the mux adapter */
/linux-master/drivers/video/backlight/
H A Domap1_bl.c17 #include <linux/soc/ti/omap1-mux.h>
/linux-master/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c464 * gpio irq mux is shared between several banks, protect with a lock
563 (*map)[*num_maps].data.mux.group = grp->name;
568 (*map)[*num_maps].data.mux.function = stm32_gpio_functions[fnum];
1449 struct reg_field mux; local
1451 mux.reg = offset + (i / 4) * 4;
1452 mux.lsb = (i % 4) * mask_width;
1453 mux.msb = mux.lsb + mask_width - 1;
1456 i, mux.reg, mux
[all...]
/linux-master/drivers/phy/marvell/
H A Dphy-mvebu-cp110-comphy.c184 u32 mux; member in struct:mvebu_comphy_conf
194 .mux = _mux, \
204 .mux = -1, \
303 /* Unused PHY mux value is 0x0 */
322 return conf->mux;
726 int ret, mux; local
729 mux = mvebu_comphy_get_mux(lane->id, lane->port,
731 if (mux < 0)
740 val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
/linux-master/sound/soc/codecs/
H A Dsma1303.c529 unsigned int mux = dapm_kcontrol_get_value(w->kcontrols[0]); local
535 switch (mux) {
580 __func__, mux);
585 sma1303_aif_in_source_text[mux]);
599 unsigned int mux = dapm_kcontrol_get_value(w->kcontrols[0]); local
605 switch (mux) {
720 __func__, mux);
725 sma1303_aif_out_source_text[mux]);
/linux-master/drivers/media/i2c/
H A Dmax9286.c20 #include <linux/i2c-mux.h>
184 struct i2c_mux_core *mux; member in struct:max9286_priv
338 * mux, and that the channel ID is invalidated to ensure we reconfigure
375 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
378 if (!priv->mux)
381 priv->mux->priv = priv;
386 ret = i2c_mux_add_adapter(priv->mux, 0, index);
394 i2c_mux_del_adapters(priv->mux);
1171 * only. This should be disabled after the mux is initialised.
1412 /* Leave the mux channel
[all...]
H A Dov5640.c198 enum ov5640_format_mux mux; member in struct:ov5640_pixfmt
208 .mux = OV5640_FMT_MUX_YUV422,
215 .mux = OV5640_FMT_MUX_YUV422,
222 .mux = OV5640_FMT_MUX_YUV422,
229 .mux = OV5640_FMT_MUX_RGB,
236 .mux = OV5640_FMT_MUX_RGB,
243 .mux = OV5640_FMT_MUX_RAW_DPC,
250 .mux = OV5640_FMT_MUX_RAW_DPC,
257 .mux = OV5640_FMT_MUX_RAW_DPC,
264 .mux
[all...]
/linux-master/drivers/pinctrl/sunplus/
H A Dsppctl.c515 seq_printf(s, " %s", sppctl_first_get(chip, i) ? "gpi" : "mux");
909 (*map)[i].data.mux.function = sppctl_list_funcs[pin_func].name;
910 (*map)[i].data.mux.group = pin_get_name(pctldev, pin_num);
912 dev_dbg(pctldev->dev, "%s: %s\n", (*map)[i].data.mux.group,
913 (*map)[i].data.mux.function);
925 (*map)[*num_maps].data.mux.function = s_f;
926 (*map)[*num_maps].data.mux.group = s_g;
/linux-master/drivers/clk/qcom/
H A DMakefile12 clk-qcom-y += clk-regmap-mux.o
13 clk-qcom-y += clk-regmap-mux-div.o
14 clk-qcom-y += clk-regmap-phy-mux.o
/linux-master/drivers/gpu/drm/mcde/
H A Dmcde_display.c499 u32 mux; local
507 mux = MCDE_CHNL0MUXING;
514 mux = MCDE_CHNL1MUXING;
521 mux = MCDE_CHNL2MUXING;
528 mux = MCDE_CHNL3MUXING;
596 mcde->regs + mux);
600 mcde->regs + mux);
/linux-master/drivers/gpu/drm/bridge/
H A Dnwl-dsi.c17 #include <linux/mux/consumer.h>
92 struct mux_control *mux; member in struct:nwl_dsi
1034 dsi->mux = devm_mux_control_get(dsi->dev, NULL);
1035 if (IS_ERR(dsi->mux)) {
1036 ret = PTR_ERR(dsi->mux);
1038 DRM_DEV_ERROR(dsi->dev, "Failed to get mux: %d\n", ret);
1111 ret = mux_control_try_select(dsi->mux, use_dcss);
1123 ret = mux_control_deselect(dsi->mux);
/linux-master/drivers/gpu/drm/rockchip/
H A Ddw-mipi-dsi-rockchip.c748 int mux)
752 mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big);
788 int ret, mux; local
790 mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node,
792 if (mux < 0)
806 dw_mipi_dsi_rockchip_set_lcdsel(dsi, mux);
808 dw_mipi_dsi_rockchip_set_lcdsel(dsi->slave, mux);
747 dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi, int mux) argument
/linux-master/drivers/clk/sunxi-ng/
H A Dccu-sun50i-a100.c279 24, 3, /* mux */
289 24, 3, /* mux */
295 24, 3, /* mux */
301 24, 3, /* mux */
309 24, 2, /* mux */
316 24, 1, /* mux */
330 24, 3, /* mux */
340 24, 1, /* mux */
351 24, 1, /* mux */
361 24, 1, /* mux */
[all...]
H A Dccu-sun8i-r40.c194 30, 1, /* mux */
230 .mux = _SUNXI_CCU_MUX(21, 1),
277 .mux = {
311 24, 2, /* mux */
479 .mux = _SUNXI_CCU_MUX(24, 2),
494 24, 2, /* mux */
501 24, 2, /* mux */
508 24, 2, /* mux */
515 24, 2, /* mux */
522 24, 2, /* mux */
[all...]
H A Dccu-sun50i-h616.c253 24, 2, /* mux */
262 24, 2, /* mux */
268 24, 2, /* mux */
274 24, 2, /* mux */
281 24, 2, /* mux */
288 24, 1, /* mux */
299 24, 1, /* mux */
308 24, 1, /* mux */
318 24, 1, /* mux */
333 24, 1, /* mux */
[all...]
/linux-master/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c162 struct typec_mux_dev *mux; member in struct:rk_udphy
521 * if all 4 lane assignment for dp function, define rockchip,dp-lane-mux = <x x x x>;
525 * rockchip,dp-lane-mux ln0(tx/rx) ln1(tx) ln2(tx/rx) ln3(tx)
529 * if 2 lane for dp function, 2 lane for usb function, define rockchip,dp-lane-mux = <x x>;
533 * rockchip,dp-lane-mux ln0(tx/rx) ln1(tx) ln2(tx/rx) ln3(tx)
812 /* Step 3: configure lane mux */
881 num_lanes = device_property_count_u32(udphy->dev, "rockchip,dp-lane-mux");
883 dev_dbg(udphy->dev, "no dp-lane-mux, following dp alt mode\n");
890 "invalid number of lane mux\n");
892 ret = device_property_read_u32_array(udphy->dev, "rockchip,dp-lane-mux",
1326 rk_udphy_typec_mux_set(struct typec_mux_dev *mux, struct typec_mux_state *state) argument
[all...]
/linux-master/drivers/clk/sunxi/
H A Dclk-sunxi.c527 .mux = 6,
534 .mux = 12,
542 .mux = 24,
550 .mux = 24,
662 pr_err("Could not map registers for mux-clk: %pOF\n", node);
679 pr_err("%s: failed to register mux clock %s: %ld\n", __func__,
709 CLK_OF_DECLARE(sun6i_ahb1_mux, "allwinner,sun6i-a31-ahb1-mux-clk",
785 pr_err("Could not map registers for mux-clk: %pOF\n", node);
1156 .mux = 24,
/linux-master/drivers/clk/mvebu/
H A Darmada-37xx-periph.c625 struct clk_mux *mux; local
628 mux = to_clk_mux(mux_hw);
629 mux->lock = lock;
631 mux->reg = reg + (u64)mux->reg;
/linux-master/drivers/dma/qcom/
H A Dqcom_adm.c131 u32 mux; member in struct:adm_async_desc
145 u32 mux; member in struct:adm_chan
411 async_desc->mux = achan->mux ? ADM_CRCI_CTL_MUX_SEL : 0;
550 writel(async_desc->mux | async_desc->blk_size,
/linux-master/drivers/comedi/drivers/
H A Dpcl812.c558 unsigned int mux = 0; local
567 mux |= PCL812_MUX_CS0 | PCL812_MUX_CS1;
570 mux |= PCL812_MUX_CS0;
572 mux |= PCL812_MUX_CS1;
576 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG);

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