/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_engine_cs.c | 491 engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases); 1623 const i915_reg_t mode = RING_MI_MODE(engine->mmio_base); 1633 intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base), 1768 u32 mmio_base = engine->mmio_base; local 1777 intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); 1811 intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); 1824 intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); 1838 if (I915_SELFTEST_ONLY(!engine->mmio_base)) 2411 drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base); [all...] |
H A D | intel_engine_types.h | 389 u32 mmio_base; member in struct:intel_engine_cs
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H A D | selftest_workarounds.c | 102 const u32 base = engine->mmio_base; 182 RING_NOPID(engine->mmio_base); 438 reg = (reg - engine->mmio_base) & ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
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/linux-master/sound/soc/intel/skylake/ |
H A D | skl-messages.c | 251 void __iomem *mmio_base; local 264 mmio_base = pci_ioremap_bar(skl->pci, 4); 265 if (mmio_base == NULL) { 277 ret = ops->init(bus->dev, mmio_base, irq, 309 iounmap(mmio_base);
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/linux-master/drivers/ata/ |
H A D | sata_sx4.c | 747 void __iomem *mmio_base; local 752 mmio_base = host->iomap[PDC_MMIO_BAR]; 755 mmio_base += PDC_CHIP0_OFS; 756 mask = readl(mmio_base + PDC_20621_SEQMASK); 784 mmio_base);
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H A D | sata_mv.c | 1254 static void mv_dump_all_regs(void __iomem *mmio_base, argument 1272 mv_dump_mem(&pdev->dev, mmio_base+0xc00, 0x3c); 1273 mv_dump_mem(&pdev->dev, mmio_base+0xd00, 0x34); 1274 mv_dump_mem(&pdev->dev, mmio_base+0xf00, 0x4); 1275 mv_dump_mem(&pdev->dev, mmio_base+0x1d00, 0x6c); 1277 hc_base = mv_hc_base(mmio_base, hc); 1282 port_base = mv_port_base(mmio_base, p);
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/linux-master/drivers/spi/ |
H A D | spi-pxa2xx.c | 347 drv_data->lpss_base = drv_data->ssp->mmio_base + config->offset; 1281 ssp->mmio_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 1282 if (IS_ERR(ssp->mmio_base)) 1283 return PTR_ERR(ssp->mmio_base); 1427 if (!ssp->mmio_base)
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H A D | spi-pxa2xx-pci.c | 287 ssp->mmio_base = pcim_iomap_table(dev)[0];
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/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_query.c | 155 RING_TIMESTAMP(hwe->mmio_base), 156 RING_TIMESTAMP_UDW(hwe->mmio_base),
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H A D | xe_guc_ads.c | 568 { .reg = RING_MODE(hwe->mmio_base), }, 569 { .reg = RING_HWS_PGA(hwe->mmio_base), }, 570 { .reg = RING_IMR(hwe->mmio_base), },
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H A D | xe_ring_ops.c | 195 RING_NOPID(hwe->mmio_base).addr, 0);
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/linux-master/drivers/scsi/pcmcia/ |
H A D | nsp_cs.c | 719 unsigned long mmio_base = SCpnt->device->host->base; local 773 nsp_mmio_fifo32_read(mmio_base, scsi_pointer->ptr, 822 unsigned long mmio_base = SCpnt->device->host->base; local 876 nsp_mmio_fifo32_write(mmio_base, scsi_pointer->ptr,
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/linux-master/drivers/pci/hotplug/ |
H A D | shpchp.h | 103 unsigned long mmio_base; member in struct:controller
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/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | i915_perf.c | 307 gpr0 = i915_mmio_reg_offset(GEN8_RING_CS_GPR(stream->engine->mmio_base, 0));
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/linux-master/include/ufs/ |
H A D | ufshcd.h | 798 * @mmio_base: UFSHCI base register address 921 void __iomem *mmio_base; member in struct:ufs_hba 1226 writel((val), (hba)->mmio_base + (reg)) 1228 readl((hba)->mmio_base + (reg))
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/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | scheduler.c | 273 reg = RING_INSTDONE(engine->mmio_base); 277 reg = RING_ACTHD(engine->mmio_base); 281 reg = RING_ACTHD_UDW(engine->mmio_base); 652 vgpu_vreg_t(workload->vgpu, RING_START(workload->engine->mmio_base)) = 970 ring_base = rq->engine->mmio_base;
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/linux-master/drivers/iommu/amd/ |
H A D | iommu.c | 823 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); 824 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); 831 writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); 852 head = readl(iommu->mmio_base + MMIO_GA_HEAD_OFFSET); 853 tail = readl(iommu->mmio_base + MMIO_GA_TAIL_OFFSET); 866 writel(head, iommu->mmio_base + MMIO_GA_HEAD_OFFSET); 908 u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); 913 writel(mask, iommu->mmio_base + MMIO_STATUS_OFFSET); 937 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); 1022 writel(tail, iommu->mmio_base [all...] |
/linux-master/drivers/video/fbdev/ |
H A D | sm712fb.c | 1500 unsigned long mmio_base; local 1541 mmio_base = pci_resource_start(pdev, 0); 1551 sfb->fb->fix.mmio_start = mmio_base + 0x00400000; 1553 sfb->lfb = ioremap(mmio_base, mmio_addr); 1582 sfb->fb->fix.mmio_start = mmio_base; 1584 sfb->dp_regs = ioremap(mmio_base, 0x00200000 + smem_size);
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H A D | pxafb.c | 98 return __raw_readl(fbi->mmio_base + off); 104 __raw_writel(val, fbi->mmio_base + off); 2301 fbi->mmio_base = devm_platform_ioremap_resource(dev, 0); 2302 if (IS_ERR(fbi->mmio_base)) { 2304 ret = PTR_ERR(fbi->mmio_base);
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/linux-master/drivers/ufs/host/ |
H A D | ufs-renesas.c | 300 ret = readl_poll_timeout_atomic(hba->mmio_base + p->reg,
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/linux-master/drivers/thermal/intel/int340x_thermal/ |
H A D | processor_thermal_device.c | 375 proc_priv->mmio_base = pcim_iomap_table(pdev)[MCHBAR];
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_gmbus.c | 873 i915->display.gmbus.mmio_base = VLV_DISPLAY_BASE; 879 i915->display.gmbus.mmio_base = PCH_DISPLAY_BASE;
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/linux-master/drivers/pci/ |
H A D | quirks.c | 3928 void __iomem *mmio_base; local 3935 mmio_base = pci_iomap(dev, 0, 0); 3936 if (!mmio_base) 3939 iowrite32(0x00000002, mmio_base + MSG_CTL); 3947 iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2); 3949 val = ioread32(mmio_base + PCH_PP_CONTROL) & 0xfffffffe; 3950 iowrite32(val, mmio_base + PCH_PP_CONTROL); 3954 val = ioread32(mmio_base + PCH_PP_STATUS); 3962 iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE); 3964 pci_iounmap(dev, mmio_base); [all...] |
/linux-master/drivers/scsi/sym53c8xx_2/ |
H A D | sym_glue.c | 1334 np->mmio_ba = (u32)dev->mmio_base; 1562 device->mmio_base = bus_addr.start; 1577 if (device->mmio_base)
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/linux-master/drivers/gpu/drm/i915/gem/selftests/ |
H A D | i915_gem_context.c | 926 *cmd++ = i915_mmio_reg_offset(GEN8_R_PWR_CLK_STATE(engine->mmio_base)); 1617 const u32 GPR0 = engine->mmio_base + 0x600; 1652 const u32 reg = engine->mmio_base + 0x420;
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