| /linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | legacy_dpm.c | 314 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =
341 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
803 /* check if the vblank period is too short to adjust the mclk */
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| /linux-master/sound/soc/sunxi/ |
| H A D | sun4i-i2s.c | 78 #define SUN4I_I2S_CLK_DIV_MCLK(mclk) ((mclk) << 0)
162 * @field_clkdiv_mclk_en: regmap field to enable mclk output.
169 * @mclk_dividers: mclk dividers array
170 * @num_mclk_dividers: number of mclk dividers
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| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | radeon.h | 1276 u32 mclk; member in struct:radeon_pm_clock_info
1364 u32 mclk; member in struct:radeon_blacklist_clocks
1370 u32 mclk; member in struct:radeon_clock_and_voltage_limits
1410 u32 mclk; member in struct:radeon_phase_shedding_limits_entry
1524 u32 mclk; member in struct:radeon_vce_state
1586 /* write locked while reprogramming mclk */
1602 fixed20_12 mclk; member in struct:radeon_pm
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| H A D | r600_dpm.c | 974 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =
1003 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
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| H A D | radeon_mode.h | 609 u32 mclk[MAX_AC_TIMING_ENTRIES]; member in struct:atom_memory_clock_range_table
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| /linux-master/sound/soc/codecs/ |
| H A D | rt5659.c | 3438 ret = clk_set_rate(rt5659->mclk, freq);
3635 ret = clk_prepare_enable(rt5659->mclk);
3653 clk_disable_unprepare(rt5659->mclk);
4143 rt5659->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
4144 if (IS_ERR(rt5659->mclk))
4145 return PTR_ERR(rt5659->mclk);
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| H A D | madera.c | 198 return clk_prepare_enable(madera->mclk[clk_idx].clk);
200 clk_disable_unprepare(madera->mclk[clk_idx].clk);
3862 clk = madera->mclk[MADERA_MCLK1].clk;
3865 clk = madera->mclk[MADERA_MCLK2].clk;
3868 clk = madera->mclk[MADERA_MCLK3].clk;
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| H A D | cs47l92.c | 200 ret = clk_prepare_enable(madera->mclk[val].clk);
205 clk_disable_unprepare(madera->mclk[val].clk);
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| H A D | max98090.h | 1522 struct clk *mclk; member in struct:max98090_priv
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| H A D | msm8916-wcd-analog.c | 296 struct clk *mclk; member in struct:pm8916_wcd_analog_priv
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| H A D | da7218.h | 1395 struct clk *mclk; member in struct:da7218_priv
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| H A D | rt5682.c | 2717 * Whether the wclk's parent clk (mclk) exists or not, please ensure
2721 * It will set the codec anyway by assuming mclk is 48MHz.
2726 "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n",
2876 if (rt5682->mclk) {
2877 parent = __clk_get_hw(rt5682->mclk);
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| /linux-master/drivers/pinctrl/qcom/ |
| H A D | pinctrl-sm6375.c | 1183 MSM_PIN_FUNCTION(mclk),
1404 [93] = PINGROUP(93, mclk, lpass_ext, _, qdss_gpio9, atest_tsens2, wlan2_adc1, ddr_pxi3,
|
| H A D | pinctrl-sm6350.c | 1059 MSM_PIN_FUNCTION(mclk),
1253 [93] = PINGROUP(93, mclk, lpass_ext, _, qdss_gpio9, atest_tsens2,
|
| /linux-master/drivers/media/pci/cx88/ |
| H A D | cx88-dvb.c | 763 .mclk = 88000000UL,
979 .mclk = 88000000UL,
|
| /linux-master/drivers/gpu/drm/mediatek/ |
| H A D | mtk_hdmi.c | 620 enum hdmi_aud_mclk mclk)
627 switch (mclk) {
619 mtk_hdmi_hw_aud_set_mclk(struct mtk_hdmi *hdmi, enum hdmi_aud_mclk mclk) argument
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| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_kms.c | 957 vce_clk_table.entries[i].mclk = vce_state->mclk;
1048 /* get mclk in Mhz */
1121 /* get stable pstate mclk in Mhz */
1139 /* get peak pstate mclk in Mhz */
|
| /linux-master/drivers/media/i2c/ |
| H A D | hi847.c | 2796 u32 mclk; local
2803 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
2809 if (mclk != HI847_MCLK) {
2810 dev_err(dev, "external clock %d is not supported", mclk);
|
| /linux-master/drivers/media/platform/samsung/exynos4-is/ |
| H A D | fimc-is.c | 627 soe->mclk = 0;
|
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | hwmgr.h | 523 uint32_t mclk; member in struct:phm_clock_and_voltage_limits
|
| /linux-master/drivers/mmc/host/ |
| H A D | mtk-sd.c | 460 u32 mclk; /* mmc subsystem clock frequency */ member in struct:msdc_host
887 dev_dbg(host->dev, "set mclk to 0\n");
888 host->mclk = 0;
959 host->mclk = hz;
1942 if (host->mclk != ios->clock || host->timing != ios->timing)
|
| /linux-master/drivers/gpu/drm/amd/include/ |
| H A D | kgd_pp_interface.h | 43 u32 mclk; member in struct:amd_vce_state
|
| /linux-master/drivers/media/usb/dvb-usb-v2/ |
| H A D | anysee.c | 357 .mclk = 16000000,
|
| /linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | vegam_smumgr.c | 1002 "Failed to calculate mclk params.",
1086 uint32_t mclk, SMIO_Pattern *smio_pat)
1096 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {
1085 vegam_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, SMIO_Pattern *smio_pat) argument
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| /linux-master/drivers/media/pci/cx23885/ |
| H A D | cx23885-dvb.c | 485 .mclk = 16000000,
492 .mclk = 16000000,
|