1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org> 5 */ 6 7#include <linux/module.h> 8#include <linux/of.h> 9#include <linux/platform_device.h> 10 11#include "pinctrl-msm.h" 12 13#define REG_BASE 0x100000 14#define REG_SIZE 0x1000 15#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 16 { \ 17 .grp = PINCTRL_PINGROUP("gpio" #id, \ 18 gpio##id##_pins, \ 19 ARRAY_SIZE(gpio##id##_pins)), \ 20 .funcs = (int[]){ \ 21 msm_mux_gpio, /* gpio mode */ \ 22 msm_mux_##f1, \ 23 msm_mux_##f2, \ 24 msm_mux_##f3, \ 25 msm_mux_##f4, \ 26 msm_mux_##f5, \ 27 msm_mux_##f6, \ 28 msm_mux_##f7, \ 29 msm_mux_##f8, \ 30 msm_mux_##f9 \ 31 }, \ 32 .nfuncs = 10, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = REG_SIZE * id + 0x4, \ 35 .intr_cfg_reg = REG_SIZE * id + 0x8, \ 36 .intr_status_reg = REG_SIZE * id + 0xc, \ 37 .intr_target_reg = REG_SIZE * id + 0x8, \ 38 .mux_bit = 2, \ 39 .pull_bit = 0, \ 40 .drv_bit = 6, \ 41 .egpio_enable = 12, \ 42 .egpio_present = 11, \ 43 .oe_bit = 9, \ 44 .in_bit = 0, \ 45 .out_bit = 1, \ 46 .intr_enable_bit = 0, \ 47 .intr_status_bit = 0, \ 48 .intr_target_bit = 5, \ 49 .intr_target_kpss_val = 3, \ 50 .intr_raw_status_bit = 4, \ 51 .intr_polarity_bit = 1, \ 52 .intr_detection_bit = 2, \ 53 .intr_detection_width = 2, \ 54 } 55 56#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 57 { \ 58 .grp = PINCTRL_PINGROUP(#pg_name, \ 59 pg_name##_pins, \ 60 ARRAY_SIZE(pg_name##_pins)), \ 61 .ctl_reg = ctl, \ 62 .io_reg = 0, \ 63 .intr_cfg_reg = 0, \ 64 .intr_status_reg = 0, \ 65 .intr_target_reg = 0, \ 66 .mux_bit = -1, \ 67 .pull_bit = pull, \ 68 .drv_bit = drv, \ 69 .oe_bit = -1, \ 70 .in_bit = -1, \ 71 .out_bit = -1, \ 72 .intr_enable_bit = -1, \ 73 .intr_status_bit = -1, \ 74 .intr_target_bit = -1, \ 75 .intr_raw_status_bit = -1, \ 76 .intr_polarity_bit = -1, \ 77 .intr_detection_bit = -1, \ 78 .intr_detection_width = -1, \ 79 } 80 81#define UFS_RESET(pg_name, offset) \ 82 { \ 83 .grp = PINCTRL_PINGROUP(#pg_name, \ 84 pg_name##_pins, \ 85 ARRAY_SIZE(pg_name##_pins)), \ 86 .ctl_reg = offset, \ 87 .io_reg = offset + 0x4, \ 88 .intr_cfg_reg = 0, \ 89 .intr_status_reg = 0, \ 90 .intr_target_reg = 0, \ 91 .mux_bit = -1, \ 92 .pull_bit = 3, \ 93 .drv_bit = 0, \ 94 .oe_bit = -1, \ 95 .in_bit = -1, \ 96 .out_bit = 0, \ 97 .intr_enable_bit = -1, \ 98 .intr_status_bit = -1, \ 99 .intr_target_bit = -1, \ 100 .intr_raw_status_bit = -1, \ 101 .intr_polarity_bit = -1, \ 102 .intr_detection_bit = -1, \ 103 .intr_detection_width = -1, \ 104 } 105 106static const struct pinctrl_pin_desc sm6375_pins[] = { 107 PINCTRL_PIN(0, "GPIO_0"), 108 PINCTRL_PIN(1, "GPIO_1"), 109 PINCTRL_PIN(2, "GPIO_2"), 110 PINCTRL_PIN(3, "GPIO_3"), 111 PINCTRL_PIN(4, "GPIO_4"), 112 PINCTRL_PIN(5, "GPIO_5"), 113 PINCTRL_PIN(6, "GPIO_6"), 114 PINCTRL_PIN(7, "GPIO_7"), 115 PINCTRL_PIN(8, "GPIO_8"), 116 PINCTRL_PIN(9, "GPIO_9"), 117 PINCTRL_PIN(10, "GPIO_10"), 118 PINCTRL_PIN(11, "GPIO_11"), 119 PINCTRL_PIN(12, "GPIO_12"), 120 PINCTRL_PIN(13, "GPIO_13"), 121 PINCTRL_PIN(14, "GPIO_14"), 122 PINCTRL_PIN(15, "GPIO_15"), 123 PINCTRL_PIN(16, "GPIO_16"), 124 PINCTRL_PIN(17, "GPIO_17"), 125 PINCTRL_PIN(18, "GPIO_18"), 126 PINCTRL_PIN(19, "GPIO_19"), 127 PINCTRL_PIN(20, "GPIO_20"), 128 PINCTRL_PIN(21, "GPIO_21"), 129 PINCTRL_PIN(22, "GPIO_22"), 130 PINCTRL_PIN(23, "GPIO_23"), 131 PINCTRL_PIN(24, "GPIO_24"), 132 PINCTRL_PIN(25, "GPIO_25"), 133 PINCTRL_PIN(26, "GPIO_26"), 134 PINCTRL_PIN(27, "GPIO_27"), 135 PINCTRL_PIN(28, "GPIO_28"), 136 PINCTRL_PIN(29, "GPIO_29"), 137 PINCTRL_PIN(30, "GPIO_30"), 138 PINCTRL_PIN(31, "GPIO_31"), 139 PINCTRL_PIN(32, "GPIO_32"), 140 PINCTRL_PIN(33, "GPIO_33"), 141 PINCTRL_PIN(34, "GPIO_34"), 142 PINCTRL_PIN(35, "GPIO_35"), 143 PINCTRL_PIN(36, "GPIO_36"), 144 PINCTRL_PIN(37, "GPIO_37"), 145 PINCTRL_PIN(38, "GPIO_38"), 146 PINCTRL_PIN(39, "GPIO_39"), 147 PINCTRL_PIN(40, "GPIO_40"), 148 PINCTRL_PIN(41, "GPIO_41"), 149 PINCTRL_PIN(42, "GPIO_42"), 150 PINCTRL_PIN(43, "GPIO_43"), 151 PINCTRL_PIN(44, "GPIO_44"), 152 PINCTRL_PIN(45, "GPIO_45"), 153 PINCTRL_PIN(46, "GPIO_46"), 154 PINCTRL_PIN(47, "GPIO_47"), 155 PINCTRL_PIN(48, "GPIO_48"), 156 PINCTRL_PIN(49, "GPIO_49"), 157 PINCTRL_PIN(50, "GPIO_50"), 158 PINCTRL_PIN(51, "GPIO_51"), 159 PINCTRL_PIN(52, "GPIO_52"), 160 PINCTRL_PIN(53, "GPIO_53"), 161 PINCTRL_PIN(54, "GPIO_54"), 162 PINCTRL_PIN(55, "GPIO_55"), 163 PINCTRL_PIN(56, "GPIO_56"), 164 PINCTRL_PIN(57, "GPIO_57"), 165 PINCTRL_PIN(58, "GPIO_58"), 166 PINCTRL_PIN(59, "GPIO_59"), 167 PINCTRL_PIN(60, "GPIO_60"), 168 PINCTRL_PIN(61, "GPIO_61"), 169 PINCTRL_PIN(62, "GPIO_62"), 170 PINCTRL_PIN(63, "GPIO_63"), 171 PINCTRL_PIN(64, "GPIO_64"), 172 PINCTRL_PIN(65, "GPIO_65"), 173 PINCTRL_PIN(66, "GPIO_66"), 174 PINCTRL_PIN(67, "GPIO_67"), 175 PINCTRL_PIN(68, "GPIO_68"), 176 PINCTRL_PIN(69, "GPIO_69"), 177 PINCTRL_PIN(70, "GPIO_70"), 178 PINCTRL_PIN(71, "GPIO_71"), 179 PINCTRL_PIN(72, "GPIO_72"), 180 PINCTRL_PIN(73, "GPIO_73"), 181 PINCTRL_PIN(74, "GPIO_74"), 182 PINCTRL_PIN(75, "GPIO_75"), 183 PINCTRL_PIN(76, "GPIO_76"), 184 PINCTRL_PIN(77, "GPIO_77"), 185 PINCTRL_PIN(78, "GPIO_78"), 186 PINCTRL_PIN(79, "GPIO_79"), 187 PINCTRL_PIN(80, "GPIO_80"), 188 PINCTRL_PIN(81, "GPIO_81"), 189 PINCTRL_PIN(82, "GPIO_82"), 190 PINCTRL_PIN(83, "GPIO_83"), 191 PINCTRL_PIN(84, "GPIO_84"), 192 PINCTRL_PIN(85, "GPIO_85"), 193 PINCTRL_PIN(86, "GPIO_86"), 194 PINCTRL_PIN(87, "GPIO_87"), 195 PINCTRL_PIN(88, "GPIO_88"), 196 PINCTRL_PIN(89, "GPIO_89"), 197 PINCTRL_PIN(90, "GPIO_90"), 198 PINCTRL_PIN(91, "GPIO_91"), 199 PINCTRL_PIN(92, "GPIO_92"), 200 PINCTRL_PIN(93, "GPIO_93"), 201 PINCTRL_PIN(94, "GPIO_94"), 202 PINCTRL_PIN(95, "GPIO_95"), 203 PINCTRL_PIN(96, "GPIO_96"), 204 PINCTRL_PIN(97, "GPIO_97"), 205 PINCTRL_PIN(98, "GPIO_98"), 206 PINCTRL_PIN(99, "GPIO_99"), 207 PINCTRL_PIN(100, "GPIO_100"), 208 PINCTRL_PIN(101, "GPIO_101"), 209 PINCTRL_PIN(102, "GPIO_102"), 210 PINCTRL_PIN(103, "GPIO_103"), 211 PINCTRL_PIN(104, "GPIO_104"), 212 PINCTRL_PIN(105, "GPIO_105"), 213 PINCTRL_PIN(106, "GPIO_106"), 214 PINCTRL_PIN(107, "GPIO_107"), 215 PINCTRL_PIN(108, "GPIO_108"), 216 PINCTRL_PIN(109, "GPIO_109"), 217 PINCTRL_PIN(110, "GPIO_110"), 218 PINCTRL_PIN(111, "GPIO_111"), 219 PINCTRL_PIN(112, "GPIO_112"), 220 PINCTRL_PIN(113, "GPIO_113"), 221 PINCTRL_PIN(114, "GPIO_114"), 222 PINCTRL_PIN(115, "GPIO_115"), 223 PINCTRL_PIN(116, "GPIO_116"), 224 PINCTRL_PIN(117, "GPIO_117"), 225 PINCTRL_PIN(118, "GPIO_118"), 226 PINCTRL_PIN(119, "GPIO_119"), 227 PINCTRL_PIN(120, "GPIO_120"), 228 PINCTRL_PIN(121, "GPIO_121"), 229 PINCTRL_PIN(122, "GPIO_122"), 230 PINCTRL_PIN(123, "GPIO_123"), 231 PINCTRL_PIN(124, "GPIO_124"), 232 PINCTRL_PIN(125, "GPIO_125"), 233 PINCTRL_PIN(126, "GPIO_126"), 234 PINCTRL_PIN(127, "GPIO_127"), 235 PINCTRL_PIN(128, "GPIO_128"), 236 PINCTRL_PIN(129, "GPIO_129"), 237 PINCTRL_PIN(130, "GPIO_130"), 238 PINCTRL_PIN(131, "GPIO_131"), 239 PINCTRL_PIN(132, "GPIO_132"), 240 PINCTRL_PIN(133, "GPIO_133"), 241 PINCTRL_PIN(134, "GPIO_134"), 242 PINCTRL_PIN(135, "GPIO_135"), 243 PINCTRL_PIN(136, "GPIO_136"), 244 PINCTRL_PIN(137, "GPIO_137"), 245 PINCTRL_PIN(138, "GPIO_138"), 246 PINCTRL_PIN(139, "GPIO_139"), 247 PINCTRL_PIN(140, "GPIO_140"), 248 PINCTRL_PIN(141, "GPIO_141"), 249 PINCTRL_PIN(142, "GPIO_142"), 250 PINCTRL_PIN(143, "GPIO_143"), 251 PINCTRL_PIN(144, "GPIO_144"), 252 PINCTRL_PIN(145, "GPIO_145"), 253 PINCTRL_PIN(146, "GPIO_146"), 254 PINCTRL_PIN(147, "GPIO_147"), 255 PINCTRL_PIN(148, "GPIO_148"), 256 PINCTRL_PIN(149, "GPIO_149"), 257 PINCTRL_PIN(150, "GPIO_150"), 258 PINCTRL_PIN(151, "GPIO_151"), 259 PINCTRL_PIN(152, "GPIO_152"), 260 PINCTRL_PIN(153, "GPIO_153"), 261 PINCTRL_PIN(154, "GPIO_154"), 262 PINCTRL_PIN(155, "GPIO_155"), 263 PINCTRL_PIN(156, "UFS_RESET"), 264 PINCTRL_PIN(157, "SDC1_RCLK"), 265 PINCTRL_PIN(158, "SDC1_CLK"), 266 PINCTRL_PIN(159, "SDC1_CMD"), 267 PINCTRL_PIN(160, "SDC1_DATA"), 268 PINCTRL_PIN(161, "SDC2_CLK"), 269 PINCTRL_PIN(162, "SDC2_CMD"), 270 PINCTRL_PIN(163, "SDC2_DATA"), 271}; 272 273#define DECLARE_MSM_GPIO_PINS(pin) \ 274 static const unsigned int gpio##pin##_pins[] = { pin } 275DECLARE_MSM_GPIO_PINS(0); 276DECLARE_MSM_GPIO_PINS(1); 277DECLARE_MSM_GPIO_PINS(2); 278DECLARE_MSM_GPIO_PINS(3); 279DECLARE_MSM_GPIO_PINS(4); 280DECLARE_MSM_GPIO_PINS(5); 281DECLARE_MSM_GPIO_PINS(6); 282DECLARE_MSM_GPIO_PINS(7); 283DECLARE_MSM_GPIO_PINS(8); 284DECLARE_MSM_GPIO_PINS(9); 285DECLARE_MSM_GPIO_PINS(10); 286DECLARE_MSM_GPIO_PINS(11); 287DECLARE_MSM_GPIO_PINS(12); 288DECLARE_MSM_GPIO_PINS(13); 289DECLARE_MSM_GPIO_PINS(14); 290DECLARE_MSM_GPIO_PINS(15); 291DECLARE_MSM_GPIO_PINS(16); 292DECLARE_MSM_GPIO_PINS(17); 293DECLARE_MSM_GPIO_PINS(18); 294DECLARE_MSM_GPIO_PINS(19); 295DECLARE_MSM_GPIO_PINS(20); 296DECLARE_MSM_GPIO_PINS(21); 297DECLARE_MSM_GPIO_PINS(22); 298DECLARE_MSM_GPIO_PINS(23); 299DECLARE_MSM_GPIO_PINS(24); 300DECLARE_MSM_GPIO_PINS(25); 301DECLARE_MSM_GPIO_PINS(26); 302DECLARE_MSM_GPIO_PINS(27); 303DECLARE_MSM_GPIO_PINS(28); 304DECLARE_MSM_GPIO_PINS(29); 305DECLARE_MSM_GPIO_PINS(30); 306DECLARE_MSM_GPIO_PINS(31); 307DECLARE_MSM_GPIO_PINS(32); 308DECLARE_MSM_GPIO_PINS(33); 309DECLARE_MSM_GPIO_PINS(34); 310DECLARE_MSM_GPIO_PINS(35); 311DECLARE_MSM_GPIO_PINS(36); 312DECLARE_MSM_GPIO_PINS(37); 313DECLARE_MSM_GPIO_PINS(38); 314DECLARE_MSM_GPIO_PINS(39); 315DECLARE_MSM_GPIO_PINS(40); 316DECLARE_MSM_GPIO_PINS(41); 317DECLARE_MSM_GPIO_PINS(42); 318DECLARE_MSM_GPIO_PINS(43); 319DECLARE_MSM_GPIO_PINS(44); 320DECLARE_MSM_GPIO_PINS(45); 321DECLARE_MSM_GPIO_PINS(46); 322DECLARE_MSM_GPIO_PINS(47); 323DECLARE_MSM_GPIO_PINS(48); 324DECLARE_MSM_GPIO_PINS(49); 325DECLARE_MSM_GPIO_PINS(50); 326DECLARE_MSM_GPIO_PINS(51); 327DECLARE_MSM_GPIO_PINS(52); 328DECLARE_MSM_GPIO_PINS(53); 329DECLARE_MSM_GPIO_PINS(54); 330DECLARE_MSM_GPIO_PINS(55); 331DECLARE_MSM_GPIO_PINS(56); 332DECLARE_MSM_GPIO_PINS(57); 333DECLARE_MSM_GPIO_PINS(58); 334DECLARE_MSM_GPIO_PINS(59); 335DECLARE_MSM_GPIO_PINS(60); 336DECLARE_MSM_GPIO_PINS(61); 337DECLARE_MSM_GPIO_PINS(62); 338DECLARE_MSM_GPIO_PINS(63); 339DECLARE_MSM_GPIO_PINS(64); 340DECLARE_MSM_GPIO_PINS(65); 341DECLARE_MSM_GPIO_PINS(66); 342DECLARE_MSM_GPIO_PINS(67); 343DECLARE_MSM_GPIO_PINS(68); 344DECLARE_MSM_GPIO_PINS(69); 345DECLARE_MSM_GPIO_PINS(70); 346DECLARE_MSM_GPIO_PINS(71); 347DECLARE_MSM_GPIO_PINS(72); 348DECLARE_MSM_GPIO_PINS(73); 349DECLARE_MSM_GPIO_PINS(74); 350DECLARE_MSM_GPIO_PINS(75); 351DECLARE_MSM_GPIO_PINS(76); 352DECLARE_MSM_GPIO_PINS(77); 353DECLARE_MSM_GPIO_PINS(78); 354DECLARE_MSM_GPIO_PINS(79); 355DECLARE_MSM_GPIO_PINS(80); 356DECLARE_MSM_GPIO_PINS(81); 357DECLARE_MSM_GPIO_PINS(82); 358DECLARE_MSM_GPIO_PINS(83); 359DECLARE_MSM_GPIO_PINS(84); 360DECLARE_MSM_GPIO_PINS(85); 361DECLARE_MSM_GPIO_PINS(86); 362DECLARE_MSM_GPIO_PINS(87); 363DECLARE_MSM_GPIO_PINS(88); 364DECLARE_MSM_GPIO_PINS(89); 365DECLARE_MSM_GPIO_PINS(90); 366DECLARE_MSM_GPIO_PINS(91); 367DECLARE_MSM_GPIO_PINS(92); 368DECLARE_MSM_GPIO_PINS(93); 369DECLARE_MSM_GPIO_PINS(94); 370DECLARE_MSM_GPIO_PINS(95); 371DECLARE_MSM_GPIO_PINS(96); 372DECLARE_MSM_GPIO_PINS(97); 373DECLARE_MSM_GPIO_PINS(98); 374DECLARE_MSM_GPIO_PINS(99); 375DECLARE_MSM_GPIO_PINS(100); 376DECLARE_MSM_GPIO_PINS(101); 377DECLARE_MSM_GPIO_PINS(102); 378DECLARE_MSM_GPIO_PINS(103); 379DECLARE_MSM_GPIO_PINS(104); 380DECLARE_MSM_GPIO_PINS(105); 381DECLARE_MSM_GPIO_PINS(106); 382DECLARE_MSM_GPIO_PINS(107); 383DECLARE_MSM_GPIO_PINS(108); 384DECLARE_MSM_GPIO_PINS(109); 385DECLARE_MSM_GPIO_PINS(110); 386DECLARE_MSM_GPIO_PINS(111); 387DECLARE_MSM_GPIO_PINS(112); 388DECLARE_MSM_GPIO_PINS(113); 389DECLARE_MSM_GPIO_PINS(114); 390DECLARE_MSM_GPIO_PINS(115); 391DECLARE_MSM_GPIO_PINS(116); 392DECLARE_MSM_GPIO_PINS(117); 393DECLARE_MSM_GPIO_PINS(118); 394DECLARE_MSM_GPIO_PINS(119); 395DECLARE_MSM_GPIO_PINS(120); 396DECLARE_MSM_GPIO_PINS(121); 397DECLARE_MSM_GPIO_PINS(122); 398DECLARE_MSM_GPIO_PINS(123); 399DECLARE_MSM_GPIO_PINS(124); 400DECLARE_MSM_GPIO_PINS(125); 401DECLARE_MSM_GPIO_PINS(126); 402DECLARE_MSM_GPIO_PINS(127); 403DECLARE_MSM_GPIO_PINS(128); 404DECLARE_MSM_GPIO_PINS(129); 405DECLARE_MSM_GPIO_PINS(130); 406DECLARE_MSM_GPIO_PINS(131); 407DECLARE_MSM_GPIO_PINS(132); 408DECLARE_MSM_GPIO_PINS(133); 409DECLARE_MSM_GPIO_PINS(134); 410DECLARE_MSM_GPIO_PINS(135); 411DECLARE_MSM_GPIO_PINS(136); 412DECLARE_MSM_GPIO_PINS(137); 413DECLARE_MSM_GPIO_PINS(138); 414DECLARE_MSM_GPIO_PINS(139); 415DECLARE_MSM_GPIO_PINS(140); 416DECLARE_MSM_GPIO_PINS(141); 417DECLARE_MSM_GPIO_PINS(142); 418DECLARE_MSM_GPIO_PINS(143); 419DECLARE_MSM_GPIO_PINS(144); 420DECLARE_MSM_GPIO_PINS(145); 421DECLARE_MSM_GPIO_PINS(146); 422DECLARE_MSM_GPIO_PINS(147); 423DECLARE_MSM_GPIO_PINS(148); 424DECLARE_MSM_GPIO_PINS(149); 425DECLARE_MSM_GPIO_PINS(150); 426DECLARE_MSM_GPIO_PINS(151); 427DECLARE_MSM_GPIO_PINS(152); 428DECLARE_MSM_GPIO_PINS(153); 429DECLARE_MSM_GPIO_PINS(154); 430DECLARE_MSM_GPIO_PINS(155); 431 432 433static const unsigned int sdc1_rclk_pins[] = { 157 }; 434static const unsigned int sdc1_clk_pins[] = { 158 }; 435static const unsigned int sdc1_cmd_pins[] = { 159 }; 436static const unsigned int sdc1_data_pins[] = { 160 }; 437static const unsigned int sdc2_clk_pins[] = { 161 }; 438static const unsigned int sdc2_cmd_pins[] = { 162 }; 439static const unsigned int sdc2_data_pins[] = { 163 }; 440static const unsigned int ufs_reset_pins[] = { 156 }; 441 442enum sm6375_functions { 443 msm_mux_adsp_ext, 444 msm_mux_agera_pll, 445 msm_mux_atest_char, 446 msm_mux_atest_char0, 447 msm_mux_atest_char1, 448 msm_mux_atest_char2, 449 msm_mux_atest_char3, 450 msm_mux_atest_tsens, 451 msm_mux_atest_tsens2, 452 msm_mux_atest_usb1, 453 msm_mux_atest_usb10, 454 msm_mux_atest_usb11, 455 msm_mux_atest_usb12, 456 msm_mux_atest_usb13, 457 msm_mux_atest_usb2, 458 msm_mux_atest_usb20, 459 msm_mux_atest_usb21, 460 msm_mux_atest_usb22, 461 msm_mux_atest_usb23, 462 msm_mux_audio_ref, 463 msm_mux_btfm_slimbus, 464 msm_mux_cam_mclk, 465 msm_mux_cci_async, 466 msm_mux_cci_i2c, 467 msm_mux_cci_timer0, 468 msm_mux_cci_timer1, 469 msm_mux_cci_timer2, 470 msm_mux_cci_timer3, 471 msm_mux_cci_timer4, 472 msm_mux_cri_trng, 473 msm_mux_dbg_out, 474 msm_mux_ddr_bist, 475 msm_mux_ddr_pxi0, 476 msm_mux_ddr_pxi1, 477 msm_mux_ddr_pxi2, 478 msm_mux_ddr_pxi3, 479 msm_mux_dp_hot, 480 msm_mux_edp_lcd, 481 msm_mux_gcc_gp1, 482 msm_mux_gcc_gp2, 483 msm_mux_gcc_gp3, 484 msm_mux_gp_pdm0, 485 msm_mux_gp_pdm1, 486 msm_mux_gp_pdm2, 487 msm_mux_gpio, 488 msm_mux_gps_tx, 489 msm_mux_ibi_i3c, 490 msm_mux_jitter_bist, 491 msm_mux_ldo_en, 492 msm_mux_ldo_update, 493 msm_mux_lpass_ext, 494 msm_mux_m_voc, 495 msm_mux_mclk, 496 msm_mux_mdp_vsync, 497 msm_mux_mdp_vsync0, 498 msm_mux_mdp_vsync1, 499 msm_mux_mdp_vsync2, 500 msm_mux_mdp_vsync3, 501 msm_mux_mi2s_0, 502 msm_mux_mi2s_1, 503 msm_mux_mi2s_2, 504 msm_mux_mss_lte, 505 msm_mux_nav_gpio, 506 msm_mux_nav_pps, 507 msm_mux_pa_indicator, 508 msm_mux_phase_flag0, 509 msm_mux_phase_flag1, 510 msm_mux_phase_flag10, 511 msm_mux_phase_flag11, 512 msm_mux_phase_flag12, 513 msm_mux_phase_flag13, 514 msm_mux_phase_flag14, 515 msm_mux_phase_flag15, 516 msm_mux_phase_flag16, 517 msm_mux_phase_flag17, 518 msm_mux_phase_flag18, 519 msm_mux_phase_flag19, 520 msm_mux_phase_flag2, 521 msm_mux_phase_flag20, 522 msm_mux_phase_flag21, 523 msm_mux_phase_flag22, 524 msm_mux_phase_flag23, 525 msm_mux_phase_flag24, 526 msm_mux_phase_flag25, 527 msm_mux_phase_flag26, 528 msm_mux_phase_flag27, 529 msm_mux_phase_flag28, 530 msm_mux_phase_flag29, 531 msm_mux_phase_flag3, 532 msm_mux_phase_flag30, 533 msm_mux_phase_flag31, 534 msm_mux_phase_flag4, 535 msm_mux_phase_flag5, 536 msm_mux_phase_flag6, 537 msm_mux_phase_flag7, 538 msm_mux_phase_flag8, 539 msm_mux_phase_flag9, 540 msm_mux_pll_bist, 541 msm_mux_pll_bypassnl, 542 msm_mux_pll_clk, 543 msm_mux_pll_reset, 544 msm_mux_prng_rosc0, 545 msm_mux_prng_rosc1, 546 msm_mux_prng_rosc2, 547 msm_mux_prng_rosc3, 548 msm_mux_qdss_cti, 549 msm_mux_qdss_gpio, 550 msm_mux_qdss_gpio0, 551 msm_mux_qdss_gpio1, 552 msm_mux_qdss_gpio10, 553 msm_mux_qdss_gpio11, 554 msm_mux_qdss_gpio12, 555 msm_mux_qdss_gpio13, 556 msm_mux_qdss_gpio14, 557 msm_mux_qdss_gpio15, 558 msm_mux_qdss_gpio2, 559 msm_mux_qdss_gpio3, 560 msm_mux_qdss_gpio4, 561 msm_mux_qdss_gpio5, 562 msm_mux_qdss_gpio6, 563 msm_mux_qdss_gpio7, 564 msm_mux_qdss_gpio8, 565 msm_mux_qdss_gpio9, 566 msm_mux_qlink0_enable, 567 msm_mux_qlink0_request, 568 msm_mux_qlink0_wmss, 569 msm_mux_qlink1_enable, 570 msm_mux_qlink1_request, 571 msm_mux_qlink1_wmss, 572 msm_mux_qup00, 573 msm_mux_qup01, 574 msm_mux_qup02, 575 msm_mux_qup10, 576 msm_mux_qup11_f1, 577 msm_mux_qup11_f2, 578 msm_mux_qup12, 579 msm_mux_qup13_f1, 580 msm_mux_qup13_f2, 581 msm_mux_qup14, 582 msm_mux_sd_write, 583 msm_mux_sdc1_tb, 584 msm_mux_sdc2_tb, 585 msm_mux_sp_cmu, 586 msm_mux_tgu_ch0, 587 msm_mux_tgu_ch1, 588 msm_mux_tgu_ch2, 589 msm_mux_tgu_ch3, 590 msm_mux_tsense_pwm1, 591 msm_mux_tsense_pwm2, 592 msm_mux_uim1_clk, 593 msm_mux_uim1_data, 594 msm_mux_uim1_present, 595 msm_mux_uim1_reset, 596 msm_mux_uim2_clk, 597 msm_mux_uim2_data, 598 msm_mux_uim2_present, 599 msm_mux_uim2_reset, 600 msm_mux_usb2phy_ac, 601 msm_mux_usb_phy, 602 msm_mux_vfr_1, 603 msm_mux_vsense_trigger, 604 msm_mux_wlan1_adc0, 605 msm_mux_wlan1_adc1, 606 msm_mux_wlan2_adc0, 607 msm_mux_wlan2_adc1, 608 msm_mux__, 609}; 610 611static const char * const gpio_groups[] = { 612 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 613 "gpio8", "gpio9", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", 614 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", 615 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 616 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio36", 617 "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", 618 "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50", 619 "gpio51", "gpio52", "gpio53", "gpio56", "gpio57", "gpio58", "gpio59", 620 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", "gpio66", 621 "gpio67", "gpio68", "gpio69", "gpio75", "gpio76", "gpio77", "gpio78", 622 "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", "gpio85", 623 "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92", 624 "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", "gpio99", 625 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", 626 "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", "gpio111", 627 "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", "gpio117", 628 "gpio118", "gpio119", "gpio120", "gpio124", "gpio125", "gpio126", 629 "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", 630 "gpio133", "gpio134", "gpio135", "gpio136", "gpio141", "gpio142", 631 "gpio143", "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", 632 "gpio155", 633}; 634static const char * const agera_pll_groups[] = { 635 "gpio89", 636}; 637static const char * const cci_async_groups[] = { 638 "gpio35", "gpio36", "gpio48", "gpio52", "gpio53", 639}; 640static const char * const cci_i2c_groups[] = { 641 "gpio2", "gpio3", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", 642 "gpio44", 643}; 644static const char * const gps_tx_groups[] = { 645 "gpio101", "gpio102", "gpio107", "gpio108", 646}; 647static const char * const gp_pdm0_groups[] = { 648 "gpio37", "gpio68", 649}; 650static const char * const gp_pdm1_groups[] = { 651 "gpio8", "gpio52", 652}; 653static const char * const gp_pdm2_groups[] = { 654 "gpio57", 655}; 656static const char * const jitter_bist_groups[] = { 657 "gpio90", 658}; 659static const char * const mclk_groups[] = { 660 "gpio93", 661}; 662static const char * const mdp_vsync_groups[] = { 663 "gpio6", "gpio23", "gpio24", "gpio27", "gpio28", 664}; 665static const char * const mss_lte_groups[] = { 666 "gpio65", "gpio66", 667}; 668static const char * const nav_pps_groups[] = { 669 "gpio101", "gpio101", "gpio102", "gpio102", 670}; 671static const char * const pll_bist_groups[] = { 672 "gpio27", 673}; 674static const char * const qlink0_wmss_groups[] = { 675 "gpio103", 676}; 677static const char * const qlink1_wmss_groups[] = { 678 "gpio106", 679}; 680static const char * const usb_phy_groups[] = { 681 "gpio124", 682}; 683static const char * const adsp_ext_groups[] = { 684 "gpio87", 685}; 686static const char * const atest_char_groups[] = { 687 "gpio95", 688}; 689static const char * const atest_char0_groups[] = { 690 "gpio96", 691}; 692static const char * const atest_char1_groups[] = { 693 "gpio97", 694}; 695static const char * const atest_char2_groups[] = { 696 "gpio98", 697}; 698static const char * const atest_char3_groups[] = { 699 "gpio99", 700}; 701static const char * const atest_tsens_groups[] = { 702 "gpio92", 703}; 704static const char * const atest_tsens2_groups[] = { 705 "gpio93", 706}; 707static const char * const atest_usb1_groups[] = { 708 "gpio83", 709}; 710static const char * const atest_usb10_groups[] = { 711 "gpio84", 712}; 713static const char * const atest_usb11_groups[] = { 714 "gpio85", 715}; 716static const char * const atest_usb12_groups[] = { 717 "gpio86", 718}; 719static const char * const atest_usb13_groups[] = { 720 "gpio87", 721}; 722static const char * const atest_usb2_groups[] = { 723 "gpio88", 724}; 725static const char * const atest_usb20_groups[] = { 726 "gpio89", 727}; 728static const char * const atest_usb21_groups[] = { 729 "gpio90", 730}; 731static const char * const atest_usb22_groups[] = { 732 "gpio91", 733}; 734static const char * const atest_usb23_groups[] = { 735 "gpio92", 736}; 737static const char * const audio_ref_groups[] = { 738 "gpio60", 739}; 740static const char * const btfm_slimbus_groups[] = { 741 "gpio67", "gpio68", "gpio86", "gpio87", 742}; 743static const char * const cam_mclk_groups[] = { 744 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 745}; 746static const char * const cci_timer0_groups[] = { 747 "gpio34", 748}; 749static const char * const cci_timer1_groups[] = { 750 "gpio35", 751}; 752static const char * const cci_timer2_groups[] = { 753 "gpio36", 754}; 755static const char * const cci_timer3_groups[] = { 756 "gpio37", 757}; 758static const char * const cci_timer4_groups[] = { 759 "gpio38", 760}; 761static const char * const cri_trng_groups[] = { 762 "gpio0", "gpio1", "gpio2", 763}; 764static const char * const dbg_out_groups[] = { 765 "gpio3", 766}; 767static const char * const ddr_bist_groups[] = { 768 "gpio19", "gpio20", "gpio21", "gpio22", 769}; 770static const char * const ddr_pxi0_groups[] = { 771 "gpio86", "gpio90", 772}; 773static const char * const ddr_pxi1_groups[] = { 774 "gpio87", "gpio91", 775}; 776static const char * const ddr_pxi2_groups[] = { 777 "gpio88", "gpio92", 778}; 779static const char * const ddr_pxi3_groups[] = { 780 "gpio89", "gpio93", 781}; 782static const char * const dp_hot_groups[] = { 783 "gpio12", "gpio118", 784}; 785static const char * const edp_lcd_groups[] = { 786 "gpio23", 787}; 788static const char * const gcc_gp1_groups[] = { 789 "gpio48", "gpio58", 790}; 791static const char * const gcc_gp2_groups[] = { 792 "gpio21", 793}; 794static const char * const gcc_gp3_groups[] = { 795 "gpio22", 796}; 797static const char * const ibi_i3c_groups[] = { 798 "gpio0", "gpio1", 799}; 800static const char * const ldo_en_groups[] = { 801 "gpio95", 802}; 803static const char * const ldo_update_groups[] = { 804 "gpio96", 805}; 806static const char * const lpass_ext_groups[] = { 807 "gpio60", "gpio93", 808}; 809static const char * const m_voc_groups[] = { 810 "gpio12", 811}; 812static const char * const mdp_vsync0_groups[] = { 813 "gpio47", 814}; 815static const char * const mdp_vsync1_groups[] = { 816 "gpio48", 817}; 818static const char * const mdp_vsync2_groups[] = { 819 "gpio56", 820}; 821static const char * const mdp_vsync3_groups[] = { 822 "gpio57", 823}; 824static const char * const mi2s_0_groups[] = { 825 "gpio88", "gpio89", "gpio90", "gpio91", 826}; 827static const char * const mi2s_1_groups[] = { 828 "gpio67", "gpio68", "gpio86", "gpio87", 829}; 830static const char * const mi2s_2_groups[] = { 831 "gpio60", 832}; 833static const char * const nav_gpio_groups[] = { 834 "gpio101", "gpio102", 835}; 836static const char * const pa_indicator_groups[] = { 837 "gpio118", 838}; 839static const char * const phase_flag0_groups[] = { 840 "gpio12", 841}; 842static const char * const phase_flag1_groups[] = { 843 "gpio17", 844}; 845static const char * const phase_flag10_groups[] = { 846 "gpio41", 847}; 848static const char * const phase_flag11_groups[] = { 849 "gpio42", 850}; 851static const char * const phase_flag12_groups[] = { 852 "gpio43", 853}; 854static const char * const phase_flag13_groups[] = { 855 "gpio44", 856}; 857static const char * const phase_flag14_groups[] = { 858 "gpio45", 859}; 860static const char * const phase_flag15_groups[] = { 861 "gpio46", 862}; 863static const char * const phase_flag16_groups[] = { 864 "gpio47", 865}; 866static const char * const phase_flag17_groups[] = { 867 "gpio48", 868}; 869static const char * const phase_flag18_groups[] = { 870 "gpio49", 871}; 872static const char * const phase_flag19_groups[] = { 873 "gpio50", 874}; 875static const char * const phase_flag2_groups[] = { 876 "gpio18", 877}; 878static const char * const phase_flag20_groups[] = { 879 "gpio51", 880}; 881static const char * const phase_flag21_groups[] = { 882 "gpio52", 883}; 884static const char * const phase_flag22_groups[] = { 885 "gpio53", 886}; 887static const char * const phase_flag23_groups[] = { 888 "gpio56", 889}; 890static const char * const phase_flag24_groups[] = { 891 "gpio57", 892}; 893static const char * const phase_flag25_groups[] = { 894 "gpio60", 895}; 896static const char * const phase_flag26_groups[] = { 897 "gpio61", 898}; 899static const char * const phase_flag27_groups[] = { 900 "gpio62", 901}; 902static const char * const phase_flag28_groups[] = { 903 "gpio63", 904}; 905static const char * const phase_flag29_groups[] = { 906 "gpio64", 907}; 908static const char * const phase_flag3_groups[] = { 909 "gpio34", 910}; 911static const char * const phase_flag30_groups[] = { 912 "gpio67", 913}; 914static const char * const phase_flag31_groups[] = { 915 "gpio68", 916}; 917static const char * const phase_flag4_groups[] = { 918 "gpio35", 919}; 920static const char * const phase_flag5_groups[] = { 921 "gpio36", 922}; 923static const char * const phase_flag6_groups[] = { 924 "gpio37", 925}; 926static const char * const phase_flag7_groups[] = { 927 "gpio38", 928}; 929static const char * const phase_flag8_groups[] = { 930 "gpio39", 931}; 932static const char * const phase_flag9_groups[] = { 933 "gpio40", 934}; 935static const char * const pll_bypassnl_groups[] = { 936 "gpio13", 937}; 938static const char * const pll_clk_groups[] = { 939 "gpio98", 940}; 941static const char * const pll_reset_groups[] = { 942 "gpio14", 943}; 944static const char * const prng_rosc0_groups[] = { 945 "gpio97", 946}; 947static const char * const prng_rosc1_groups[] = { 948 "gpio98", 949}; 950static const char * const prng_rosc2_groups[] = { 951 "gpio99", 952}; 953static const char * const prng_rosc3_groups[] = { 954 "gpio100", 955}; 956static const char * const qdss_cti_groups[] = { 957 "gpio2", "gpio3", "gpio6", "gpio7", "gpio61", "gpio62", "gpio86", 958 "gpio87", 959}; 960static const char * const qdss_gpio_groups[] = { 961 "gpio8", "gpio9", "gpio63", "gpio64", 962}; 963static const char * const qdss_gpio0_groups[] = { 964 "gpio39", "gpio65", 965}; 966static const char * const qdss_gpio1_groups[] = { 967 "gpio40", "gpio66", 968}; 969static const char * const qdss_gpio10_groups[] = { 970 "gpio50", "gpio56", 971}; 972static const char * const qdss_gpio11_groups[] = { 973 "gpio51", "gpio57", 974}; 975static const char * const qdss_gpio12_groups[] = { 976 "gpio34", "gpio52", 977}; 978static const char * const qdss_gpio13_groups[] = { 979 "gpio35", "gpio53", 980}; 981static const char * const qdss_gpio14_groups[] = { 982 "gpio27", "gpio36", 983}; 984static const char * const qdss_gpio15_groups[] = { 985 "gpio28", "gpio37", 986}; 987static const char * const qdss_gpio2_groups[] = { 988 "gpio38", "gpio41", 989}; 990static const char * const qdss_gpio3_groups[] = { 991 "gpio42", "gpio47", 992}; 993static const char * const qdss_gpio4_groups[] = { 994 "gpio43", "gpio88", 995}; 996static const char * const qdss_gpio5_groups[] = { 997 "gpio44", "gpio89", 998}; 999static const char * const qdss_gpio6_groups[] = { 1000 "gpio45", "gpio90", 1001}; 1002static const char * const qdss_gpio7_groups[] = { 1003 "gpio46", "gpio91", 1004}; 1005static const char * const qdss_gpio8_groups[] = { 1006 "gpio48", "gpio92", 1007}; 1008static const char * const qdss_gpio9_groups[] = { 1009 "gpio49", "gpio93", 1010}; 1011static const char * const qlink0_enable_groups[] = { 1012 "gpio105", 1013}; 1014static const char * const qlink0_request_groups[] = { 1015 "gpio104", 1016}; 1017static const char * const qlink1_enable_groups[] = { 1018 "gpio108", 1019}; 1020static const char * const qlink1_request_groups[] = { 1021 "gpio107", 1022}; 1023static const char * const qup00_groups[] = { 1024 "gpio0", "gpio1", "gpio2", "gpio3", 1025}; 1026static const char * const qup01_groups[] = { 1027 "gpio61", "gpio62", "gpio63", "gpio64", 1028}; 1029static const char * const qup02_groups[] = { 1030 "gpio45", "gpio46", "gpio48", "gpio56", "gpio57", 1031}; 1032static const char * const qup10_groups[] = { 1033 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", 1034}; 1035static const char * const qup11_f1_groups[] = { 1036 "gpio27", "gpio28", 1037}; 1038static const char * const qup11_f2_groups[] = { 1039 "gpio27", "gpio28", 1040}; 1041 1042static const char * const qup12_groups[] = { 1043 "gpio19", "gpio19", "gpio20", "gpio20", 1044}; 1045static const char * const qup13_f1_groups[] = { 1046 "gpio25", "gpio26", 1047}; 1048static const char * const qup13_f2_groups[] = { 1049 "gpio25", "gpio26", 1050}; 1051static const char * const qup14_groups[] = { 1052 "gpio4", "gpio4", "gpio5", "gpio5", 1053}; 1054static const char * const sd_write_groups[] = { 1055 "gpio85", 1056}; 1057static const char * const sdc1_tb_groups[] = { 1058 "gpio4", 1059}; 1060static const char * const sdc2_tb_groups[] = { 1061 "gpio5", 1062}; 1063static const char * const sp_cmu_groups[] = { 1064 "gpio3", 1065}; 1066static const char * const tgu_ch0_groups[] = { 1067 "gpio61", 1068}; 1069static const char * const tgu_ch1_groups[] = { 1070 "gpio62", 1071}; 1072static const char * const tgu_ch2_groups[] = { 1073 "gpio63", 1074}; 1075static const char * const tgu_ch3_groups[] = { 1076 "gpio64", 1077}; 1078static const char * const tsense_pwm1_groups[] = { 1079 "gpio88", 1080}; 1081static const char * const tsense_pwm2_groups[] = { 1082 "gpio88", 1083}; 1084static const char * const uim1_clk_groups[] = { 1085 "gpio80", 1086}; 1087static const char * const uim1_data_groups[] = { 1088 "gpio79", 1089}; 1090static const char * const uim1_present_groups[] = { 1091 "gpio82", 1092}; 1093static const char * const uim1_reset_groups[] = { 1094 "gpio81", 1095}; 1096static const char * const uim2_clk_groups[] = { 1097 "gpio76", 1098}; 1099static const char * const uim2_data_groups[] = { 1100 "gpio75", 1101}; 1102static const char * const uim2_present_groups[] = { 1103 "gpio78", 1104}; 1105static const char * const uim2_reset_groups[] = { 1106 "gpio77", 1107}; 1108static const char * const usb2phy_ac_groups[] = { 1109 "gpio47", 1110}; 1111static const char * const vfr_1_groups[] = { 1112 "gpio49", 1113}; 1114static const char * const vsense_trigger_groups[] = { 1115 "gpio89", 1116}; 1117static const char * const wlan1_adc0_groups[] = { 1118 "gpio90", 1119}; 1120static const char * const wlan1_adc1_groups[] = { 1121 "gpio92", 1122}; 1123static const char * const wlan2_adc0_groups[] = { 1124 "gpio91", 1125}; 1126static const char * const wlan2_adc1_groups[] = { 1127 "gpio93", 1128}; 1129 1130static const struct pinfunction sm6375_functions[] = { 1131 MSM_PIN_FUNCTION(adsp_ext), 1132 MSM_PIN_FUNCTION(agera_pll), 1133 MSM_PIN_FUNCTION(atest_char), 1134 MSM_PIN_FUNCTION(atest_char0), 1135 MSM_PIN_FUNCTION(atest_char1), 1136 MSM_PIN_FUNCTION(atest_char2), 1137 MSM_PIN_FUNCTION(atest_char3), 1138 MSM_PIN_FUNCTION(atest_tsens), 1139 MSM_PIN_FUNCTION(atest_tsens2), 1140 MSM_PIN_FUNCTION(atest_usb1), 1141 MSM_PIN_FUNCTION(atest_usb10), 1142 MSM_PIN_FUNCTION(atest_usb11), 1143 MSM_PIN_FUNCTION(atest_usb12), 1144 MSM_PIN_FUNCTION(atest_usb13), 1145 MSM_PIN_FUNCTION(atest_usb2), 1146 MSM_PIN_FUNCTION(atest_usb20), 1147 MSM_PIN_FUNCTION(atest_usb21), 1148 MSM_PIN_FUNCTION(atest_usb22), 1149 MSM_PIN_FUNCTION(atest_usb23), 1150 MSM_PIN_FUNCTION(audio_ref), 1151 MSM_PIN_FUNCTION(btfm_slimbus), 1152 MSM_PIN_FUNCTION(cam_mclk), 1153 MSM_PIN_FUNCTION(cci_async), 1154 MSM_PIN_FUNCTION(cci_i2c), 1155 MSM_PIN_FUNCTION(cci_timer0), 1156 MSM_PIN_FUNCTION(cci_timer1), 1157 MSM_PIN_FUNCTION(cci_timer2), 1158 MSM_PIN_FUNCTION(cci_timer3), 1159 MSM_PIN_FUNCTION(cci_timer4), 1160 MSM_PIN_FUNCTION(cri_trng), 1161 MSM_PIN_FUNCTION(dbg_out), 1162 MSM_PIN_FUNCTION(ddr_bist), 1163 MSM_PIN_FUNCTION(ddr_pxi0), 1164 MSM_PIN_FUNCTION(ddr_pxi1), 1165 MSM_PIN_FUNCTION(ddr_pxi2), 1166 MSM_PIN_FUNCTION(ddr_pxi3), 1167 MSM_PIN_FUNCTION(dp_hot), 1168 MSM_PIN_FUNCTION(edp_lcd), 1169 MSM_PIN_FUNCTION(gcc_gp1), 1170 MSM_PIN_FUNCTION(gcc_gp2), 1171 MSM_PIN_FUNCTION(gcc_gp3), 1172 MSM_PIN_FUNCTION(gp_pdm0), 1173 MSM_PIN_FUNCTION(gp_pdm1), 1174 MSM_PIN_FUNCTION(gp_pdm2), 1175 MSM_PIN_FUNCTION(gpio), 1176 MSM_PIN_FUNCTION(gps_tx), 1177 MSM_PIN_FUNCTION(ibi_i3c), 1178 MSM_PIN_FUNCTION(jitter_bist), 1179 MSM_PIN_FUNCTION(ldo_en), 1180 MSM_PIN_FUNCTION(ldo_update), 1181 MSM_PIN_FUNCTION(lpass_ext), 1182 MSM_PIN_FUNCTION(m_voc), 1183 MSM_PIN_FUNCTION(mclk), 1184 MSM_PIN_FUNCTION(mdp_vsync), 1185 MSM_PIN_FUNCTION(mdp_vsync0), 1186 MSM_PIN_FUNCTION(mdp_vsync1), 1187 MSM_PIN_FUNCTION(mdp_vsync2), 1188 MSM_PIN_FUNCTION(mdp_vsync3), 1189 MSM_PIN_FUNCTION(mi2s_0), 1190 MSM_PIN_FUNCTION(mi2s_1), 1191 MSM_PIN_FUNCTION(mi2s_2), 1192 MSM_PIN_FUNCTION(mss_lte), 1193 MSM_PIN_FUNCTION(nav_gpio), 1194 MSM_PIN_FUNCTION(nav_pps), 1195 MSM_PIN_FUNCTION(pa_indicator), 1196 MSM_PIN_FUNCTION(phase_flag0), 1197 MSM_PIN_FUNCTION(phase_flag1), 1198 MSM_PIN_FUNCTION(phase_flag10), 1199 MSM_PIN_FUNCTION(phase_flag11), 1200 MSM_PIN_FUNCTION(phase_flag12), 1201 MSM_PIN_FUNCTION(phase_flag13), 1202 MSM_PIN_FUNCTION(phase_flag14), 1203 MSM_PIN_FUNCTION(phase_flag15), 1204 MSM_PIN_FUNCTION(phase_flag16), 1205 MSM_PIN_FUNCTION(phase_flag17), 1206 MSM_PIN_FUNCTION(phase_flag18), 1207 MSM_PIN_FUNCTION(phase_flag19), 1208 MSM_PIN_FUNCTION(phase_flag2), 1209 MSM_PIN_FUNCTION(phase_flag20), 1210 MSM_PIN_FUNCTION(phase_flag21), 1211 MSM_PIN_FUNCTION(phase_flag22), 1212 MSM_PIN_FUNCTION(phase_flag23), 1213 MSM_PIN_FUNCTION(phase_flag24), 1214 MSM_PIN_FUNCTION(phase_flag25), 1215 MSM_PIN_FUNCTION(phase_flag26), 1216 MSM_PIN_FUNCTION(phase_flag27), 1217 MSM_PIN_FUNCTION(phase_flag28), 1218 MSM_PIN_FUNCTION(phase_flag29), 1219 MSM_PIN_FUNCTION(phase_flag3), 1220 MSM_PIN_FUNCTION(phase_flag30), 1221 MSM_PIN_FUNCTION(phase_flag31), 1222 MSM_PIN_FUNCTION(phase_flag4), 1223 MSM_PIN_FUNCTION(phase_flag5), 1224 MSM_PIN_FUNCTION(phase_flag6), 1225 MSM_PIN_FUNCTION(phase_flag7), 1226 MSM_PIN_FUNCTION(phase_flag8), 1227 MSM_PIN_FUNCTION(phase_flag9), 1228 MSM_PIN_FUNCTION(pll_bist), 1229 MSM_PIN_FUNCTION(pll_bypassnl), 1230 MSM_PIN_FUNCTION(pll_clk), 1231 MSM_PIN_FUNCTION(pll_reset), 1232 MSM_PIN_FUNCTION(prng_rosc0), 1233 MSM_PIN_FUNCTION(prng_rosc1), 1234 MSM_PIN_FUNCTION(prng_rosc2), 1235 MSM_PIN_FUNCTION(prng_rosc3), 1236 MSM_PIN_FUNCTION(qdss_cti), 1237 MSM_PIN_FUNCTION(qdss_gpio), 1238 MSM_PIN_FUNCTION(qdss_gpio0), 1239 MSM_PIN_FUNCTION(qdss_gpio1), 1240 MSM_PIN_FUNCTION(qdss_gpio10), 1241 MSM_PIN_FUNCTION(qdss_gpio11), 1242 MSM_PIN_FUNCTION(qdss_gpio12), 1243 MSM_PIN_FUNCTION(qdss_gpio13), 1244 MSM_PIN_FUNCTION(qdss_gpio14), 1245 MSM_PIN_FUNCTION(qdss_gpio15), 1246 MSM_PIN_FUNCTION(qdss_gpio2), 1247 MSM_PIN_FUNCTION(qdss_gpio3), 1248 MSM_PIN_FUNCTION(qdss_gpio4), 1249 MSM_PIN_FUNCTION(qdss_gpio5), 1250 MSM_PIN_FUNCTION(qdss_gpio6), 1251 MSM_PIN_FUNCTION(qdss_gpio7), 1252 MSM_PIN_FUNCTION(qdss_gpio8), 1253 MSM_PIN_FUNCTION(qdss_gpio9), 1254 MSM_PIN_FUNCTION(qlink0_enable), 1255 MSM_PIN_FUNCTION(qlink0_request), 1256 MSM_PIN_FUNCTION(qlink0_wmss), 1257 MSM_PIN_FUNCTION(qlink1_enable), 1258 MSM_PIN_FUNCTION(qlink1_request), 1259 MSM_PIN_FUNCTION(qlink1_wmss), 1260 MSM_PIN_FUNCTION(qup00), 1261 MSM_PIN_FUNCTION(qup01), 1262 MSM_PIN_FUNCTION(qup02), 1263 MSM_PIN_FUNCTION(qup10), 1264 MSM_PIN_FUNCTION(qup11_f1), 1265 MSM_PIN_FUNCTION(qup11_f2), 1266 MSM_PIN_FUNCTION(qup12), 1267 MSM_PIN_FUNCTION(qup13_f1), 1268 MSM_PIN_FUNCTION(qup13_f2), 1269 MSM_PIN_FUNCTION(qup14), 1270 MSM_PIN_FUNCTION(sd_write), 1271 MSM_PIN_FUNCTION(sdc1_tb), 1272 MSM_PIN_FUNCTION(sdc2_tb), 1273 MSM_PIN_FUNCTION(sp_cmu), 1274 MSM_PIN_FUNCTION(tgu_ch0), 1275 MSM_PIN_FUNCTION(tgu_ch1), 1276 MSM_PIN_FUNCTION(tgu_ch2), 1277 MSM_PIN_FUNCTION(tgu_ch3), 1278 MSM_PIN_FUNCTION(tsense_pwm1), 1279 MSM_PIN_FUNCTION(tsense_pwm2), 1280 MSM_PIN_FUNCTION(uim1_clk), 1281 MSM_PIN_FUNCTION(uim1_data), 1282 MSM_PIN_FUNCTION(uim1_present), 1283 MSM_PIN_FUNCTION(uim1_reset), 1284 MSM_PIN_FUNCTION(uim2_clk), 1285 MSM_PIN_FUNCTION(uim2_data), 1286 MSM_PIN_FUNCTION(uim2_present), 1287 MSM_PIN_FUNCTION(uim2_reset), 1288 MSM_PIN_FUNCTION(usb2phy_ac), 1289 MSM_PIN_FUNCTION(usb_phy), 1290 MSM_PIN_FUNCTION(vfr_1), 1291 MSM_PIN_FUNCTION(vsense_trigger), 1292 MSM_PIN_FUNCTION(wlan1_adc0), 1293 MSM_PIN_FUNCTION(wlan1_adc1), 1294 MSM_PIN_FUNCTION(wlan2_adc0), 1295 MSM_PIN_FUNCTION(wlan2_adc1), 1296}; 1297 1298/* 1299 * Every pin is maintained as a single group, and missing or non-existing pin 1300 * would be maintained as dummy group to synchronize pin group index with 1301 * pin descriptor registered with pinctrl core. 1302 * Clients would not be able to request these dummy pin groups. 1303 */ 1304static const struct msm_pingroup sm6375_groups[] = { 1305 [0] = PINGROUP(0, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _), 1306 [1] = PINGROUP(1, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _), 1307 [2] = PINGROUP(2, qup00, cci_i2c, cri_trng, qdss_cti, _, _, _, _, _), 1308 [3] = PINGROUP(3, qup00, cci_i2c, sp_cmu, dbg_out, qdss_cti, _, _, _, _), 1309 [4] = PINGROUP(4, qup14, qup14, sdc1_tb, _, _, _, _, _, _), 1310 [5] = PINGROUP(5, qup14, qup14, sdc2_tb, _, _, _, _, _, _), 1311 [6] = PINGROUP(6, mdp_vsync, qdss_cti, _, _, _, _, _, _, _), 1312 [7] = PINGROUP(7, qdss_cti, _, _, _, _, _, _, _, _), 1313 [8] = PINGROUP(8, gp_pdm1, qdss_gpio, _, _, _, _, _, _, _), 1314 [9] = PINGROUP(9, qdss_gpio, _, _, _, _, _, _, _, _), 1315 [10] = PINGROUP(10, _, _, _, _, _, _, _, _, _), 1316 [11] = PINGROUP(11, _, _, _, _, _, _, _, _, _), 1317 [12] = PINGROUP(12, m_voc, dp_hot, _, phase_flag0, _, _, _, _, _), 1318 [13] = PINGROUP(13, qup10, pll_bypassnl, _, _, _, _, _, _, _), 1319 [14] = PINGROUP(14, qup10, pll_reset, _, _, _, _, _, _, _), 1320 [15] = PINGROUP(15, qup10, _, _, _, _, _, _, _, _), 1321 [16] = PINGROUP(16, qup10, _, _, _, _, _, _, _, _), 1322 [17] = PINGROUP(17, _, phase_flag1, qup10, _, _, _, _, _, _), 1323 [18] = PINGROUP(18, _, phase_flag2, _, _, _, _, _, _, _), 1324 [19] = PINGROUP(19, qup12, qup12, ddr_bist, _, _, _, _, _, _), 1325 [20] = PINGROUP(20, qup12, qup12, ddr_bist, _, _, _, _, _, _), 1326 [21] = PINGROUP(21, gcc_gp2, ddr_bist, _, _, _, _, _, _, _), 1327 [22] = PINGROUP(22, gcc_gp3, ddr_bist, _, _, _, _, _, _, _), 1328 [23] = PINGROUP(23, mdp_vsync, edp_lcd, _, _, _, _, _, _, _), 1329 [24] = PINGROUP(24, mdp_vsync, _, _, _, _, _, _, _, _), 1330 [25] = PINGROUP(25, qup13_f1, qup13_f2, _, _, _, _, _, _, _), 1331 [26] = PINGROUP(26, qup13_f1, qup13_f2, _, _, _, _, _, _, _), 1332 [27] = PINGROUP(27, qup11_f1, qup11_f2, mdp_vsync, pll_bist, _, qdss_gpio14, _, _, _), 1333 [28] = PINGROUP(28, qup11_f1, qup11_f2, mdp_vsync, _, qdss_gpio15, _, _, _, _), 1334 [29] = PINGROUP(29, cam_mclk, _, _, _, _, _, _, _, _), 1335 [30] = PINGROUP(30, cam_mclk, _, _, _, _, _, _, _, _), 1336 [31] = PINGROUP(31, cam_mclk, _, _, _, _, _, _, _, _), 1337 [32] = PINGROUP(32, cam_mclk, _, _, _, _, _, _, _, _), 1338 [33] = PINGROUP(33, cam_mclk, _, _, _, _, _, _, _, _), 1339 [34] = PINGROUP(34, cci_timer0, _, phase_flag3, qdss_gpio12, _, _, _, _, _), 1340 [35] = PINGROUP(35, cci_timer1, cci_async, _, phase_flag4, qdss_gpio13, _, _, _, _), 1341 [36] = PINGROUP(36, cci_timer2, cci_async, _, phase_flag5, qdss_gpio14, _, _, _, _), 1342 [37] = PINGROUP(37, cci_timer3, gp_pdm0, _, phase_flag6, qdss_gpio15, _, _, _, _), 1343 [38] = PINGROUP(38, cci_timer4, _, phase_flag7, qdss_gpio2, _, _, _, _, _), 1344 [39] = PINGROUP(39, cci_i2c, _, phase_flag8, qdss_gpio0, _, _, _, _, _), 1345 [40] = PINGROUP(40, cci_i2c, _, phase_flag9, qdss_gpio1, _, _, _, _, _), 1346 [41] = PINGROUP(41, cci_i2c, _, phase_flag10, qdss_gpio2, _, _, _, _, _), 1347 [42] = PINGROUP(42, cci_i2c, _, phase_flag11, qdss_gpio3, _, _, _, _, _), 1348 [43] = PINGROUP(43, cci_i2c, _, phase_flag12, qdss_gpio4, _, _, _, _, _), 1349 [44] = PINGROUP(44, cci_i2c, _, phase_flag13, qdss_gpio5, _, _, _, _, _), 1350 [45] = PINGROUP(45, qup02, _, phase_flag14, qdss_gpio6, _, _, _, _, _), 1351 [46] = PINGROUP(46, qup02, _, phase_flag15, qdss_gpio7, _, _, _, _, _), 1352 [47] = PINGROUP(47, mdp_vsync0, _, phase_flag16, qdss_gpio3, _, _, usb2phy_ac, _, _), 1353 [48] = PINGROUP(48, cci_async, mdp_vsync1, gcc_gp1, _, phase_flag17, qdss_gpio8, qup02, 1354 _, _), 1355 [49] = PINGROUP(49, vfr_1, _, phase_flag18, qdss_gpio9, _, _, _, _, _), 1356 [50] = PINGROUP(50, _, phase_flag19, qdss_gpio10, _, _, _, _, _, _), 1357 [51] = PINGROUP(51, _, phase_flag20, qdss_gpio11, _, _, _, _, _, _), 1358 [52] = PINGROUP(52, cci_async, gp_pdm1, _, phase_flag21, qdss_gpio12, _, _, _, _), 1359 [53] = PINGROUP(53, cci_async, _, phase_flag22, qdss_gpio13, _, _, _, _, _), 1360 [54] = PINGROUP(54, _, _, _, _, _, _, _, _, _), 1361 [55] = PINGROUP(55, _, _, _, _, _, _, _, _, _), 1362 [56] = PINGROUP(56, qup02, mdp_vsync2, _, phase_flag23, qdss_gpio10, _, _, _, _), 1363 [57] = PINGROUP(57, qup02, mdp_vsync3, gp_pdm2, _, phase_flag24, qdss_gpio11, _, _, _), 1364 [58] = PINGROUP(58, gcc_gp1, _, _, _, _, _, _, _, _), 1365 [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _), 1366 [60] = PINGROUP(60, audio_ref, lpass_ext, mi2s_2, _, phase_flag25, _, _, _, _), 1367 [61] = PINGROUP(61, qup01, tgu_ch0, _, phase_flag26, qdss_cti, _, _, _, _), 1368 [62] = PINGROUP(62, qup01, tgu_ch1, _, phase_flag27, qdss_cti, _, _, _, _), 1369 [63] = PINGROUP(63, qup01, tgu_ch2, _, phase_flag28, qdss_gpio, _, _, _, _), 1370 [64] = PINGROUP(64, qup01, tgu_ch3, _, phase_flag29, qdss_gpio, _, _, _, _), 1371 [65] = PINGROUP(65, mss_lte, _, qdss_gpio0, _, _, _, _, _, _), 1372 [66] = PINGROUP(66, mss_lte, _, qdss_gpio1, _, _, _, _, _, _), 1373 [67] = PINGROUP(67, btfm_slimbus, mi2s_1, _, phase_flag30, _, _, _, _, _), 1374 [68] = PINGROUP(68, btfm_slimbus, mi2s_1, gp_pdm0, _, phase_flag31, _, _, _, _), 1375 [69] = PINGROUP(69, _, _, _, _, _, _, _, _, _), 1376 [70] = PINGROUP(70, _, _, _, _, _, _, _, _, _), 1377 [71] = PINGROUP(71, _, _, _, _, _, _, _, _, _), 1378 [72] = PINGROUP(72, _, _, _, _, _, _, _, _, _), 1379 [73] = PINGROUP(73, _, _, _, _, _, _, _, _, _), 1380 [74] = PINGROUP(74, _, _, _, _, _, _, _, _, _), 1381 [75] = PINGROUP(75, uim2_data, _, _, _, _, _, _, _, _), 1382 [76] = PINGROUP(76, uim2_clk, _, _, _, _, _, _, _, _), 1383 [77] = PINGROUP(77, uim2_reset, _, _, _, _, _, _, _, _), 1384 [78] = PINGROUP(78, uim2_present, _, _, _, _, _, _, _, _), 1385 [79] = PINGROUP(79, uim1_data, _, _, _, _, _, _, _, _), 1386 [80] = PINGROUP(80, uim1_clk, _, _, _, _, _, _, _, _), 1387 [81] = PINGROUP(81, uim1_reset, _, _, _, _, _, _, _, _), 1388 [82] = PINGROUP(82, uim1_present, _, _, _, _, _, _, _, _), 1389 [83] = PINGROUP(83, atest_usb1, _, _, _, _, _, _, _, _), 1390 [84] = PINGROUP(84, _, atest_usb10, _, _, _, _, _, _, _), 1391 [85] = PINGROUP(85, sd_write, _, atest_usb11, _, _, _, _, _, _), 1392 [86] = PINGROUP(86, btfm_slimbus, mi2s_1, _, qdss_cti, atest_usb12, ddr_pxi0, _, _, _), 1393 [87] = PINGROUP(87, btfm_slimbus, mi2s_1, adsp_ext, _, qdss_cti, atest_usb13, ddr_pxi1, _, 1394 _), 1395 [88] = PINGROUP(88, mi2s_0, _, qdss_gpio4, _, atest_usb2, ddr_pxi2, tsense_pwm1, 1396 tsense_pwm2, _), 1397 [89] = PINGROUP(89, mi2s_0, agera_pll, _, qdss_gpio5, _, vsense_trigger, atest_usb20, 1398 ddr_pxi3, _), 1399 [90] = PINGROUP(90, mi2s_0, jitter_bist, _, qdss_gpio6, _, wlan1_adc0, atest_usb21, 1400 ddr_pxi0, _), 1401 [91] = PINGROUP(91, mi2s_0, _, qdss_gpio7, _, wlan2_adc0, atest_usb22, ddr_pxi1, _, _), 1402 [92] = PINGROUP(92, _, qdss_gpio8, atest_tsens, wlan1_adc1, atest_usb23, ddr_pxi2, _, _, 1403 _), 1404 [93] = PINGROUP(93, mclk, lpass_ext, _, qdss_gpio9, atest_tsens2, wlan2_adc1, ddr_pxi3, 1405 _, _), 1406 [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _), 1407 [95] = PINGROUP(95, ldo_en, _, atest_char, _, _, _, _, _, _), 1408 [96] = PINGROUP(96, ldo_update, _, atest_char0, _, _, _, _, _, _), 1409 [97] = PINGROUP(97, prng_rosc0, _, atest_char1, _, _, _, _, _, _), 1410 [98] = PINGROUP(98, _, atest_char2, _, _, prng_rosc1, pll_clk, _, _, _), 1411 [99] = PINGROUP(99, _, atest_char3, _, _, prng_rosc2, _, _, _, _), 1412 [100] = PINGROUP(100, _, _, prng_rosc3, _, _, _, _, _, _), 1413 [101] = PINGROUP(101, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _), 1414 [102] = PINGROUP(102, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _), 1415 [103] = PINGROUP(103, qlink0_wmss, _, _, _, _, _, _, _, _), 1416 [104] = PINGROUP(104, qlink0_request, _, _, _, _, _, _, _, _), 1417 [105] = PINGROUP(105, qlink0_enable, _, _, _, _, _, _, _, _), 1418 [106] = PINGROUP(106, qlink1_wmss, _, _, _, _, _, _, _, _), 1419 [107] = PINGROUP(107, qlink1_request, gps_tx, _, _, _, _, _, _, _), 1420 [108] = PINGROUP(108, qlink1_enable, gps_tx, _, _, _, _, _, _, _), 1421 [109] = PINGROUP(109, _, _, _, _, _, _, _, _, _), 1422 [110] = PINGROUP(110, _, _, _, _, _, _, _, _, _), 1423 [111] = PINGROUP(111, _, _, _, _, _, _, _, _, _), 1424 [112] = PINGROUP(112, _, _, _, _, _, _, _, _, _), 1425 [113] = PINGROUP(113, _, _, _, _, _, _, _, _, _), 1426 [114] = PINGROUP(114, _, _, _, _, _, _, _, _, _), 1427 [115] = PINGROUP(115, _, _, _, _, _, _, _, _, _), 1428 [116] = PINGROUP(116, _, _, _, _, _, _, _, _, _), 1429 [117] = PINGROUP(117, _, _, _, _, _, _, _, _, _), 1430 [118] = PINGROUP(118, _, _, pa_indicator, dp_hot, _, _, _, _, _), 1431 [119] = PINGROUP(119, _, _, _, _, _, _, _, _, _), 1432 [120] = PINGROUP(120, _, _, _, _, _, _, _, _, _), 1433 [121] = PINGROUP(121, _, _, _, _, _, _, _, _, _), 1434 [122] = PINGROUP(122, _, _, _, _, _, _, _, _, _), 1435 [123] = PINGROUP(123, _, _, _, _, _, _, _, _, _), 1436 [124] = PINGROUP(124, usb_phy, _, _, _, _, _, _, _, _), 1437 [125] = PINGROUP(125, _, _, _, _, _, _, _, _, _), 1438 [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _), 1439 [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _), 1440 [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _), 1441 [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _), 1442 [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _), 1443 [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _), 1444 [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _), 1445 [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _), 1446 [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _), 1447 [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _), 1448 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _), 1449 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _), 1450 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _), 1451 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _), 1452 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _), 1453 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _), 1454 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _), 1455 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _), 1456 [144] = PINGROUP(144, _, _, _, _, _, _, _, _, _), 1457 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _), 1458 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _), 1459 [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _), 1460 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _), 1461 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _), 1462 [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _), 1463 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _), 1464 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _), 1465 [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _), 1466 [154] = PINGROUP(154, _, _, _, _, _, _, _, _, _), 1467 [155] = PINGROUP(155, _, _, _, _, _, _, _, _, _), 1468 [156] = UFS_RESET(ufs_reset, 0x1ae000), 1469 [157] = SDC_PINGROUP(sdc1_rclk, 0x1a1000, 0, 0), 1470 [158] = SDC_PINGROUP(sdc1_clk, 0x1a0000, 13, 6), 1471 [159] = SDC_PINGROUP(sdc1_cmd, 0x1a0000, 11, 3), 1472 [160] = SDC_PINGROUP(sdc1_data, 0x1a0000, 9, 0), 1473 [161] = SDC_PINGROUP(sdc2_clk, 0x1a2000, 14, 6), 1474 [162] = SDC_PINGROUP(sdc2_cmd, 0x1a2000, 11, 3), 1475 [163] = SDC_PINGROUP(sdc2_data, 0x1a2000, 9, 0), 1476}; 1477 1478static const struct msm_gpio_wakeirq_map sm6375_mpm_map[] = { 1479 { 0, 84 }, { 3, 6 }, { 4, 7 }, { 7, 8 }, { 8, 9 }, { 9, 10 }, { 11, 11 }, { 12, 13 }, 1480 { 13, 14 }, { 16, 16 }, { 17, 17 }, { 18, 18 }, { 19, 19 }, { 21, 20 }, { 22, 21 }, 1481 { 23, 23 }, { 24, 24 }, { 25, 25 }, { 27, 26 }, { 28, 27 }, { 37, 28 }, { 38, 29 }, 1482 { 48, 30 }, { 50, 31 }, { 51, 32 }, { 52, 33 }, { 57, 34 }, { 59, 35 }, { 60, 37 }, 1483 { 61, 38 }, { 62, 39 }, { 64, 40 }, { 66, 41 }, { 67, 42 }, { 68, 43 }, { 69, 44 }, 1484 { 78, 45 }, { 82, 36 }, { 83, 47 }, { 84, 48 }, { 85, 49 }, { 87, 50 }, { 88, 51 }, 1485 { 91, 52 }, { 94, 53 }, { 95, 54 }, { 96, 55 }, { 97, 56 }, { 98, 57 }, { 99, 58 }, 1486 { 100, 59 }, { 104, 60 }, { 107, 61 }, { 118, 62 }, { 124, 63 }, { 125, 64 }, { 126, 65 }, 1487 { 128, 66 }, { 129, 67 }, { 131, 69 }, { 133, 70 }, { 134, 71 }, { 136, 73 }, { 142, 74 }, 1488 { 150, 75 }, { 153, 76 }, { 155, 77 }, 1489}; 1490 1491static const struct msm_pinctrl_soc_data sm6375_tlmm = { 1492 .pins = sm6375_pins, 1493 .npins = ARRAY_SIZE(sm6375_pins), 1494 .functions = sm6375_functions, 1495 .nfunctions = ARRAY_SIZE(sm6375_functions), 1496 .groups = sm6375_groups, 1497 .ngroups = ARRAY_SIZE(sm6375_groups), 1498 .ngpios = 157, 1499 .wakeirq_map = sm6375_mpm_map, 1500 .nwakeirq_map = ARRAY_SIZE(sm6375_mpm_map), 1501}; 1502 1503static int sm6375_tlmm_probe(struct platform_device *pdev) 1504{ 1505 return msm_pinctrl_probe(pdev, &sm6375_tlmm); 1506} 1507 1508static const struct of_device_id sm6375_tlmm_of_match[] = { 1509 { .compatible = "qcom,sm6375-tlmm", }, 1510 { }, 1511}; 1512 1513static struct platform_driver sm6375_tlmm_driver = { 1514 .driver = { 1515 .name = "sm6375-tlmm", 1516 .of_match_table = sm6375_tlmm_of_match, 1517 }, 1518 .probe = sm6375_tlmm_probe, 1519 .remove_new = msm_pinctrl_remove, 1520}; 1521 1522static int __init sm6375_tlmm_init(void) 1523{ 1524 return platform_driver_register(&sm6375_tlmm_driver); 1525} 1526arch_initcall(sm6375_tlmm_init); 1527 1528static void __exit sm6375_tlmm_exit(void) 1529{ 1530 platform_driver_unregister(&sm6375_tlmm_driver); 1531} 1532module_exit(sm6375_tlmm_exit); 1533 1534MODULE_DESCRIPTION("QTI SM6375 TLMM driver"); 1535MODULE_LICENSE("GPL"); 1536MODULE_DEVICE_TABLE(of, sm6375_tlmm_of_match); 1537