Searched refs:lanes (Results 126 - 150 of 281) sorted by relevance

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/linux-master/drivers/gpu/drm/panel/
H A Dpanel-sony-td4353-jdi.c266 dsi->lanes = 4;
H A Dpanel-sharp-ls060t1sx01.c251 dsi->lanes = 4;
H A Dpanel-ilitek-ili9882t.c38 unsigned int lanes; member in struct:panel_desc
619 .lanes = 4,
728 dsi->lanes = desc->lanes;
H A Dpanel-samsung-s6e3fa7.c229 dsi->lanes = 4;
H A Dpanel-visionox-rm69299.c222 dsi->lanes = 4;
H A Dpanel-novatek-nt36672e.c34 unsigned int lanes; member in struct:panel_desc
497 .lanes = 4,
560 dsi->lanes = ctx->desc->lanes;
H A Dpanel-novatek-nt36672a.c56 unsigned int lanes; member in struct:nt36672a_panel_desc
594 .lanes = 4,
647 dsi->lanes = desc->lanes;
H A Dpanel-jdi-fhd-r63452.c243 dsi->lanes = 4;
/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0012.h251 __u8 lanes; member in struct:nvif_outp_dp_drive_args::nvif_outp_dp_drive_v0
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dior.h81 u8 lanes[4]; member in struct:nvkm_ior_func::nvkm_ior_func_dp
H A Dtu102.c72 .lanes = { 0, 1, 2, 3 },
/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dpcs-639x.c211 static const int lanes[] = { MV88E6390_PORT9_LANE0, MV88E6390_PORT9_LANE1, local
219 * Software Reset, the SERDES lanes may not be properly aligned
223 for (i = 0; i < ARRAY_SIZE(lanes); i++) {
224 err = mdiobus_c45_write(mpcs->mdio.bus, lanes[i],
230 err = mdiobus_c45_write(mpcs->mdio.bus, lanes[i],
/linux-master/drivers/media/i2c/ccs/
H A Dccs.h79 unsigned int lanes; /* Number of CSI-2 lanes */ member in struct:ccs_hwconfig
/linux-master/include/drm/
H A Ddrm_mipi_dsi.h140 /* transmit data ending at the same time for all lanes within one hsync */
175 * @lanes: number of active data lanes
192 unsigned int lanes; member in struct:mipi_dsi_device
/linux-master/drivers/ufs/host/
H A Dufs-exynos.c378 int lanes = max_t(u32, pwr->lane_rx, pwr->lane_tx); local
382 if (lanes == 1) {
824 int lanes = max_t(u32, pwr_req->lane_rx, pwr_req->lane_tx); local
831 if (!lanes)
832 lanes = 1;
847 gear, lanes);
850 "SLOW", gear, lanes);
/linux-master/drivers/gpu/drm/sun4i/
H A Dsun6i_mipi_dsi.c332 u8 lanes_mask = GENMASK(device->lanes - 1, 0);
382 return mode->htotal * Bpp / device->lanes;
409 edge1 += (mode->hdisplay + hbp + 20) * Bpp / device->lanes;
548 if (device->lanes == 4)
593 * there only for 4 lanes. However, using 0 (the !4 lanes
594 * case) even with a 4 lanes screen seems to work...
766 device->lanes, cfg);
/linux-master/drivers/gpu/drm/rockchip/
H A Ddw-mipi-dsi-rockchip.c546 unsigned long mode_flags, u32 lanes, u32 format,
573 tmp = mpclk * (bpp / lanes) * 10 / 8;
584 bpp, lanes,
1209 DRM_DEV_DEBUG(dsi->dev, "lanes %d - data_rate_mbps %u\n",
1210 dsi->dphy_config.lanes, dsi->lane_mbps);
1565 /* Enable dphy lanes */
1567 HIWORD_UPDATE(GENMASK(dsi->dphy_config.lanes - 1, 0),
545 dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode, unsigned long mode_flags, u32 lanes, u32 format, unsigned int *lane_mbps) argument
/linux-master/drivers/media/i2c/
H A Dimx415.c502 * Mode : number of lanes, lane rate and frame rate dependent settings
508 * lane_rate lanes fps hmax_pix pixel_rate
531 u32 lanes; member in struct:imx415_mode
541 .lanes = 2,
551 .lanes = 2,
561 .lanes = 4,
1280 "invalid number of CSI2 data lanes %d\n",
1293 * number of lanes and given lane rates.
1305 if (sensor->num_data_lanes != supported_modes[j].lanes)
1338 dev_dbg(sensor->dev, "clock: %lu Hz, lane_rate: %llu bps, lanes
[all...]
H A Dthp7312.c364 static int thp7312_map_data_lanes(u8 *lane_remap, const u8 *lanes, u8 num_lanes) argument
372 * data-lanes array, so we need to do a conversion. Do this in the same
373 * pass as validating data-lanes.
376 if (lanes[i] < 1 || lanes[i] > 4)
379 if (used_lanes & (BIT(lanes[i])))
382 used_lanes |= BIT(lanes[i]);
385 * data-lanes is 1-indexed while the field position in the
388 val |= i << ((lanes[i] - 1) * 2);
2001 ret = fwnode_property_read_u32_array(node, "data-lanes", value
[all...]
/linux-master/drivers/phy/tegra/
H A Dxusb-tegra186.c307 usb2->base.soc = &pad->soc->lanes[index];
1083 usb3->base.soc = &pad->soc->lanes[index];
1564 .lanes = tegra186_usb2_lanes,
1577 .lanes = tegra186_usb3_lanes,
1632 .lanes = tegra194_usb2_lanes,
1646 .lanes = tegra194_usb3_lanes,
/linux-master/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_ethtool.c1011 netdev_err(dev, "No supported speed or lanes requested\n");
1437 cmd->lanes = 0;
1493 if (cmd->lanes > width)
1963 cmd->lanes = 0;
2036 if (cmd->lanes > width)
2043 if (!cmd->lanes) {
2044 /* If number of lanes was not set by user space,
2050 } else if (cmd->lanes == link_mode.width) {
2051 /* Else if the number of lanes was set, choose
/linux-master/drivers/staging/media/tegra-video/
H A Dvi.c1200 struct device_node *node, unsigned int lanes)
1218 * For data lanes more than maximum csi lanes per brick, multiple of
1221 if (lanes <= CSI_LANES_PER_BRICK)
1224 chan->totalports = lanes / CSI_LANES_PER_BRICK;
1261 unsigned int lanes; local
1300 lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
1301 ret = tegra_vi_channel_alloc(vi, port_num, port, lanes);
1199 tegra_vi_channel_alloc(struct tegra_vi *vi, unsigned int port_num, struct device_node *node, unsigned int lanes) argument
/linux-master/drivers/gpu/drm/bridge/
H A Dlontium-lt9211.c40 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
176 { REG_DSI_LANE, REG_DSI_LANE_COUNT(ctx->dsi->lanes) },
708 dsi->lanes = dsi_lanes;
/linux-master/drivers/gpu/drm/nouveau/nvif/
H A Doutp.c103 args.lanes = link_nr;
108 NVIF_ERRON(ret, &outp->object, "[DP_DRIVE lanes:%d]", args.lanes);
/linux-master/drivers/media/platform/rockchip/rkisp1/
H A Drkisp1-dev.c274 rk_asd->lanes = vep.bus.mipi_csi2.num_data_lanes;
279 dev_dbg(rkisp1->dev, "registered ep id %d, bus type %u, %u lanes\n",
280 vep.base.id, rk_asd->mbus_type, rk_asd->lanes);

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