/linux-master/drivers/clk/ |
H A D | clk-aspeed.c | 431 aspeed_clk_data->hws[ASPEED_CLK_UART] = hw; 441 aspeed_clk_data->hws[ASPEED_CLK_MPLL] = hw; 455 aspeed_clk_data->hws[ASPEED_CLK_SDIO] = hw; 464 aspeed_clk_data->hws[ASPEED_CLK_MAC] = hw; 479 aspeed_clk_data->hws[ASPEED_CLK_MAC1RCLK] = hw; 487 aspeed_clk_data->hws[ASPEED_CLK_MAC2RCLK] = hw; 497 aspeed_clk_data->hws[ASPEED_CLK_LHCLK] = hw; 506 aspeed_clk_data->hws[ASPEED_CLK_BCLK] = hw; 513 aspeed_clk_data->hws[ASPEED_CLK_24M] = hw; 521 aspeed_clk_data->hws[ASPEED_CLK_ECLK_MU [all...] |
H A D | clk-gemini.c | 310 gemini_clk_data->hws[GEMINI_CLK_RTC] = hw; 319 gemini_clk_data->hws[GEMINI_CLK_CPU] = hw; 339 gemini_clk_data->hws[GEMINI_CLK_GATES + i] = 360 gemini_clk_data->hws[GEMINI_CLK_TVC] = hw; 364 gemini_clk_data->hws[GEMINI_CLK_PCI] = hw; 368 gemini_clk_data->hws[GEMINI_CLK_UART] = hw; 398 gemini_clk_data = kzalloc(struct_size(gemini_clk_data, hws, 410 gemini_clk_data->hws[i] = ERR_PTR(-EPROBE_DEFER); 450 gemini_clk_data->hws[GEMINI_CLK_AHB] = hw; 454 gemini_clk_data->hws[GEMINI_CLK_AP [all...] |
H A D | clk-lan966x.c | 197 hw_data->hws[i] = 203 if (IS_ERR(hw_data->hws[i])) 204 return dev_err_probe(dev, PTR_ERR(hw_data->hws[i]), 220 hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, N_CLOCKS), 235 hw_data->hws[i] = lan966x_gck_clk_register(dev, i); 236 if (IS_ERR(hw_data->hws[i])) { 239 return PTR_ERR(hw_data->hws[i]);
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H A D | clk-asm9260.c | 259 struct clk_hw **hws; local 265 clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL); 269 hws = clk_data->hws; 304 hws[dc->idx] = clk_hw_register_divider(NULL, dc->name, 314 hws[gd->idx] = clk_hw_register_gate(NULL, gd->name, 321 if (!IS_ERR(hws[n]))
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H A D | clk-stm32h7.c | 53 static struct clk_hw **hws; variable in typeref:struct:clk_hw 513 hws[SYS_D1CPRE] = clk_hw_register_divider_table(NULL, "d1cpre", 517 hws[HCLK] = clk_hw_register_divider_table(NULL, "hclk", "d1cpre", 523 hws[CPU_SYSTICK] = clk_hw_register_fixed_factor(NULL, "systick", 527 hws[PCLK3] = clk_hw_register_divider_table(NULL, "pclk3", "hclk", 0, 533 hws[PCLK1] = clk_hw_register_divider_table(NULL, "pclk1", "hclk", 0, 542 hws[PCLK2] = clk_hw_register_divider_table(NULL, "pclk2", "hclk", 0, 551 hws[PCLK4] = clk_hw_register_divider_table(NULL, "pclk4", "hclk", 0, 1203 clk_data = kzalloc(struct_size(clk_data, hws, STM32H7_MAX_CLKS), 1210 hws [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
H A D | dcn32_hwseq.c | 59 hws->ctx 61 hws->regs->reg 68 hws->shifts->field_name, hws->masks->field_name 71 struct dce_hwseq *hws, 79 if (hws->ctx->dc->debug.disable_dsc_power_gate) 82 if (!hws->ctx->dc->debug.enable_double_buffered_dsc_pg_support) 133 struct dce_hwseq *hws, 162 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 167 if (hws 70 dcn32_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 132 dcn32_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 521 struct dce_hwseq *hws = dc->hwseq; local 690 struct dce_hwseq *hws = dc->hwseq; local 747 struct dce_hwseq *hws = dc->hwseq; local 1178 dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context) argument 1214 struct dce_hwseq *hws = link->dc->hwseq; local 1385 dcn32_dsc_pg_status( struct dce_hwseq *hws, unsigned int dsc_inst) argument 1421 struct dce_hwseq *hws = dc->hwseq; local 1442 struct dce_hwseq *hws = dc->hwseq; local 1477 struct dce_hwseq *hws = dc->hwseq; local 1539 struct dce_hwseq *hws = dc->hwseq; local 1622 struct dce_hwseq *hws = dc->hwseq; local [all...] |
/linux-master/drivers/clk/xilinx/ |
H A D | xlnx_vcu.c | 526 struct clk_hw **hws; local 530 data = devm_kzalloc(dev, struct_size(data, hws, CLK_XVCU_NUM_CLOCKS), GFP_KERNEL); 534 hws = data->hws; 553 hws[CLK_XVCU_ENC_CORE] = 558 hws[CLK_XVCU_ENC_MCU] = 563 hws[CLK_XVCU_DEC_CORE] = 568 hws[CLK_XVCU_DEC_MCU] = 580 struct clk_hw **hws = data->hws; local [all...] |
/linux-master/drivers/net/ethernet/chelsio/inline_crypto/chtls/ |
H A D | chtls_io.c | 224 struct chtls_hws *hws; local 231 hws = &csk->tlshws; 252 hws->ivsize = number_of_ivs * CIPHER_BLOCK_SIZE; 268 hws->ivsize = 0; 282 struct chtls_hws *hws; local 287 hws = &csk->tlshws; 291 kaddr = keyid_to_addr(cdev->kmap.start, hws->txkey); 300 ULPTX_LEN16_V(hws->keylen >> 4)); 305 static u64 tlstx_incr_seqnum(struct chtls_hws *hws) argument 307 return hws 351 struct chtls_hws *hws; local 447 struct chtls_hws *hws = &csk->tlshws; local 484 struct chtls_hws *hws; local 598 struct chtls_hws *hws = &csk->tlshws; local 1345 struct chtls_hws *hws = &csk->tlshws; local [all...] |
H A D | chtls_hw.c | 182 struct chtls_hws *hws; local 187 hws = &csk->tlshws; 194 hws->rxkey = keyid; 196 hws->txkey = keyid; 210 struct chtls_hws *hws; local 217 hws = &csk->tlshws; 220 if (hws->rxkey >= 0) { 221 __clear_bit(hws->rxkey, cdev->kmap.addr); 223 hws->rxkey = -1; 225 if (hws 338 struct chtls_hws *hws = &csk->tlshws; local [all...] |
/linux-master/drivers/clk/berlin/ |
H A D | bg2q.c | 285 struct clk_hw **hws; local 288 clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL); 294 hws = clk_data->hws; 345 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, 354 hws[CLKID_GFX2DAXI + n] = clk_hw_register_gate(NULL, gd->name, 360 hws[CLKID_CPU] = 364 hws[CLKID_TWD] = 369 if (!IS_ERR(hws[n]))
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/linux-master/drivers/clk/mediatek/ |
H A D | clk-pllfh.c | 232 clk_data->hws[pll->id] = hw; 247 mtk_clk_unregister_pllfh(clk_data->hws[pll->id]); 249 mtk_clk_unregister_pll(clk_data->hws[pll->id]); 251 clk_data->hws[pll->id] = ERR_PTR(-ENOENT); 275 if (IS_ERR_OR_NULL(clk_data->hws[pll->id])) 283 mtk_clk_unregister_pllfh(clk_data->hws[pll->id]); 285 base = mtk_clk_pll_get_base(clk_data->hws[pll->id], 287 mtk_clk_unregister_pll(clk_data->hws[pll->id]); 290 clk_data->hws[pll->id] = ERR_PTR(-ENOENT);
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H A D | clk-mux.c | 235 if (!IS_ERR_OR_NULL(clk_data->hws[mux->id])) { 249 clk_data->hws[mux->id] = hw; 258 if (IS_ERR_OR_NULL(clk_data->hws[mux->id])) 261 mtk_clk_unregister_mux(clk_data->hws[mux->id]); 262 clk_data->hws[mux->id] = ERR_PTR(-ENOENT); 280 if (IS_ERR_OR_NULL(clk_data->hws[mux->id])) 283 mtk_clk_unregister_mux(clk_data->hws[mux->id]); 284 clk_data->hws[mux->id] = ERR_PTR(-ENOENT);
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/linux-master/drivers/clk/visconti/ |
H A D | pll-tmpv770x.c | 75 ctx->clk_data.hws[TMPV770X_PLL_PIPLL1] = 77 ctx->clk_data.hws[TMPV770X_PLL_PIDNNPLL] = 79 ctx->clk_data.hws[TMPV770X_PLL_PIETHERPLL] =
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 67 hws->ctx 69 hws->regs->reg 73 hws->shifts->field_name, hws->masks->field_name 133 struct dce_hwseq *hws = dc->hwseq; local 608 struct dce_hwseq *hws, 630 struct dce_hwseq *hws) 665 * @hws: dce_hwseq reference. 672 struct dce_hwseq *hws, 679 if (hws 607 dcn10_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 629 dcn10_disable_vga( struct dce_hwseq *hws) argument 671 dcn10_dpp_pg_control( struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 732 dcn10_hubp_pg_control( struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 784 power_on_plane_resources( struct dce_hwseq *hws, int plane_id) argument 812 struct dce_hwseq *hws = dc->hwseq; local 832 struct dce_hwseq *hws = dc->hwseq; local 862 struct dce_hwseq *hws = dc->hwseq; local 1239 struct dce_hwseq *hws = dc->hwseq; local 1286 struct dce_hwseq *hws = dc->hwseq; local 1316 struct dce_hwseq *hws = dc->hwseq; local 1349 struct dce_hwseq *hws = dc->hwseq; local 1366 struct dce_hwseq *hws = dc->hwseq; local 1555 struct dce_hwseq *hws = dc->hwseq; local 1742 struct dce_hwseq *hws = dc->hwseq; local 1945 struct dce_hwseq *hws = dc->hwseq; local 2444 mmhub_read_vm_system_aperture_settings(struct dcn10_hubp *hubp1, struct vm_system_aperture_param *apt, struct dce_hwseq *hws) argument 2469 mmhub_read_vm_context0_settings(struct dcn10_hubp *hubp1, struct vm_context0_param *vm0, struct dce_hwseq *hws) argument 2514 dcn10_program_pte_vm(struct dce_hwseq *hws, struct hubp *hubp) argument 2532 struct dce_hwseq *hws = dc->hwseq; local 2777 struct dce_hwseq *hws = dc->hwseq; local 3001 struct dce_hwseq *hws = dc->hwseq; local 3129 struct dce_hwseq *hws = dc->hwseq; local 3167 struct dce_hwseq *hws = dc->hwseq; local 3351 struct dce_hwseq *hws = dc->hwseq; local 3426 dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data) argument 3879 struct dce_hwseq *hws = link->dc->hwseq; local [all...] |
H A D | dcn10_hwseq.h | 87 struct dce_hwseq *hws, 91 struct dce_hwseq *hws, 95 struct dce_hwseq *hws, 99 struct dce_hwseq *hws); 114 void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data);
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/linux-master/drivers/clk/mvebu/ |
H A D | armada-37xx-tbg.c | 92 struct_size(hw_tbg_data, hws, NUM_TBG), 118 hw_tbg_data->hws[i] = clk_hw_register_fixed_factor(NULL, name, 120 if (IS_ERR(hw_tbg_data->hws[i])) 134 clk_hw_unregister_fixed_factor(hw_tbg_data->hws[i]);
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/linux-master/drivers/clk/imx/ |
H A D | clk-imx95-blk-ctl.c | 257 struct clk_hw **hws; local 288 clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, bc_data->num_clks), 297 hws = clk_hw_data->hws; 304 hws[i] = clk_hw_register_mux(dev, data->name, data->parent_names, 309 hws[i] = clk_hw_register_divider(dev, data->name, data->parent_names[0], 313 hws[i] = clk_hw_register_gate(dev, data->name, data->parent_names[0], 317 if (IS_ERR(hws[i])) { 318 ret = PTR_ERR(hws[i]); 341 if (IS_ERR_OR_NULL(hws[ [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
H A D | dcn21_hwseq.c | 43 hws->ctx 45 hws->regs->reg 49 hws->shifts->field_name, hws->masks->field_name 53 struct dce_hwseq *hws) 67 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument 81 mmhub_update_page_table_config(&config, hws); 90 struct dce_hwseq *hws = dc->hwseq; local 52 mmhub_update_page_table_config(struct dcn_hubbub_phys_addr_config *config, struct dce_hwseq *hws) argument
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/linux-master/drivers/clk/meson/ |
H A D | meson-aoclk.c | 79 if (!data->hw_clks.hws[clkid]) 82 ret = devm_clk_hw_register(dev, data->hw_clks.hws[clkid]);
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/linux-master/drivers/clk/samsung/ |
H A D | clk-exynos-clkout.c | 120 struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS), 176 clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout", 181 if (IS_ERR(clkout->data.hws[0])) { 182 ret = PTR_ERR(clkout->data.hws[0]); 194 clk_hw_unregister(clkout->data.hws[0]); 212 clk_hw_unregister(clkout->data.hws[0]);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
H A D | dcn20_hwseq.c | 66 hws->ctx 68 hws->regs->reg 72 hws->shifts->field_name, hws->masks->field_name 299 struct dce_hwseq *hws, 348 void dcn20_dccg_init(struct dce_hwseq *hws) argument 373 struct dce_hwseq *hws) 400 struct dce_hwseq *hws = dc->hwseq; local 462 hws->funcs.wait_for_blank_complete(opp); 466 struct dce_hwseq *hws, 298 dcn20_enable_power_gating_plane( struct dce_hwseq *hws, bool enable) argument 372 dcn20_disable_vga( struct dce_hwseq *hws) argument 465 dcn20_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 542 dcn20_dpp_pg_control( struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) argument 616 dcn20_hubp_pg_control( struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) argument 695 struct dce_hwseq *hws = dc->hwseq; local 819 struct dce_hwseq *hws = dc->hwseq; local 1098 struct dce_hwseq *hws = dc->hwseq; local 1264 dcn20_power_on_plane_resources( struct dce_hwseq *hws, struct pipe_ctx *pipe_ctx) argument 1658 struct dce_hwseq *hws = dc->hwseq; local 1862 struct dce_hwseq *hws = dc->hwseq; local 1988 struct dce_hwseq *hws = dc->hwseq; local 2351 struct dce_hwseq *hws = dc->hwseq; local 2471 struct dce_hwseq *hws = dc->hwseq; local 2486 struct dce_hwseq *hws = dc->hwseq; local 2519 dcn20_init_vm_ctx( struct dce_hwseq *hws, struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid) argument 2541 dcn20_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument 2621 struct dce_hwseq *hws = link->dc->hwseq; local 2752 struct dce_hwseq *hws = dc->hwseq; local 2880 struct dce_hwseq *hws = dc->hwseq; local 2971 struct dce_hwseq *hws = dc->hwseq; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
H A D | dcn35_hwseq.c | 65 hws->ctx 67 hws->regs->reg 74 hws->shifts->field_name, hws->masks->field_name 78 struct dce_hwseq *hws = dc->hwseq; 116 void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable) argument 125 void dcn35_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) argument 133 struct dce_hwseq *hws = dc->hwseq; local 143 //dcn35_set_dmu_fgcg(hws, dc->debug.enable_fine_grain_clock_gating.bits.dmu); 147 hws 487 dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) argument 498 dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_on) argument 509 dcn35_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) argument 568 dcn35_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) argument 710 struct dce_hwseq *hws = dc->hwseq; local 968 struct dce_hwseq *hws = dc->hwseq; local [all...] |
/linux-master/drivers/clk/mstar/ |
H A D | clk-msc313-mpll.c | 107 mpll->clk_data = devm_kzalloc(dev, struct_size(mpll->clk_data, hws, 123 mpll->clk_data->hws[0] = &mpll->clk_hw; 134 mpll->clk_data->hws[i + 1] = divhw;
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/linux-master/drivers/clk/bcm/ |
H A D | clk-bcm63268-timer.c | 161 hw = devm_kzalloc(&pdev->dev, struct_size(hw, data.hws, maxbit), 172 hw->data.hws[i] = ERR_PTR(-ENODEV); 186 hw->data.hws[entry->bit] = clk;
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/linux-master/drivers/clk/ralink/ |
H A D | clk-mt7621.c | 158 struct clk_hw **hws = clk_data->hws; local 171 hws[sclk->idx] = &sclk->hw; 203 struct clk_hw **hws = clk_data->hws; local 218 hws[sclk->idx] = sclk->hw; 321 struct clk_hw **hws = clk_data->hws; local 334 hws[i] = &sclk->hw; 375 clk_data = kzalloc(struct_size(clk_data, hws, coun [all...] |