Searched refs:hwirq (Results 126 - 150 of 384) sorted by relevance

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/linux-master/arch/arm/mach-imx/
H A Dcommon.h81 void imx_gpc_hwirq_mask(unsigned int hwirq);
82 void imx_gpc_hwirq_unmask(unsigned int hwirq);
H A Dtzic.c52 static int tzic_set_irq_fiq(unsigned int hwirq, unsigned int type) argument
56 index = hwirq >> 5;
59 mask = 1U << (hwirq & 0x1F);
76 int idx = d->hwirq >> 5;
83 int idx = d->hwirq >> 5;
/linux-master/arch/arc/kernel/
H A Dintc-compact.c69 ienb &= ~(1 << data->hwirq);
78 ienb |= (1 << data->hwirq);
/linux-master/arch/mips/kernel/
H A Dirq.c112 void __irq_entry do_domain_IRQ(struct irq_domain *domain, unsigned int hwirq) argument
116 generic_handle_domain_irq(domain, hwirq);
/linux-master/arch/powerpc/include/asm/
H A Dpnv-pci.h31 int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
34 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
/linux-master/drivers/irqchip/
H A Dirq-mtk-cirq.c84 unsigned int cirq_num = data->hwirq;
146 unsigned long *hwirq,
162 *hwirq = fwspec->param[1] - cirq_data->ext_irq_start;
174 irq_hw_number_t hwirq; local
179 ret = mtk_cirq_domain_translate(domain, fwspec, &hwirq, &type);
186 irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
144 mtk_cirq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
H A Dirq-orion.c44 u32 hwirq = __fls(stat); local
46 gc->irq_base + hwirq);
47 stat &= ~(1 << hwirq);
117 u32 hwirq = __fls(stat); local
119 generic_handle_domain_irq(d, gc->irq_base + hwirq);
120 stat &= ~(1 << hwirq);
H A Dirq-uniphier-aidet.c79 uniphier_aidet_detconf_update(priv, data->hwirq, val);
112 irq_hw_number_t hwirq; local
119 ret = uniphier_aidet_domain_translate(domain, arg, &hwirq, &type);
137 if (hwirq >= UNIPHIER_AIDET_NR_IRQS)
140 ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
150 parent_fwspec.param[1] = hwirq;
H A Dirq-renesas-rza1.c107 unsigned int hwirq = fwspec->param[0]; local
112 ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &priv->chip,
118 spec.param_count = priv->map[hwirq].args_count;
120 spec.param[i] = priv->map[hwirq].args[i];
126 struct irq_fwspec *fwspec, unsigned long *hwirq,
132 *hwirq = fwspec->param[0];
125 rza1_irqc_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
H A Dirq-riscv-aplic-msi.c57 writel(d->hwirq, priv->regs + APLIC_SETIPNUM_LE);
73 target += (d->hwirq - 1) * sizeof(u32);
106 target += (d->hwirq - 1) * sizeof(u32);
116 arg->hwirq = (u32)desc->data.icookie.value;
120 unsigned long *hwirq, unsigned int *type)
125 return aplic_irqdomain_translate(fwspec, priv->gsi_base, hwirq, type);
119 aplic_msi_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
H A Dirq-mxs.c65 * mask lower part of hwirq to convert it
68 return bit << ((d->hwirq & 3) << 3);
74 /* offset = hwirq / intr_per_reg * 0x10 */
75 return icoll_priv.intr + ((d->hwirq >> 2) * 0x10);
92 icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq));
98 icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq));
109 __raw_writel(ASM9260_BM_CLEAR_BIT(d->hwirq),
111 ASM9260_HW_ICOLL_CLEARn(d->hwirq));
H A Dirq-pic32-evic.c45 unsigned int hwirq; local
47 hwirq = readl(evic_base + REG_INTSTAT) & 0xFF;
48 do_domain_IRQ(evic_irq_domain, hwirq);
88 if (priv->ext_irqs[i] == data->hwirq) {
195 u32 hwirq; local
199 of_property_for_each_u32(node, pname, prop, p, hwirq) {
206 priv->ext_irqs[i] = hwirq;
H A Dirq-vic.c184 irq_hw_number_t hwirq)
189 if (!(v->valid_sources & (1 << hwirq)))
219 u32 stat, hwirq; local
226 hwirq = ffs(stat) - 1;
227 generic_handle_domain_irq(vic->domain, hwirq);
308 unsigned int irq = d->hwirq;
317 unsigned int irq = d->hwirq;
324 unsigned int irq = d->hwirq;
346 unsigned int off = d->hwirq;
183 vic_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument
H A Dirq-atmel-aic-common.c116 u32 hwirq; local
123 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, hwirq) {
124 gc = irq_get_domain_generic_chip(domain, hwirq);
127 hwirq, domain->revmap_size);
132 aic->ext_irqs |= (1 << (hwirq % 32));
H A Dirq-davinci-cp-intc.c57 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
64 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR);
70 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
78 reg = BIT_WORD(d->hwirq);
79 mask = BIT_MASK(d->hwirq);
H A Dirq-riscv-aplic-main.c21 writel(d->hwirq, priv->regs + APLIC_SETIENUM);
28 writel(d->hwirq, priv->regs + APLIC_CLRIENUM);
58 sourcecfg += (d->hwirq - 1) * sizeof(u32);
65 unsigned long *hwirq, unsigned int *type)
73 *hwirq = fwspec->param[0] - gsi_base;
64 aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base, unsigned long *hwirq, unsigned int *type) argument
/linux-master/drivers/mfd/
H A Dmt6397-irq.c41 int shift = data->hwirq & 0xf;
42 int reg = data->hwirq >> 4;
50 int shift = data->hwirq & 0xf;
51 int reg = data->hwirq >> 4;
59 int shift = irq_data->hwirq & 0xf;
60 int reg = irq_data->hwirq >> 4;
H A Dmt6358-irq.c77 unsigned int hwirq = irqd_to_hwirq(data); local
81 irqd->enable_hwirq[hwirq] = true;
86 unsigned int hwirq = irqd_to_hwirq(data); local
90 irqd->enable_hwirq[hwirq] = false;
144 unsigned int hwirq, virq; local
166 hwirq = irqd->pmic_ints[top_gp].hwirq_base +
169 virq = irq_find_mapping(chip->irq_domain, hwirq);
/linux-master/drivers/gpio/
H A Dgpio-nomadik.c82 writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
161 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);
163 if (!nmk_chip->is_mobileye_soc && !(nmk_chip->real_wake & BIT(d->hwirq)))
164 __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);
204 __nmk_gpio_set_wake(nmk_chip, d->hwirq, on);
207 nmk_chip->real_wake |= BIT(d->hwirq);
209 nmk_chip->real_wake &= ~BIT(d->hwirq);
235 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);
238 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
240 nmk_chip->edge_rising &= ~BIT(d->hwirq);
[all...]
H A Dgpio-idt3243x.c64 ilevel |= BIT(d->hwirq);
66 ilevel &= ~BIT(d->hwirq);
80 writel(~BIT(d->hwirq), ctrl->gpio + IDT_GPIO_ISTAT);
91 ctrl->mask_cache |= BIT(d->hwirq);
108 ctrl->mask_cache &= ~BIT(d->hwirq);
/linux-master/drivers/staging/greybus/
H A Dgpio.c233 static void _gb_gpio_irq_mask(struct gb_gpio_controller *ggc, u8 hwirq) argument
239 request.which = hwirq;
247 static void _gb_gpio_irq_unmask(struct gb_gpio_controller *ggc, u8 hwirq) argument
253 request.which = hwirq;
262 u8 hwirq, u8 type)
268 request.which = hwirq;
282 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
292 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
302 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
348 struct gb_gpio_line *line = &ggc->lines[d->hwirq];
261 _gb_gpio_irq_set_type(struct gb_gpio_controller *ggc, u8 hwirq, u8 type) argument
[all...]
/linux-master/arch/powerpc/platforms/powernv/
H A Dvas.c55 uint32_t chipid, hwirq; local
110 hwirq = xive_native_alloc_irq_on_chip(chipid);
111 if (!hwirq) {
117 vinst->virq = irq_create_mapping(NULL, hwirq);
120 vinst->vas_id, hwirq);
/linux-master/drivers/clocksource/
H A Djcore-pit.c137 unsigned long hwirq; local
209 hwirq = irq_get_irq_data(pit_irq)->hwirq;
210 irqprio = (hwirq >> 2) & PIT_PRIO_MASK;
212 | (hwirq << PIT_IRQ_SHIFT)
/linux-master/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_phy.c364 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
369 wr32(wx, WX_GPIO_EOI, BIT(hwirq));
376 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
380 gpiochip_disable_irq(gc, hwirq);
383 wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), BIT(hwirq));
390 irq_hw_number_t hwirq = irqd_to_hwirq(d); local
394 gpiochip_enable_irq(gc, hwirq);
397 wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), 0);
420 irq_hw_number_t hwirq local
468 irq_hw_number_t hwirq; local
497 irq_hw_number_t hwirq; local
[all...]
/linux-master/drivers/pci/controller/
H A Dpcie-apple.c191 msg->data = data->hwirq;
210 int ret, hwirq; local
214 hwirq = bitmap_find_free_region(pcie->bitmap, pcie->nvecs,
219 if (hwirq < 0)
222 fwspec.param[fwspec.param_count - 2] += hwirq;
229 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
245 bitmap_release_region(pcie->bitmap, d->hwirq, order_base_2(nr_irqs));
265 writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKSET);
272 writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKCLR);
275 static bool hwirq_is_intx(unsigned int hwirq) argument
411 unsigned int hwirq = irq_domain_get_irq_data(port->domain, irq)->hwirq; local
433 unsigned int hwirq; member in struct:__anon2125
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