/linux-master/arch/riscv/kernel/ |
H A D | fpu.S | 71 fld f0, TASK_THREAD_F0_F0(a0) 72 fld f1, TASK_THREAD_F1_F0(a0) 73 fld f2, TASK_THREAD_F2_F0(a0) 74 fld f3, TASK_THREAD_F3_F0(a0) 75 fld f4, TASK_THREAD_F4_F0(a0) 76 fld f5, TASK_THREAD_F5_F0(a0) 77 fld f6, TASK_THREAD_F6_F0(a0) 78 fld f7, TASK_THREAD_F7_F0(a0) 79 fld f8, TASK_THREAD_F8_F0(a0) 80 fld f [all...] |
/linux-master/include/linux/mlx5/ |
H A D | device.h | 51 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld) 52 #define __mlx5_bit_off(typ, fld) (offsetof(struct mlx5_ifc_##typ##_bits, fld)) 53 #define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16) 54 #define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32) 55 #define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 6 [all...] |
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/ |
H A D | en_stats.h | 45 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld) 46 #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld) 47 #define MLX5E_DECLARE_TX_STAT(type, fld) "tx%d_"#fld, offsetof(type, fld) 48 #define MLX5E_DECLARE_XDPSQ_STAT(type, fld) "t [all...] |
/linux-master/arch/riscv/kvm/ |
H A D | vcpu_switch.S | 368 fld f0, KVM_ARCH_FP_D_F0(a0) 369 fld f1, KVM_ARCH_FP_D_F1(a0) 370 fld f2, KVM_ARCH_FP_D_F2(a0) 371 fld f3, KVM_ARCH_FP_D_F3(a0) 372 fld f4, KVM_ARCH_FP_D_F4(a0) 373 fld f5, KVM_ARCH_FP_D_F5(a0) 374 fld f6, KVM_ARCH_FP_D_F6(a0) 375 fld f7, KVM_ARCH_FP_D_F7(a0) 376 fld f8, KVM_ARCH_FP_D_F8(a0) 377 fld f [all...] |
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/diag/ |
H A D | fs_tracepoint.c | 39 #define MASK_VAL(type, spec, name, mask, val, fld) \ 41 {.m = MLX5_GET(spec, mask, fld),\ 42 .v = MLX5_GET(spec, val, fld)} 43 #define MASK_VAL_BE(type, spec, name, mask, val, fld) \ 45 {.m = MLX5_GET_BE(type, spec, mask, fld),\ 46 .v = MLX5_GET_BE(type, spec, val, fld)} 49 #define GET_MASK_VAL(name, type, mask, val, fld) \ 50 (name.m = MLX5_GET(type, mask, fld), \ 51 name.v = MLX5_GET(type, val, fld), \ 66 #define MASK_VAL_L2(type, name, fld) \ [all...] |
/linux-master/drivers/accel/ivpu/ |
H A D | ivpu_hw_reg_io.h | 50 #define REGB_POLL_FLD(reg, fld, val, timeout_us) \ 55 __func__, #reg, reg, #fld, val); \ 56 r = read_poll_timeout(REGB_RD32_SILENT, var, (FIELD_GET(reg##_##fld##_MASK, var) == (val)),\ 59 __func__, #reg, reg, #fld, r ? "ETIMEDOUT" : "OK", var); \ 63 #define REGV_POLL_FLD(reg, fld, val, timeout_us) \ 68 __func__, #reg, reg, #fld, val); \ 69 r = read_poll_timeout(REGV_RD32_SILENT, var, (FIELD_GET(reg##_##fld##_MASK, var) == (val)),\ 72 __func__, #reg, reg, #fld, r ? "ETIMEDOUT" : "OK", var); \
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/linux-master/arch/loongarch/kernel/ |
H A D | fpu.S | 65 EX fld.d $f0, \base, (0 * FPU_REG_WIDTH) 66 EX fld.d $f1, \base, (1 * FPU_REG_WIDTH) 67 EX fld.d $f2, \base, (2 * FPU_REG_WIDTH) 68 EX fld.d $f3, \base, (3 * FPU_REG_WIDTH) 69 EX fld.d $f4, \base, (4 * FPU_REG_WIDTH) 70 EX fld.d $f5, \base, (5 * FPU_REG_WIDTH) 71 EX fld.d $f6, \base, (6 * FPU_REG_WIDTH) 72 EX fld.d $f7, \base, (7 * FPU_REG_WIDTH) 73 EX fld.d $f8, \base, (8 * FPU_REG_WIDTH) 74 EX fld [all...] |
/linux-master/scripts/gcc-plugins/ |
H A D | latent_entropy_plugin.c | 167 tree fld, lst = TYPE_FIELDS(type); local 170 for (fld = lst; fld; nelt++, fld = TREE_CHAIN(fld)) { 173 fieldtype = TREE_TYPE(fld); 179 *node, name, fld); 183 if (fld) 188 for (fld = lst; fld; fl [all...] |
/linux-master/arch/arm64/include/asm/ |
H A D | kvm_host.h | 1335 #define __expand_field_sign_unsigned(id, fld, val) \ 1336 ((u64)SYS_FIELD_VALUE(id, fld, val)) 1338 #define __expand_field_sign_signed(id, fld, val) \ 1340 u64 __val = SYS_FIELD_VALUE(id, fld, val); \ 1341 sign_extend64(__val, id##_##fld##_WIDTH - 1); \ 1344 #define expand_field_sign(id, fld, val) \ 1345 (id##_##fld##_SIGNED ? \ 1346 __expand_field_sign_signed(id, fld, val) : \ 1347 __expand_field_sign_unsigned(id, fld, val)) 1349 #define get_idreg_field_unsigned(kvm, id, fld) \ [all...] |
H A D | el2_setup.h | 237 .macro __check_override idreg, fld, width, pass, fail, tmp1, tmp2 variable 238 ubfx \tmp1, \tmp1, #\fld, #\width variable 244 ubfx \tmp2, \tmp2, #\fld, #\width variable 245 ubfx \tmp1, \tmp1, #\fld, #\width variable 254 .macro check_override idreg, fld, pass, fail, tmp1, tmp2 variable 256 __check_override \idreg \fld 4 \pass \fail \tmp1 \tmp2 260 .macro __check_override idreg, fld, width, pass, fail, tmp, ignore 262 ubfx \tmp, \tmp, #\fld, #\width 267 .macro check_override idreg, fld, pass, fail, tmp, ignore 268 __check_override \idreg \fld [all...] |
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
H A D | tout.c | 106 #define MLX5_TIMEOUT_QUERY(fld, reg_out) \ 112 time_field = MLX5_ADDR_OF(dtor_reg, reg_out, fld); \ 119 #define MLX5_TIMEOUT_FILL(fld, reg_out, dev, to_type, to_extra) \ 121 u64 fw_to = MLX5_TIMEOUT_QUERY(fld, reg_out); \
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/linux-master/arch/loongarch/include/asm/ |
H A D | asmmacro.h | 171 fld.d $f0, \tmp, THREAD_FPR0 - THREAD_FPR0 172 fld.d $f1, \tmp, THREAD_FPR1 - THREAD_FPR0 173 fld.d $f2, \tmp, THREAD_FPR2 - THREAD_FPR0 174 fld.d $f3, \tmp, THREAD_FPR3 - THREAD_FPR0 175 fld.d $f4, \tmp, THREAD_FPR4 - THREAD_FPR0 176 fld.d $f5, \tmp, THREAD_FPR5 - THREAD_FPR0 177 fld.d $f6, \tmp, THREAD_FPR6 - THREAD_FPR0 178 fld.d $f7, \tmp, THREAD_FPR7 - THREAD_FPR0 179 fld.d $f8, \tmp, THREAD_FPR8 - THREAD_FPR0 180 fld [all...] |
/linux-master/drivers/clk/baikal-t1/ |
H A D | ccu-pll.c | 385 struct ccu_pll_dbgfs_fld *fld = priv; local 386 struct ccu_pll *pll = fld->pll; 390 val = clamp_t(u64, val, fld->min, fld->max); 391 data = ((val - 1) << fld->lsb) & fld->mask; 394 regmap_update_bits(pll->sys_regs, pll->reg_ctl + fld->reg, fld->mask, 427 struct ccu_pll_dbgfs_fld *fld = priv; local 428 struct ccu_pll *pll = fld [all...] |
/linux-master/drivers/net/ethernet/netronome/nfp/ |
H A D | nfp_net_xsk.c | 24 rx_ring->rxds[idx].fld.reserved = 0; 25 rx_ring->rxds[idx].fld.meta_len_dd = 0; 77 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld,
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/linux-master/drivers/perf/ |
H A D | arm_spe_pmu.c | 976 int fld; local 981 fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64DFR0_EL1), 983 if (!fld) { 986 fld, smp_processor_id()); 989 spe_pmu->pmsver = (u16)fld; 1000 fld = FIELD_GET(PMBIDR_EL1_ALIGN, reg); 1001 spe_pmu->align = 1 << fld; 1004 fld, smp_processor_id()); 1032 fld = FIELD_GET(PMSIDR_EL1_INTERVAL, reg); 1033 switch (fld) { [all...] |
/linux-master/drivers/media/platform/ti/vpe/ |
H A D | vpdma.h | 200 #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) 201 #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld)
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/linux-master/drivers/power/supply/ |
H A D | mp2629_charger.c | 172 enum mp2629_field fld, 178 ret = regmap_field_read(charger->regmap_fields[fld], &rval); 182 val->intval = rval * props[fld].step + props[fld].min; 188 enum mp2629_field fld, 193 if (val->intval < props[fld].min || val->intval > props[fld].max) 196 rval = (val->intval - props[fld].min) / props[fld].step; 197 return regmap_field_write(charger->regmap_fields[fld], rva 171 mp2629_get_prop(struct mp2629_charger *charger, enum mp2629_field fld, union power_supply_propval *val) argument 187 mp2629_set_prop(struct mp2629_charger *charger, enum mp2629_field fld, const union power_supply_propval *val) argument [all...] |
/linux-master/arch/arm64/mm/ |
H A D | context.c | 45 int fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64MMFR0_EL1), local 48 switch (fld) { 51 smp_processor_id(), fld);
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/linux-master/drivers/irqchip/ |
H A D | irq-gic-v4.c | 96 unsigned long fld, reg = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); local 98 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64PFR0_EL1_GIC_SHIFT); 100 return fld >= 0x3;
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/linux-master/drivers/net/ethernet/intel/ice/ |
H A D | ice_flow.c | 891 * @fld: ID of field to be extracted 900 u8 seg, enum ice_flow_field fld, u64 match) 913 switch (fld) { 937 if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL) 939 else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT) 956 if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL) 958 else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT) 1027 sib = fld == ICE_FLOW_FIELD_IDX_ICMP_TYPE ? 1043 flds[fld].xtrct.prot_id = prot_id; 1044 flds[fld] 899 ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, u8 seg, enum ice_flow_field fld, u64 match) argument 1723 ice_flow_set_fld_ext(struct ice_flow_seg_info *seg, enum ice_flow_field fld, enum ice_flow_fld_match_type field_type, u16 val_loc, u16 mask_loc, u16 last_loc) argument 1762 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld, u16 val_loc, u16 mask_loc, u16 last_loc, bool range) argument [all...] |
/linux-master/tools/lib/bpf/ |
H A D | bpf_core_read.h | 47 #define __CORE_BITFIELD_PROBE_READ(dst, src, fld) \ 50 __CORE_RELO(src, fld, BYTE_SIZE), \ 51 (const void *)src + __CORE_RELO(src, fld, BYTE_OFFSET)) 57 #define __CORE_BITFIELD_PROBE_READ(dst, src, fld) \ 59 (void *)dst + (8 - __CORE_RELO(src, fld, BYTE_SIZE)), \ 60 __CORE_RELO(src, fld, BYTE_SIZE), \ 61 (const void *)src + __CORE_RELO(src, fld, BYTE_OFFSET))
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/linux-master/drivers/iommu/arm/arm-smmu-v3/ |
H A D | arm-smmu-v3-sva.c | 472 unsigned long reg, fld; local 492 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_PARANGE_SHIFT); 493 oas = id_aa64mmfr0_parange_to_phys_shift(fld); 498 fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_ASIDBITS_SHIFT); 499 asid_bits = fld ? 16 : 8;
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/linux-master/drivers/net/ethernet/ti/ |
H A D | davinci_cpdma.c | 174 #define chan_read(chan, fld) readl((chan)->fld) 175 #define desc_read(desc, fld) readl(&(desc)->fld) 177 #define chan_write(chan, fld, v) writel(v, (chan)->fld) 178 #define desc_write(desc, fld, v) writel((u32)(v), &(desc)->fld)
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/linux-master/drivers/net/ethernet/cisco/enic/ |
H A D | vnic_devcmd.h | 537 #define FILTER_FIELD_VALID(fld) (1 << (fld - 1))
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/linux-master/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_smp.c | 227 int fld = blk % 3; local 231 switch (fld) {
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