Searched refs:duty_cycle (Results 76 - 100 of 116) sorted by relevance

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/linux-master/drivers/pwm/
H A Dpwm-rcar.c183 ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period);
H A Dpwm-berlin.c178 err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-brcmstb.c210 err = brcmstb_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-vt8500.c210 * pwm->state.period && state->duty_cycle == pwm->state.duty_cycle
215 err = vt8500_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-spear.c178 err = spear_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-stmpe.c277 err = stmpe_24xx_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-jz4740.c162 tmp = (unsigned long long)rate * state->duty_cycle;
H A Dpwm-lp3943.c197 err = lp3943_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-atmel-hlcdc.c51 u64 pwmcval = state->duty_cycle * 256;
H A Dpwm-bcm2835.c99 val = DIV_ROUND_CLOSEST_ULL(state->duty_cycle * pc->rate, NSEC_PER_SEC);
H A Dpwm-meson.c154 duty = state->duty_cycle;
265 * and "period == duty_cycle". This results in a signal
326 state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
H A Dpwm-omap-dmtimer.c25 * is updated while the pwm pin is high, current pwm period/duty_cycle
28 * - duty_cycle for current period = current period + new duty_cycle.
143 * Return 0 if successfully changed the period/duty_cycle else appropriate
285 ret = pwm_omap_dmtimer_config(chip, pwm, state->duty_cycle,
H A Dpwm-mediatek.c217 err = pwm_mediatek_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-tiecap.c194 err = ecap_pwm_config(chip, pwm, state->duty_cycle,
H A Dpwm-tegra.c256 err = tegra_pwm_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-bcm-kona.c262 err = kona_pwmc_config(chip, pwm, state->duty_cycle, state->period);
H A Dpwm-renesas-tpu.c421 state->duty_cycle, state->period, enabled);
/linux-master/drivers/bus/
H A Dts-nbus.c294 state.duty_cycle = state.period;
/linux-master/drivers/phy/microchip/
H A Dsparx5_serdes.c113 u8 duty_cycle; /* Set output level to half/full */ member in struct:sparx5_sd25g28_args
241 u8 duty_cycle; /* Set output level to half/full */ member in struct:sparx5_sd10g28_mode_preset
567 .duty_cycle = 0x2,
576 .duty_cycle = 0x0,
585 .duty_cycle = 0x0,
594 .duty_cycle = 0x0,
603 .duty_cycle = 0x0,
612 .duty_cycle = 0x0,
837 .cfg_lane_reserve_15_8 = mode->duty_cycle,
/linux-master/drivers/video/backlight/
H A Dlp855x_bl.c234 state.duty_cycle = div_u64(br * state.period, max_br);
235 state.enabled = state.duty_cycle;
/linux-master/drivers/media/pci/cx23885/
H A Dcx23885-input.c190 params.duty_cycle = 33; /* percent, 33 percent for NEC */
/linux-master/drivers/media/rc/
H A Dite-cir.c86 static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle) argument
97 on_ns = period_ns * duty_cycle / 100;
315 static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle) argument
321 dev->tx_duty_cycle = duty_cycle;
/linux-master/drivers/leds/rgb/
H A Dleds-qcom-lpg.c1237 lpg_calc_duty(chan, state->duty_cycle);
1290 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk);
1293 state->duty_cycle = 0;
1303 if (state->duty_cycle > state->period)
1304 state->duty_cycle = state->period;
/linux-master/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dmcu.h26 u8 duty_cycle; member in struct:mt7915_mcu_thermal_ctrl::__anon2081::__anon2083
/linux-master/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1401 * - Changing both period and duty_cycle is not done atomically, neither is the
1503 backlight = div64_u64(state->duty_cycle * pdata->pwm_refclk_freq,
1569 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight,
1572 if (state->duty_cycle > state->period)
1573 state->duty_cycle = state->period;

Completed in 204 milliseconds

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