Searched refs:display (Results 276 - 300 of 340) sorted by relevance

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/linux-master/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c28 #include "display/intel_de.h"
29 #include "display/intel_display.h"
30 #include "display/intel_display_trace.h"
31 #include "display/intel_fbc_regs.h"
32 #include "display/skl_watermark.h"
97 * Lower the display internal timeout.
216 /* The below fixes the weird display corruption, a few pixels shifted
223 if (i915->display.vbt.fdi_rx_polarity_inverted)
742 * gated and also apply various GT and display specific workarounds for these
H A Di915_debugfs.c36 #include "display/intel_display_params.h"
420 str_enabled_disabled(!dev_priv->display.power.domains.init_wakeref));
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c25 #include <drm/display/drm_dp_helper.h>
195 * Dongle connected, but no display. Don't bother reading
/linux-master/include/drm/display/
H A Ddrm_dp_helper.h29 #include <drm/display/drm_dp.h>
493 * physical presence of a display. For eDP, for instance, a display is
H A Ddrm_dp_mst_helper.h26 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_display.h577 if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, format)) \
H A Dintel_display_power_map.c110 I915_PW("display", &hsw_pwdoms_display,
144 I915_PW("display", &bdw_pwdoms_display,
203 I915_PW("display", &vlv_pwdoms_display,
285 I915_PW("display", &chv_pwdoms_display),
1627 display.power.domains);
1686 display.power.domains);
H A Dg4x_dp.c1146 * If display is now connected check links status,
1206 u32 bit = dev_priv->display.hotplug.pch_hpd[encoder->hpd_pin];
1237 u32 bit = dev_priv->display.hotplug.hpd[encoder->hpd_pin];
H A Dintel_vdsc.c10 #include <drm/display/drm_dsc_helper.h>
H A Di9xx_plane.c131 return dev_priv->display.fbc[INTEL_FBC_A];
275 "Unable to find suitable display surface offset due to X-tiling\n");
675 * display power wells.
H A Dintel_dp_link_training.c1405 if (!passed && i915->display.hotplug.ignore_long_hpd) {
/linux-master/tools/power/pm-graph/
H A Dsleepgraph.py92 display = '' variable in class:SystemValues
2737 # all the html properties to display it correctly
2778 # The total number of rows needed to display this phase of the timeline
2819 # The total number of rows needed to display this phase of the timeline
2944 # The html code needed to display the time scale
4903 hf.write('<div id="devicedetail" style="display:none;">\n')
4934 hf.write('<div id="testlog" style="display:none;">\n'+sysvals.logmsg+'</div>\n')
4937 hf.write('<div id="dmesglog" style="display:none;">\n')
4946 hf.write('<div id="ftracelog" style="display:none;">\n')
5016 .hide {display
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/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c7 #include <drm/display/drm_dp_aux_bus.h>
8 #include <drm/display/drm_dp.h>
9 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/bridge/analogix/
H A Danx7625.c23 #include <drm/display/drm_dp_aux_bus.h>
24 #include <drm/display/drm_dp_helper.h>
25 #include <drm/display/drm_hdcp_helper.h>
928 DRM_DEV_ERROR(dev, "mipi not set display timing yet.\n");
H A Danalogix-anx78xx.c21 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c26 #include <drm/display/drm_dp_aux_bus.h>
27 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/panel/
H A Dpanel-edp.c38 #include <drm/display/drm_dp_aux_bus.h>
39 #include <drm/display/drm_dp_helper.h>
123 * @enable: Time for the panel to display a valid frame.
126 * display the first valid frame after starting to receive
136 * @disable: Time for the panel to turn the display off.
139 * turn the display off (no content is visible).
179 * @timings: Pointer to array of display timings
195 * @size.width: Width (in mm) of the active display area.
200 * @size.height: Height (in mm) of the active display area.
366 * We should only ever have either the display timing
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c26 #include <drm/display/drm_dp_helper.h>
27 #include <drm/display/drm_dp_mst_helper.h>
242 * This case will return NULL: DSC capabe MST dock connected to a non fec/dsc capable display
377 /* when display is unplugged from mst hub, connctor will be
381 * amdgpu_dm_atomic_commit_tail. if the same display is
382 * plugged back with same display index, its hdcp properties
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c29 #include <drm/display/drm_dp.h>
/linux-master/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c26 #include <drm/display/drm_dsc_helper.h>
H A Ddcn20_dsc.h29 #include <drm/display/drm_dsc.h>
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_mode.h33 #include <drm/display/drm_dp_helper.h>
H A Datombios_dp.c33 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/rockchip/
H A Dcdn-dp-core.c18 #include <drm/display/drm_dp_helper.h>
/linux-master/drivers/gpu/drm/xe/
H A Dxe_pci.c18 #include "display/xe_display.h"
762 drm_dbg(&xe->drm, "%s %s %04x:%04x dgfx:%d gfx:%s (%d.%02d) media:%s (%d.%02d) display:%s dma_m_s:%d tc:%d gscfi:%d",
780 xe_step_name(xe->info.step.display),

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