Searched refs:cycle (Results 1 - 25 of 92) sorted by relevance

1234

/linux-master/scripts/
H A Dheaderdep.pl114 # $cycle[n] includes $cycle[n + 1];
115 # $cycle[-1] will be the culprit
116 my $cycle = shift;
119 for my $i (0 .. $#$cycle - 1) {
120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0];
122 $cycle->[-1]->[0] = 0;
124 my $first = shift @$cycle;
125 my $last = pop @$cycle;
[all...]
/linux-master/include/linux/
H A Dptp_kvm.h19 int kvm_arch_ptp_get_crosststamp(u64 *cycle,
/linux-master/drivers/staging/vme_user/
H A Dvme_fake.c49 u32 cycle; member in struct:fake_slave_window
57 u32 cycle; member in struct:fake_master_window
156 dma_addr_t buf_base, u32 aspace, u32 cycle)
213 bridge->slaves[i].cycle = cycle;
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle)
241 *cycle = bridge->slaves[i].cycle;
253 u32 aspace, u32 cycle, u32 dwidth)
321 bridge->masters[i].cycle
154 fake_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t buf_base, u32 aspace, u32 cycle) argument
223 fake_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *buf_base, u32 *aspace, u32 *cycle) argument
251 fake_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
337 __fake_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
358 fake_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
374 fake_lm_check(struct fake_driver *bridge, unsigned long long addr, u32 aspace, u32 cycle) argument
413 fake_vmeread8(struct fake_driver *bridge, unsigned long long addr, u32 aspace, u32 cycle) argument
446 fake_vmeread16(struct fake_driver *bridge, unsigned long long addr, u32 aspace, u32 cycle) argument
479 fake_vmeread32(struct fake_driver *bridge, unsigned long long addr, u32 aspace, u32 cycle) argument
516 u32 aspace, cycle, dwidth; local
610 fake_vmewrite8(struct fake_driver *bridge, u8 *buf, unsigned long long addr, u32 aspace, u32 cycle) argument
640 fake_vmewrite16(struct fake_driver *bridge, u16 *buf, unsigned long long addr, u32 aspace, u32 cycle) argument
670 fake_vmewrite32(struct fake_driver *bridge, u32 *buf, unsigned long long addr, u32 aspace, u32 cycle) argument
704 u32 aspace, cycle, dwidth; local
740 addr + done, aspace, cycle); local
745 addr + done, aspace, cycle); local
755 addr + done, aspace, cycle); local
762 addr + done, aspace, cycle); local
769 aspace, cycle); local
777 addr + done, aspace, cycle); local
784 cycle); local
806 u32 aspace, cycle; local
847 fake_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, u32 aspace, u32 cycle) argument
893 fake_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
H A Dvme_user.h15 __u32 cycle; /* Cycle properties */ member in struct:vme_master
37 __u32 cycle; /* Cycle properties */ member in struct:vme_slave
H A Dvme_tsi148.c468 dma_addr_t pci_base, u32 aspace, u32 cycle)
554 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
566 /* Setup cycle types */
568 if (cycle & VME_BLT)
570 if (cycle & VME_MBLT)
572 if (cycle & VME_2eVME)
574 if (cycle & VME_2eSST)
576 if (cycle & VME_2eSSTB)
584 if (cycle & VME_SUPER)
586 if (cycle
466 tsi148_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, u32 aspace, u32 cycle) argument
609 tsi148_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, u32 *aspace, u32 *cycle) argument
798 tsi148_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
1033 __tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1142 tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1163 u32 aspace, cycle, dwidth; local
1248 u32 aspace, cycle, dwidth; local
1401 tsi148_dma_set_vme_src_attributes(struct device *dev, __be32 *attr, u32 aspace, u32 cycle, u32 dwidth) argument
1499 tsi148_dma_set_vme_dest_attributes(struct device *dev, __be32 *attr, u32 aspace, u32 cycle, u32 dwidth) argument
1900 tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, u32 aspace, u32 cycle) argument
1965 tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
H A Dvme.c137 u32 aspace, cycle, dwidth; local
142 &aspace, &cycle, &dwidth);
149 &buf_base, &aspace, &cycle);
244 * @cycle: Required VME data transfer cycle type.
247 * address space and data transfer cycle.
252 u32 cycle)
276 ((slave_image->cycle_attr & cycle) == cycle) &&
318 * @cycle
251 vme_slave_request(struct vme_dev *vdev, u32 address, u32 cycle) argument
327 vme_slave_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t buf_base, u32 aspace, u32 cycle) argument
377 vme_slave_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *buf_base, u32 *aspace, u32 *cycle) argument
449 vme_master_request(struct vme_dev *vdev, u32 address, u32 cycle, u32 dwidth) argument
528 vme_master_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) argument
579 vme_master_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) argument
1010 vme_dma_vme_attribute(unsigned long long address, u32 aspace, u32 cycle, u32 dwidth) argument
1530 vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, u32 aspace, u32 cycle) argument
1566 vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, u32 *aspace, u32 *cycle) argument
[all...]
/linux-master/drivers/ata/
H A Dlibata-pata-timings.c70 q->cycle = EZ(t->cycle, T);
92 m->cycle = max(a->cycle, b->cycle);
133 * PIO/MW_DMA cycle timing.
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
160 * DMA cycle timin
[all...]
/linux-master/drivers/pwm/
H A Dpwm-sl28cpld.c25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
30 * - The duty cycle will switch immediately and not after a complete cycle.
60 * We calculate the duty cycle like this:
129 unsigned int cycle, prescaler; local
152 cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle);
153 cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler));
157 * cycle if the prescaler is 0. Set prescaler to 1 instead. We don't
163 if (cycle
[all...]
/linux-master/arch/alpha/lib/
H A Dev6-csum_ipv6_magic.S36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence)
116 cmpult $20,$3,$3 # E : (1 cycle stall on $20)
117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20)
120 addq $20,$19,$20 # E : (1 cycle stall on $20)
125 addq $18,$19,$18 # E : (1 cycle stall on $19)
128 /* (1 cycle stall on $18, 2 cycles on $20) */
131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0)
133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0)
136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1)
137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stal
[all...]
H A Dev6-memchr.S67 extqh $6, $16, $6 # U : 2 cycle stall for $6
107 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle
110 addq $0, 2, $3 # E : U L U L : 2 cycle stall on $0
112 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle
115 addq $0, 1, $3 # E : U L U L : 2 cycle stall on $0
117 cmoveq $1, $3, $0 # E : Latency 2, extra map cycle
/linux-master/tools/power/cpupower/bench/
H A Dbenchmark.c80 unsigned int _round, cycle; local
125 for (cycle = 0; cycle < config->cycles; cycle++) {
132 printf("performance cycle took %lius, "
151 for (cycle = 0; cycle < config->cycles; cycle++) {
158 printf("powersave cycle took %lius, "
/linux-master/drivers/clocksource/
H A Dtimer-atmel-pit.c43 u32 cycle; member in struct:pit_data
85 elapsed += PIT_PICNT(t) * data->cycle;
95 pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN);
107 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR));
109 (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN);
132 (data->cycle - 1) | AT91_PIT_PITEN);
153 data->cnt += data->cycle * PIT_PICNT(pit_read(data->base,
210 data->cycle = DIV_ROUND_CLOSEST(pit_rate, HZ);
211 WARN_ON(((data->cycle - 1) & ~AT91_PIT_PIV) != 0);
220 bits = 12 /* PICNT */ + ilog2(data->cycle) /* PI
[all...]
/linux-master/kernel/locking/
H A Dtest-ww_mutex.c288 struct test_cycle *cycle = container_of(work, typeof(*cycle), work); local
293 ww_mutex_lock(&cycle->a_mutex, &ctx);
295 complete(cycle->a_signal);
296 wait_for_completion(&cycle->b_signal);
298 err = ww_mutex_lock(cycle->b_mutex, &ctx);
301 ww_mutex_unlock(&cycle->a_mutex);
302 ww_mutex_lock_slow(cycle->b_mutex, &ctx);
303 erra = ww_mutex_lock(&cycle->a_mutex, &ctx);
307 ww_mutex_unlock(cycle
326 struct test_cycle *cycle = &cycles[n]; local
351 struct test_cycle *cycle = &cycles[n]; local
[all...]
/linux-master/fs/xfs/
H A Dxfs_log_priv.h168 * - ic_size is the full size of the log buffer, minus the cycle headers.
394 * The reservation head lsn is not made up of a cycle number and block number.
395 * Instead, it uses a cycle number and byte number. Logs don't expect to
531 xlog_crack_atomic_lsn(atomic64_t *lsn, uint *cycle, uint *block) argument
535 *cycle = CYCLE_LSN(val);
543 xlog_assign_atomic_lsn(atomic64_t *lsn, uint cycle, uint block) argument
545 atomic64_set(lsn, xlog_assign_lsn(cycle, block));
554 xlog_crack_grant_head_val(int64_t val, int *cycle, int *space) argument
556 *cycle = val >> 32;
561 xlog_crack_grant_head(atomic64_t *head, int *cycle, in argument
563 xlog_crack_grant_head_val(atomic64_read(head), cycle, space); local
567 xlog_assign_grant_head_val(int cycle, int space) argument
573 xlog_assign_grant_head(atomic64_t *head, int cycle, int space) argument
[all...]
H A Dxfs_sysfs.c407 int cycle; local
412 cycle = log->l_curr_cycle;
416 return sysfs_emit(buf, "%d:%d\n", cycle, block);
425 int cycle; local
429 xlog_crack_atomic_lsn(&log->l_tail_lsn, &cycle, &block);
430 return sysfs_emit(buf, "%d:%d\n", cycle, block);
440 int cycle; local
444 xlog_crack_grant_head(&log->l_reserve_head.grant, &cycle, &bytes);
445 return sysfs_emit(buf, "%d:%d\n", cycle, bytes);
454 int cycle; local
[all...]
/linux-master/arch/mips/dec/
H A Dkn02xa-berr.c53 const char *kind, *agent, *cycle, *event; local
72 cycle = mreadstr;
75 cycle = invoker ? writestr : readstr;
84 kind, agent, cycle, event, address);
H A Dkn01-berr.c81 const char *kind, *agent, *cycle, *event; local
126 cycle = mreadstr;
129 cycle = invoker ? writestr : readstr;
138 kind, agent, cycle, event, address);
/linux-master/sound/firewire/
H A Damdtp-stream.c225 // of syt interval. This comes from the interval of isoc cycle. As 1394
477 static unsigned int compute_syt_offset(unsigned int syt, unsigned int cycle, argument
480 unsigned int cycle_lo = (cycle % CYCLES_PER_SECOND) & 0x0f;
527 dst->syt_offset = compute_syt_offset(src->syt, src->cycle, transfer_delay);
680 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle, argument
700 trace_amdtp_packet(s, cycle, cip_header, payload_length + header_length, data_blocks,
803 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle, argument
838 // Handle the cycle so that empty packet arrives.
852 trace_amdtp_packet(s, cycle, cip_header, payload_length, *data_blocks,
872 static inline u32 increment_ohci_cycle_count(u32 cycle, unsigne argument
905 u32 cycle = compute_ohci_cycle_count(ctx_header_tstamp); local
926 unsigned int cycle; local
994 compute_syt(unsigned int syt_offset, unsigned int cycle, unsigned int transfer_delay) argument
1218 unsigned int cycle; local
1263 unsigned int cycle = compute_ohci_it_cycle(ctx_header[offset], queue_size); local
1353 unsigned int cycle; local
1392 unsigned int cycle = compute_ohci_cycle_count(ctx_header[1]); local
1488 unsigned int cycle = UINT_MAX; local
1599 unsigned int cycle = s->next_cycle; local
[all...]
H A Damdtp-stream-trace.h22 __field(unsigned int, cycle)
37 __entry->cycle = cycles % CYCLES_PER_SECOND;
61 __entry->cycle,
/linux-master/drivers/ptp/
H A Dptp_kvm_common.c33 u64 cycle; local
39 ret = kvm_arch_ptp_get_crosststamp(&cycle, &tspec, &cs_id);
48 system_counter->cycles = cycle;
H A Dptp_kvm_x86.c95 int kvm_arch_ptp_get_crosststamp(u64 *cycle, struct timespec64 *tspec, argument
123 *cycle = __pvclock_read_cycles(src, clock_pair->tsc);
/linux-master/drivers/mfd/
H A Datmel-smc.c229 conf->cycle &= ~GENMASK(shift + 15, shift);
230 conf->cycle |= val << shift;
250 regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle);
271 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle);
291 regmap_read(regmap, ATMEL_SMC_CYCLE(cs), &conf->cycle);
312 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle);
/linux-master/drivers/net/ethernet/intel/igc/
H A Digc_tsn.c118 u32 sec, nsec, cycle; local
139 * completed during that cycle.
142 * enabling TSN offload, the cycle should have
254 cycle = adapter->cycle_time;
262 s64 n = div64_s64(ktime_sub_ns(systim, base_time), cycle);
264 base_time = ktime_add_ns(base_time, (n + 1) * cycle);
278 * has to be configured before the cycle time and base time.
297 wr32(IGC_QBVCYCLET_S, cycle);
298 wr32(IGC_QBVCYCLET, cycle);
/linux-master/drivers/net/dsa/sja1105/
H A Dsja1105_tas.c88 dev_dbg(ds->dev, "longest cycle time %lld ns\n", max_cycle_time);
101 * iterate cyclically through the "schedule". Each "cycle" has an entry point
103 * hardware calls each cycle a "subschedule".
105 * Subschedule (cycle) i starts when
123 * |cycle 0|cycle 1|
151 * - cycle 0: iterates the schedule table from 0 to 2 (and back)
152 * - cycle 1: iterates the schedule table from 3 to 5 (and back)
174 int cycle = 0; local
300 schedule_entry_points[cycle]
[all...]
/linux-master/net/sched/
H A Dact_gate.c38 ktime_t now, base, cycle; local
49 cycle = param->tcfg_cycletime;
51 n = div64_u64(ktime_sub_ns(now, base), cycle);
52 *start = ktime_add_ns(base, (n + 1) * cycle);
80 /* cycle start, clear pending bit, clear total octets */
99 ktime_t cycle, base; local
102 cycle = p->tcfg_cycletime;
104 n = div64_u64(ktime_sub_ns(now, base), cycle);
105 close_time = ktime_add_ns(base, (n + 1) * cycle);
406 ktime_t cycle local
[all...]

Completed in 217 milliseconds

1234