Searched refs:clock (Results 451 - 475 of 1872) sorted by relevance

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/linux-master/drivers/usb/host/
H A Dr8a66597.h300 u16 clock = 0; local
304 clock = XTAL12;
307 clock = XTAL24;
310 clock = XTAL48;
313 printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
317 return clock;
/linux-master/kernel/time/
H A Dnamespace.c349 char *clock; local
353 clock = "boottime";
356 clock = "monotonic";
359 clock = "unknown";
362 seq_printf(m, "%-10s %10lld %9ld\n", clock, ts->tv_sec, ts->tv_nsec);
/linux-master/drivers/ata/
H A Dpata_artop.c40 static int clock = 0; variable
109 pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
163 pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
224 u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
262 u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
H A Dpata_legacy.c145 u8 clock[2]; member in struct:legacy_data
488 int clock; local
497 /* Read VLB clock strapping */
498 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
501 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
506 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
563 int clock; local
568 /* Get the clock */
576 /* Read VLB clock strapping */
577 clock
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/linux-master/drivers/gpu/drm/bridge/
H A Dfsl-ldb.c107 static unsigned long fsl_ldb_link_frequency(struct fsl_ldb *fsl_ldb, int clock) argument
110 return clock * 3500;
112 return clock * 7000;
179 requested_link_freq = fsl_ldb_link_frequency(fsl_ldb, mode->clock);
184 dev_warn(fsl_ldb->dev, "Configured LDB clock (%lu Hz) does not match requested LVDS clock: %lu Hz\n",
275 if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 160000 : 80000))
/linux-master/drivers/gpu/drm/i2c/
H A Dsil164_drv.c222 bool duallink = (on && encoder->crtc->mode.clock > 165000);
262 if (mode->clock < 32000)
265 if (mode->clock > 330000 ||
266 (mode->clock > 165000 && !priv->duallink_slave))
278 bool duallink = adjusted_mode->clock > 165000;
/linux-master/drivers/mmc/host/
H A Dsdhci-iproc.c78 if (host->clock <= 400000) {
79 /* Round up to micro-second four SD clock delay */
80 if (host->clock)
81 udelay((4 * 1000000 + host->clock - 1) / host->clock);
89 * writes to the same register that are within two SD-card clock cycles of
90 * each other (a clock domain crossing problem). The data
164 return pltfm_host->clock;
169 * controller will hang when the difference between the core clock and the bus
170 * clock i
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/linux-master/drivers/gpu/drm/panel/
H A Dpanel-tpo-tpg110.c57 * @bus_flags: the DRM bus flags for this panel e.g. inverted clock
105 .clock = 33200,
121 .clock = 25200,
137 .clock = 9000,
153 .clock = 20500,
169 .clock = 8300,
223 * The last bit/clock is Hi-Z turnaround cycle, so we need
/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_g200er.c69 long clock = new_crtc_state->mode.clock; local
96 if (computed > clock)
97 tmpdelta = computed - clock;
99 tmpdelta = clock - computed;
/linux-master/drivers/media/rc/
H A Dmeson-ir-tx.c96 * Disable the TX, set modulator clock tick and set initialize
286 struct clk *clock; local
291 clock = devm_clk_get(ir->dev, "xtal");
292 if (IS_ERR(clock) || clk_prepare_enable(clock))
296 ir->clk_rate = clk_get_rate(clock) / 3;
337 return dev_err_probe(dev, ret, "modulator clock setup failed\n");
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_audio.c439 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) argument
446 radeon_encoder->audio->set_dto(rdev, crtc, clock);
493 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) argument
500 cts = clock * 1000;
530 static const struct radeon_hdmi_acr *radeon_audio_acr(unsigned int clock) argument
552 if (hdmi_predefined_acr[i].clock == clock)
556 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
557 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
558 radeon_audio_calc_cts(clock,
566 radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) argument
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/linux-master/tools/perf/util/
H A Ddata-convert-bt.c15 #include <babeltrace/ctf-writer/clock.h>
68 struct bt_ctf_clock *clock; member in struct:ctf_writer
827 bt_ctf_clock_set_time(cw->clock, sample->time);
894 bt_ctf_clock_set_time(cw->clock, sample->time); \
1397 struct bt_ctf_clock *clock = cw->clock; local
1398 const char *desc = "perf clock";
1404 if (!env->clock.enabled) {
1405 pr_err("Can't provide --tod time, missing clock data. "
1410 desc = clockid_name(env->clock
1513 struct bt_ctf_clock *clock; local
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/linux-master/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-core.c785 if (IS_ERR(fimc->clock[i]))
787 clk_unprepare(fimc->clock[i]);
788 clk_put(fimc->clock[i]);
789 fimc->clock[i] = ERR_PTR(-EINVAL);
798 fimc->clock[i] = ERR_PTR(-EINVAL);
801 fimc->clock[i] = clk_get(&fimc->pdev->dev, fimc_clocks[i]);
802 if (IS_ERR(fimc->clock[i])) {
803 ret = PTR_ERR(fimc->clock[i]);
806 ret = clk_prepare(fimc->clock[i]);
808 clk_put(fimc->clock[
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/linux-master/arch/powerpc/boot/dts/fsl/
H A Dp1023si-post.dtsi65 clock-frequency = <33333333>;
84 clock-frequency = <33333333>;
103 clock-frequency = <33333333>;
H A Dqoriq-mpic4.3.dtsi42 clock-frequency = <0x0>;
/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi.c415 mode->clock == 74250 &&
651 unsigned int clock; member in struct:hdmi_acr_n
669 * @clock: rounded TMDS clock in kHz
671 static unsigned int hdmi_recommended_n(unsigned int freq, unsigned int clock) argument
677 if (clock == hdmi_rec_n_table[i].clock)
702 static unsigned int hdmi_mode_clock_to_hz(unsigned int clock) argument
704 switch (clock) {
714 return clock * 100
749 mtk_hdmi_hw_aud_set_ncts(struct mtk_hdmi *hdmi, unsigned int sample_rate, unsigned int clock) argument
836 mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock) argument
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/linux-master/drivers/gpu/drm/exynos/
H A Dexynos_drm_rotator.c52 * @clock: rotator gate clock.
62 struct clk *clock; member in struct:rot_context
309 rot->clock = devm_clk_get(dev, "rotator");
310 if (IS_ERR(rot->clock)) {
311 dev_err(dev, "failed to get clock\n");
312 return PTR_ERR(rot->clock);
345 clk_disable_unprepare(rot->clock);
353 return clk_prepare_enable(rot->clock);
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_hdmi.c1843 int clock, bool respect_downstream_limits,
1849 if (clock < 25000)
1851 if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits,
1856 if (IS_GEMINILAKE(dev_priv) && clock > 446666 && clock < 480000)
1861 clock > 223333 && clock < 240000)
1865 if (IS_CHERRYVIEW(dev_priv) && clock > 216000 && clock < 240000)
1869 if (intel_encoder_is_combo(encoder) && clock > 50000
1842 hdmi_port_clock_valid(struct intel_hdmi *hdmi, int clock, bool respect_downstream_limits, bool has_hdmi_sink) argument
1891 intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format) argument
1954 intel_hdmi_mode_clock_valid(struct drm_connector *connector, int clock, bool has_hdmi_sink, enum intel_output_format sink_format) argument
1995 int clock = mode->clock; local
2089 intel_hdmi_compute_bpc(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, int clock, bool respect_downstream_limits) argument
2131 int bpc, clock = adjusted_mode->crtc_clock; local
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/linux-master/drivers/media/dvb-frontends/
H A Daf9033.c109 utmp = div_u64((u64)dev->cfg.clock * 0x80000, 1000000);
118 dev_dbg(&client->dev, "clk=%u clk_cw=%08x\n", dev->cfg.clock, utmp);
122 if (clock_adc_lut[i].clock == dev->cfg.clock)
126 dev_err(&client->dev, "Couldn't find ADC config for clock %d\n",
127 dev->cfg.clock);
392 if (coeff_lut[i].clock == dev->cfg.clock &&
399 "Couldn't find config for clock %u\n",
400 dev->cfg.clock);
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/linux-master/drivers/ssb/
H A Dmain.c848 u32 n1, n2, clock, m1, m2, m3, mc; local
880 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
883 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
885 if (!clock)
908 return clock;
910 return (clock / m1);
912 return (clock / (m1 * m2));
914 return (clock / (m1 * m2 * m3));
916 return (clock / (m1 * m3));
928 clock /
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/linux-master/arch/arm/mach-sa1100/
H A Dsleep.S33 @ disable clock switching
50 @ Adjust memory timing before lowering CPU clock
/linux-master/tools/testing/selftests/ptp/
H A Dtestptp.mk1 # PTP 1588 clock support - User space test program
/linux-master/drivers/clk/hisilicon/
H A Dclk-hi3660-stub.c3 * Hisilicon clock driver
22 #include <dt-bindings/clock/hi3660-clock.h>
/linux-master/drivers/nvmem/
H A Djz4780-efuse.c19 * register and is based on number of cycles of the bus clock.
134 static void clk_disable_unprepare_helper(void *clock) argument
136 clk_disable_unprepare(clock);
199 dev_err(&pdev->dev, "Cannot set clock configuration\n");
/linux-master/drivers/scsi/
H A Dlasi700.c103 hostdata->clock = LASI700_CLOCK;
106 hostdata->clock = LASI710_CLOCK;

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