Lines Matching refs:clock
415 mode->clock == 74250 &&
651 unsigned int clock;
669 * @clock: rounded TMDS clock in kHz
671 static unsigned int hdmi_recommended_n(unsigned int freq, unsigned int clock)
677 if (clock == hdmi_rec_n_table[i].clock)
702 static unsigned int hdmi_mode_clock_to_hz(unsigned int clock)
704 switch (clock) {
714 return clock * 1000;
751 unsigned int clock)
755 n = hdmi_recommended_n(sample_rate, clock);
756 cts = hdmi_expected_cts(sample_rate, clock, n);
758 dev_dbg(hdmi->dev, "%s: sample_rate=%u, clock=%d, cts=%u, n=%u\n",
759 __func__, sample_rate, clock, n, cts);
836 static int mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock)
842 ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock);
844 dev_err(hdmi->dev, "Failed to set PLL to %u Hz: %d\n", clock,
851 if (DIV_ROUND_CLOSEST(rate, 1000) != DIV_ROUND_CLOSEST(clock, 1000))
852 dev_warn(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock,
855 dev_dbg(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, rate);
940 mtk_hdmi_hw_aud_set_ncts(hdmi, sample_rate, display_mode->clock);
1123 mode->clock * 1000);
1213 dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
1215 !!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000);
1232 mode->clock > hdmi->conf->max_mode_clock)
1236 if (mode->clock < 27000)
1238 if (mode->clock > 297000)