/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.h | 37 SDValue getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const; 40 static unsigned numBitsUnsigned(SDValue Op, SelectionDAG &DAG); 41 static unsigned numBitsSigned(SDValue Op, SelectionDAG &DAG); 45 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const; 46 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const; 50 SDValue LowerFREM(SDValue O [all...] |
H A D | SIISelLowering.h | 40 SDValue lowerKernArgParameterPtr(SelectionDAG &DAG, const SDLoc &SL, 41 SDValue Chain, uint64_t Offset) const; 42 SDValue getImplicitArgPtr(SelectionDAG &DAG, const SDLoc &SL) const; 43 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, 44 const SDLoc &SL, SDValue Chain, 49 SDValue lowerStackParameter(SelectionDAG &DAG, CCValAssign &VA, 50 const SDLoc &SL, SDValue Chain, 52 SDValue getPreloadedValue(SelectionDAG &DAG, 57 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue O [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 74 static bool isNullConstantOrUndef(SDValue V) { 82 static bool getConstantValue(SDValue N, uint32_t &Out) { 167 std::pair<SDValue, SDValue> foldFrameIndex(SDValue N) const; 168 bool isNoNanSrc(SDValue N) const; 196 SDNode *glueCopyToOp(SDNode *N, SDValue NewChain, SDValue Glue) const; 197 SDNode *glueCopyToM0(SDNode *N, SDValue Val) const; 201 virtual bool SelectADDRVTX_READ(SDValue Add [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.h | 464 void LowerAsmOperandForConstraint(SDValue Op, 466 std::vector<SDValue> &Ops, 516 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 517 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, 519 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 524 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 528 SmallVectorImpl<SDValue> &InVals) const override; 529 SDValue LowerCal [all...] |
H A D | SystemZSelectionDAGInfo.cpp | 25 static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, 26 unsigned Loop, SDValue Chain, SDValue Dst, 27 SDValue Src, uint64_t Size) { 48 SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemcpy( 49 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, 50 SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, 53 return SDValue(); [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 247 SDValue Root; 385 void createOperands(SDNode *Node, ArrayRef<SDValue> Vals); 494 const SDValue &getRoot() const { return Root; } 497 SDValue getEntryNode() const { 498 return SDValue(const_cast<SDNode *>(&EntryNode), 0); 503 const SDValue &setRoot(SDValue N) { 598 SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, 600 SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT, 603 SDValue getAllOnesConstan 1051 getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond, SDValue Chain = SDValue(), bool IsSignaling = false) argument [all...] |
H A D | SelectionDAGAddressAnalysis.h | 34 SDValue Base; 35 SDValue Index; 41 BaseIndexOffset(SDValue Base, SDValue Index, bool IsIndexSignExt) 43 BaseIndexOffset(SDValue Base, SDValue Index, int64_t Offset, 48 SDValue getBase() { return Base; } 49 SDValue getBase() const { return Base; } 50 SDValue getIndex() { return Index; } 51 SDValue getInde [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.h | 51 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 53 std::vector<SDValue> &OutOps) override; 78 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { 83 bool SelectDirectAddr(SDValue N, SDValue &Address); 85 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 86 SDValue &Offset, MVT mvt); 87 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.h | 87 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 93 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; 94 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 95 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 96 SDValue LowerExternalSymbol(SDValue O [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 420 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, 433 bool targetShrinkDemandedConstant(SDValue Op, const APInt &DemandedBits, 452 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 456 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 482 SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const; 508 bool isZExtFree(SDValue Val, EVT VT2) const override; 652 bool hasAndNotCompare(SDValue V) const override { 657 bool hasAndNot(SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.h | 48 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 50 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 68 getOpndList(SmallVectorImpl<SDValue> &Ops, 69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, 71 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, 72 SDValue Chain) const override; 74 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const; 75 SDValue lowerSTOR [all...] |
H A D | Mips16ISelDAGToDAG.h | 32 bool selectAddr(bool SPAllowed, SDValue Addr, SDValue &Base, 33 SDValue &Offset); 34 bool selectAddr16(SDValue Addr, SDValue &Base, 35 SDValue &Offset) override; 36 bool selectAddr16SP(SDValue Addr, SDValue &Base, 37 SDValue &Offset) override;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.h | 73 bool isVectorLoadExtDesirable(SDValue ExtVal) const override; 80 SDValue LowerCall(CallLoweringInfo &CLI, 81 SmallVectorImpl<SDValue> &InVals) const override; 86 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 88 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, 90 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 94 SmallVectorImpl<SDValue> &InVals) const override; 96 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFSelectionDAGInfo.cpp | 20 SDValue BPFSelectionDAGInfo::EmitTargetCodeForMemcpy( 21 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, 22 SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, 27 return SDValue(); 33 return SDValue();
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H A D | BPFISelLowering.h | 40 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 72 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 73 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 74 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 77 SDValue LowerCallResult(SDValue Chai [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.h | 86 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 88 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 95 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset, 99 bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, 100 SDValue &Offset, ISD::MemIndexedMode &AM, 124 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 125 std::vector<SDValue> &Ops, 137 SDValue getAVRCm [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 339 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 343 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 366 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const; 367 SDValue PerformBRCONDCombine(SDNode *N, SelectionDAG &DAG) const; 368 SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const; 369 SDValue PerformIntrinsicCombine(SDNode *N, DAGCombinerInfo &DCI) const; 370 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 372 bool SimplifyDemandedBitsForTargetNode(SDValue Op, 394 bool isZExtFree(SDValue Va [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelDAGToDAG.cpp | 146 bool selectADDRrri(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset); 147 bool selectADDRrii(SDValue N, SDValue &Base, SDValue &Index, SDValue &Offset); 148 bool selectADDRzri(SDValue N, SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelDAGToDAG.cpp | 62 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode, 63 std::vector<SDValue> &OutOps) override; 77 bool selectAddrRi(SDValue Addr, SDValue &Base, SDValue &Offset, 78 SDValue &AluOp); 79 bool selectAddrRr(SDValue Addr, SDValue &R1, SDValue &R2, SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.h | 58 inline bool SelectAddrGA(SDValue &N, SDValue &R); 59 inline bool SelectAddrGP(SDValue &N, SDValue &R); 60 inline bool SelectAnyImm(SDValue &N, SDValue &R); 61 inline bool SelectAnyInt(SDValue &N, SDValue &R); 62 bool SelectAnyImmediate(SDValue &N, SDValue [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 45 DenseMap<SDValue, Register> &VRBaseMap); 51 DenseMap<SDValue, Register> &VRBaseMap); 55 Register getVR(SDValue Op, 56 DenseMap<SDValue, Register> &VRBaseMap); 62 SDValue Op, 65 DenseMap<SDValue, Register> &VRBaseMap, 73 SDValue Op, 76 DenseMap<SDValue, Register> &VRBaseMap, 87 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, Register> &VRBaseMap, 95 DenseMap<SDValue, Registe [all...] |
H A D | StatepointLowering.h | 47 /// statepoint. Will return SDValue() if this value hasn't been 50 SDValue getLocation(SDValue Val) { 53 return SDValue(); 57 void setLocation(SDValue Val, SDValue Location) { 90 SDValue allocateStackSlot(EVT ValueType, SelectionDAGBuilder &Builder); 109 DenseMap<SDValue, SDValue> Locations;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 75 bool isZExtFree(SDValue Val, EVT VT2) const override; 83 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 84 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 87 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 89 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, 105 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 106 std::vector<SDValue> &Ops, 165 SDValue LowerFormalArguments(SDValue Chai [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 833 bool isZeroNode(SDValue Elt); 849 bool isConstantSplat(SDValue Op, APInt &SplatVal, 876 SDValue getPICJumpTableRelocBase(SDValue Table, 908 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 915 SmallVectorImpl<SDValue> &Results, 921 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 924 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 936 bool IsDesirableToPromoteOp(SDValue O [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreSelectionDAGInfo.cpp | 18 SDValue XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy( 19 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, 20 SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, 44 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 49 return SDValue();
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