Lines Matching refs:SDValue
40 SDValue lowerKernArgParameterPtr(SelectionDAG &DAG, const SDLoc &SL,
41 SDValue Chain, uint64_t Offset) const;
42 SDValue getImplicitArgPtr(SelectionDAG &DAG, const SDLoc &SL) const;
43 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
44 const SDLoc &SL, SDValue Chain,
49 SDValue lowerStackParameter(SelectionDAG &DAG, CCValAssign &VA,
50 const SDLoc &SL, SDValue Chain,
52 SDValue getPreloadedValue(SelectionDAG &DAG,
57 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
59 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
61 SDValue lowerImage(SDValue Op, const AMDGPU::ImageDimIntrinsicInfo *Intr,
63 SDValue lowerSBuffer(EVT VT, SDLoc DL, SDValue Rsrc, SDValue Offset,
64 SDValue CachePolicy, SelectionDAG &DAG) const;
66 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
76 std::pair<SDValue, SDValue> splitBufferOffsets(SDValue Offset,
79 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
80 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
82 SDValue lowerFastUnsafeFDIV(SDValue Op, SelectionDAG &DAG) const;
83 SDValue lowerFDIV_FAST(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerFDIV16(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerFDIV64(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerFDIV(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG, bool Signed) const;
89 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
94 SDValue adjustLoadValueType(unsigned Opcode, MemSDNode *M,
95 SelectionDAG &DAG, ArrayRef<SDValue> Ops,
98 SDValue lowerIntrinsicLoad(MemSDNode *M, bool IsFormat, SelectionDAG &DAG,
99 ArrayRef<SDValue> Ops) const;
103 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
104 ArrayRef<SDValue> Ops, EVT MemVT,
107 SDValue handleD16VData(SDValue VData, SelectionDAG &DAG) const;
111 SDValue getFPExtOrFPRound(SelectionDAG &DAG,
112 SDValue Op,
116 SDValue convertArgType(
117 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
121 SDValue lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
122 SDValue lowerFMINNUM_FMAXNUM(SDValue Op, SelectionDAG &DAG) const;
123 SDValue lowerXMULO(SDValue Op, SelectionDAG &DAG) const;
125 SDValue getSegmentAperture(unsigned AS, const SDLoc &DL,
128 SDValue lowerADDRSPACECAST(SDValue Op, SelectionDAG &DAG) const;
129 SDValue lowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
130 SDValue lowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
131 SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
132 SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
133 SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
134 SDValue lowerTRAP(SDValue Op, SelectionDAG &DAG) const;
135 SDValue lowerDEBUGTRAP(SDValue Op, SelectionDAG &DAG) const;
139 SDValue performUCharToFloatCombine(SDNode *N,
141 SDValue performSHLPtrCombine(SDNode *N,
146 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
148 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL,
149 unsigned Opc, SDValue LHS,
152 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
153 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
154 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
155 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
156 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
157 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
158 SDValue getCanonicalConstantFP(SelectionDAG &DAG, const SDLoc &SL, EVT VT,
160 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const;
162 SDValue performFPMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
163 SDValue Op0, SDValue Op1) const;
164 SDValue performIntMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
165 SDValue Op0, SDValue Op1, bool Signed) const;
166 SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
167 SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
168 SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;
169 SDValue performExtractVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
170 SDValue performInsertVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
172 SDValue reassociateScalarOps(SDNode *N, SelectionDAG &DAG) const;
175 SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
176 SDValue performAddCarrySubCarryCombine(SDNode *N, DAGCombinerInfo &DCI) const;
177 SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
178 SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
179 SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
180 SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const;
181 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
182 SDValue performCvtF32UByteNCombine(SDNode *N, DAGCombinerInfo &DCI) const;
183 SDValue performClampCombine(SDNode *N, DAGCombinerInfo &DCI) const;
184 SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
215 // three offsets (voffset, soffset and instoffset) into the SDValue[3] array
219 unsigned setBufferOffsets(SDValue CombinedOffset, SelectionDAG &DAG,
220 SDValue *Offsets, Align Alignment = Align(4)) const;
223 SDValue handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL,
224 ArrayRef<SDValue> Ops, MemSDNode *M) const;
227 SDValue handleByteShortBufferStores(SelectionDAG &DAG, EVT VDataType,
228 SDLoc DL, SDValue Ops[],
305 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
309 SmallVectorImpl<SDValue> &InVals) const override;
316 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
318 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
325 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
326 SmallVectorImpl<SDValue> &MemOpChains,
327 SDValue Chain) const;
329 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
333 SmallVectorImpl<SDValue> &InVals, bool isThisReturn,
334 SDValue ThisVal) const;
339 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
341 const SmallVectorImpl<SDValue> &OutVals,
344 SDValue LowerCall(CallLoweringInfo &CLI,
345 SmallVectorImpl<SDValue> &InVals) const override;
347 SDValue lowerDYNAMIC_STACKALLOCImpl(SDValue Op, SelectionDAG &DAG) const;
348 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
373 SDValue splitUnaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
374 SDValue splitBinaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
375 SDValue splitTernaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
376 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
378 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
381 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
389 SDValue Ptr) const;
390 MachineSDNode *buildRSRC(SelectionDAG &DAG, const SDLoc &DL, SDValue Ptr,
396 void LowerAsmOperandForConstraint(SDValue Op,
398 std::vector<SDValue> &Ops,
400 bool getAsmOperandConstVal(SDValue Op, uint64_t &Val) const;
401 bool checkAsmConstraintVal(SDValue Op,
404 bool checkAsmConstraintValA(SDValue Op,
407 SDValue copyToM0(SelectionDAG &DAG, SDValue Chain, const SDLoc &DL,
408 SDValue V) const;
422 bool isCanonicalized(SelectionDAG &DAG, SDValue Op,
426 bool isKnownNeverNaNForTargetNode(SDValue Op,