/freebsd-13-stable/sys/contrib/dev/acpica/compiler/ |
H A D | aslmap.c | 178 const ACPI_OPCODE_INFO *OpInfo; local 185 OpInfo = AcpiPsGetOpcodeInfo (Opcode); 197 if (OpInfo->Flags & AML_NSOBJECT) 199 return (OpInfo->ObjectType);
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H A D | aslload.c | 522 const ACPI_OPCODE_INFO *OpInfo; local 594 OpInfo = AcpiPsGetOpcodeInfo (ParentOp->Asl.AmlOpcode); 603 (OpInfo->Class == AML_CLASS_NAMED_OBJECT)) 881 WalkState->OpInfo = AcpiPsGetOpcodeInfo (Op->Asl.AmlOpcode); 882 if (((WalkState->OpInfo->Flags & AML_NAMED) || 883 (WalkState->OpInfo->Flags & AML_CREATE)) &&
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/freebsd-13-stable/sys/contrib/dev/acpica/include/ |
H A D | acstruct.h | 227 const ACPI_OPCODE_INFO *OpInfo; /* Info on current opcode */ member in struct:acpi_walk_state
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyInstPrinter.cpp | 170 if (Desc.OpInfo[I].OperandType != WebAssembly::OPERAND_BASIC_BLOCK) 241 const MCOperandInfo &Info = Desc.OpInfo[OpNo];
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb2SizeReduction.cpp | 841 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 843 if (SkipPred && MCID.OpInfo[i].isPredicate()) 877 if (MCID.OpInfo[i].isPredicate()) 887 !MCID.OpInfo[i].isPredicate()) { 948 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) 958 bool isPred = (i < NumOps && MCID.OpInfo[i].isPredicate());
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 4315 SDValue &Chain, SDValue &Flag, SDLoc DL, const AsmOperandInfo &OpInfo, 4480 AsmOperandInfo &OpInfo = ConstraintOperands.back(); local 4483 if (OpInfo.multipleAlternatives.size() > maCount) 4484 maCount = OpInfo.multipleAlternatives.size(); 4486 OpInfo.ConstraintVT = MVT::Other; 4489 switch (OpInfo.Type) { 4492 if (OpInfo.isIndirect) { 4493 OpInfo.CallOperandVal = Call.getArgOperand(ArgNo++); 4501 OpInfo.ConstraintVT = 4505 OpInfo 4314 LowerAsmOutputForConstraint( SDValue &Chain, SDValue &Flag, SDLoc DL, const AsmOperandInfo &OpInfo, SelectionDAG &DAG) const argument 4570 AsmOperandInfo &OpInfo = ConstraintOperands[cIndex]; local 4618 AsmOperandInfo &OpInfo = ConstraintOperands[cIndex]; local 4758 ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, const TargetLowering &TLI, SDValue Op, SelectionDAG *DAG) argument 4815 ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG) const argument [all...] |
H A D | InstrEmitter.cpp | 224 if (II.OpInfo != nullptr && II.OpInfo[i].isOptionalDef()) { 310 MCID.OpInfo[IIOpNum].isOptionalDef();
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.h | 600 inline unsigned getOperandSize(const MCOperandInfo &OpInfo) { argument 601 switch (OpInfo.OperandType) { 637 return getOperandSize(Desc.OpInfo[OpNo]);
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H A D | AMDGPUBaseInfo.cpp | 1083 unsigned OpType = Desc.OpInfo[OpNo].OperandType; 1090 unsigned OpType = Desc.OpInfo[OpNo].OperandType; 1114 unsigned OpType = Desc.OpInfo[OpNo].OperandType; 1193 unsigned RCID = Desc.OpInfo[OpNo].RegClass;
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/freebsd-13-stable/sys/contrib/dev/acpica/components/debugger/ |
H A D | dbdisply.c | 534 const ACPI_OPCODE_INFO *OpInfo; local 583 OpInfo = AcpiPsGetOpcodeInfo (Op->Common.AmlOpcode); 584 switch (OpInfo->Class)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | TargetTransformInfo.cpp | 643 OperandValueKind OpInfo = OK_AnyValue; local 657 OpInfo = OK_UniformValue; 664 OpInfo = OK_NonUniformConstantValue; 666 OpInfo = OK_UniformConstantValue; 685 OpInfo = OK_UniformValue; 687 return OpInfo;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 289 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != 327 if (Info->get(Inst.getOpcode()).OpInfo[OpId].OperandType !=
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/freebsd-13-stable/sys/contrib/dev/acpica/components/dispatcher/ |
H A D | dsmethod.c | 284 if (!(WalkState->OpInfo->Flags & (AML_NAMED | AML_CREATE | AML_FIELD))) 306 WalkState->OpInfo->Name, WalkState->Opcode));
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 3199 const MCOperandInfo &OpInfo) const { 3204 return !isInlineConstant(MO, OpInfo); 3234 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; local 3238 if (OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE) 3241 if (OpInfo.RegClass < 0) 3247 if (MO.isImm() && isInlineConstant(MO, OpInfo)) { 3252 return RI.opCanUseInlineConstant(OpInfo.OperandType); 3255 if (!RI.opCanUseLiteralConstant(OpInfo.OperandType)) 3410 const MCOperandInfo &OpInfo) cons 4251 isLegalRegOperand(const MachineRegisterInfo &MRI, const MCOperandInfo &OpInfo, const MachineOperand &MO) const argument 4276 isLegalVSrcOperand(const MachineRegisterInfo &MRI, const MCOperandInfo &OpInfo, const MachineOperand &MO) const argument 4292 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx]; local [all...] |
H A D | GCNHazardRecognizer.cpp | 683 VDataRCID = Desc.OpInfo[VDataIdx].RegClass; 708 AMDGPU::getRegBitWidth(Desc.OpInfo[SRsrcIdx].RegClass) == 256); 714 if (AMDGPU::getRegBitWidth(Desc.OpInfo[DataIdx].RegClass) > 64)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LowerMatrixIntrinsics.cpp | 212 OpInfoTy OpInfo; member in class:__anon4683::LowerMatrixIntrinsics::MatrixTy 296 OpInfo.NumLoads += N; 300 void setNumLoads(unsigned N) { OpInfo.NumLoads = N; } 303 OpInfo.NumStores += N; 308 OpInfo.NumComputeOps += N; 312 unsigned getNumStores() const { return OpInfo.NumStores; } 313 unsigned getNumLoads() const { return OpInfo.NumLoads; } 314 unsigned getNumComputeOps() const { return OpInfo.NumComputeOps; } 316 const OpInfoTy &getOpInfo() const { return OpInfo; }
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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenSchedule.h | 357 OpcodeGroup(OpcodeInfo &&OpInfo) : Info(std::move(OpInfo)) {} argument
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H A D | CodeGenInstruction.cpp | 148 for (OperandInfo &OpInfo : OperandList) 149 OpInfo.Constraints.resize(OpInfo.MINumOperands);
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H A D | InstrInfoEmitter.cpp | 77 const OperandInfoMapTy &OpInfo, 719 const OperandInfoMapTy &OpInfo, 813 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; 716 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 242 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()
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H A D | MachineInstr.cpp | 1064 if (MCID.OpInfo[i].isPredicate()) 1472 auto &OpInfo = getDesc().OpInfo[OpIdx]; 1473 if (!OpInfo.isGenericType()) 1476 if (PrintedTypes[OpInfo.getGenericTypeIndex()]) 1483 PrintedTypes.set(OpInfo.getGenericTypeIndex());
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H A D | TargetInstrInfo.cpp | 53 short RegClass = MCID.OpInfo[OpNum].RegClass; 54 if (MCID.OpInfo[OpNum].isLookupPtrRegClass()) 334 if (MCID.OpInfo[i].isPredicate()) {
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/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGExprScalar.cpp | 2973 BinOpInfo OpInfo; local 2980 OpInfo.RHS = Visit(E->getRHS()); 2981 OpInfo.Ty = E->getComputationResultType(); 2982 OpInfo.Opcode = E->getOpcode(); 2983 OpInfo.FPFeatures = E->getFPFeaturesInEffect(CGF.getLangOpts()); 2984 OpInfo.E = E; 2998 switch (OpInfo.Opcode) { 3030 EmitScalarConversion(OpInfo.RHS, E->getRHS()->getType(), LHSTy, 3047 OpInfo.LHS = EmitLoadOfLValue(LHSLV, E->getExprLoc()); 3048 OpInfo [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyMCInstLower.cpp | 234 const MCOperandInfo &Info = Desc.OpInfo[DescIndex];
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/freebsd-13-stable/sys/contrib/dev/acpica/components/parser/ |
H A D | psparse.c | 278 (WalkState->OpInfo->Class == AML_CLASS_ARGUMENT))
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