Searched refs:Def (Results 101 - 125 of 182) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DIVDescriptors.cpp959 Value *Def = nullptr;
961 Def = Op1;
963 Def = Op0;
964 return Def;
H A DMemorySSA.cpp450 // If Start is a Def, skip self.
1752 bool Def, Use;
1754 Def = dyn_cast_or_null<MemoryDef>(Template) != nullptr;
1761 assert(Def == DefCheck && (Def || Use == UseCheck) && "Invalid template");
1774 Def = isModSet(ModRef) || isOrdered(I);
1780 if (!Def && !Use)
1784 if (Def)
1910 // If Pred has unreachable predecessors, but has at least a Def, the
1911 // incoming access can be the last Def i
2059 verifyUseInDefs(MemoryAccess *Def, MemoryAccess *Use) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroFrame.cpp293 Value *Def = nullptr; member in class:__anon4494::Spill
298 Spill(Value *Def, llvm::User *U) : Def(Def), User(cast<Instruction>(U)) {} argument
300 Value *def() const { return Def; }
320 // Note that there may be more than one record with the same value of Def in
1525 auto *Def = Worklist.back(); local
1527 for (User *U : Def->users()) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp744 Register Def, LHS, RHS; member in struct:Instr
745 Instr(unsigned Opcode, Register Def, Register LHS, Register RHS) argument
746 : Opcode(Opcode), Def(Def), LHS(LHS), RHS(RHS){};
807 Instruction.Opcode, {Instruction.Def}, {Instruction.LHS});
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFGraph.cpp93 case NodeAttrs::Def: OS << 'd'; break;
161 case NodeAttrs::Def:
797 if (NA.Addr->getKind() == NodeAttrs::Def) {
826 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
833 NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
1529 if (M.Addr->getKind() != NodeAttrs::Def)
1622 assert(Kind == NodeAttrs::Def || Kind == NodeAttrs::Use);
1626 assert(Kind != NodeAttrs::Def || !Defs.count(RR));
1636 else if (Kind == NodeAttrs::Def)
H A DMachineCSE.cpp647 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); local
648 assert(Def != nullptr && "CSEd register has no unique definition?");
649 Def->clearRegisterDeads(NewReg);
H A DRDFLiveness.cpp227 return TA.Addr->getKind() == NodeAttrs::Def &&
454 if (!DFG.IsRef<NodeAttrs::Def>(R))
670 NodeList Ds = PA.Addr->members_if(DFG.IsRef<NodeAttrs::Def>, DFG);
/freebsd-13-stable/contrib/llvm-project/clang/lib/AST/
H A DDeclBase.cpp1243 if (auto *Def = OID->getDefinition())
1244 return Def;
1249 if (auto *Def = OPD->getDefinition())
1250 return Def;
1266 if (TagDecl *Def = Tag->getDefinition())
1267 return Def;
H A DDecl.cpp550 const FunctionDecl *Def = nullptr; local
556 FD->hasBody(Def) && Def->isInlined() && !Def->hasAttr<GNUInlineAttr>();
2239 VarDecl *Def = nullptr; local
2248 Def = I;
2251 return Def;
2458 if (auto *Def = D->getDefinition())
2459 return Def;
4426 if (const RecordDecl *Def
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H A DType.cpp2208 bool Type::isIncompleteType(NamedDecl **Def) const {
2209 if (Def)
2210 *Def = nullptr;
2220 if (Def)
2221 *Def = EnumD;
2228 if (Def)
2229 *Def = Rec;
2238 ->isIncompleteType(Def);
2266 ->isIncompleteType(Def);
2271 if (Def)
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H A DDeclCXX.cpp1766 if (auto *Def = D->getDefinition())
1767 return Def;
1965 auto *Def = getDefinition();
1966 if (!Def)
1968 if (Def->hasAttr<FinalAttr>())
1970 if (const auto *Dtor = Def->getDestructor())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLowOverheadLoops.cpp533 if (auto *Def = RDA.getUniqueReachingMIDef(&MBB->back(), NumElements)) {
540 if (RDA.isSafeToRemove(Def, ElementChain, Ignore)) {
1261 MachineInstr *Def = RDA->getMIOperand(LoLoop.Start, 0); local
1262 if (!Def) {
1271 if (RDA->isSafeToRemove(Def, Remove, Killed))
1279 RDA->collectKilledOperands(Def, Killed);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp1303 for (MachineOperand &Def : MI.defs())
1304 if (Def.isReg())
1305 LoadDepRegs.set(Def.getReg());
1387 for (MachineOperand &Def : MI.defs())
1388 if (Def.isReg())
1389 LoadDepRegs.set(Def.getReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp661 for (auto Def = MI, E = MBB.begin(); Def != E; ) {
662 --Def;
663 if (!Def->definesRegister(SrcReg, &RI))
665 if (Def->getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32)
668 MachineOperand &DefOp = Def->getOperand(1);
675 for (auto I = Def; I != MI && SafeToPropagate; ++I)
2681 // If the Def moves immediate and the use is single
2683 MachineInstr *Def = MRI->getUniqueVRegDef(Src0->getReg()); local
2684 if (Def
2701 MachineInstr *Def = MRI->getUniqueVRegDef(Src1->getReg()); local
2860 auto Def = MRI.getUniqueVRegDef(MO->getReg()); local
4633 MachineInstr *Def = MRI.getVRegDef(OpReg); local
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H A DAMDGPUSubtarget.cpp726 void GCNSubtarget::adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, argument
729 !Def->isInstr() || !Use->isInstr())
732 MachineInstr *DefI = Def->getInstr();
H A DSILowerI1Copies.cpp776 static void instrDefsUsesSCC(const MachineInstr &MI, bool &Def, bool &Use) {
777 Def = false;
785 Def = true;
H A DSIPeepholeSDWA.cpp526 for (const MachineOperand &Def : MRI->def_operands(Op.getReg())) {
527 if (!isSameReg(Op, Def))
530 const MachineInstr *DefInst = Def.getParent();
/freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaTemplate.cpp1769 if (TagDecl *Def = PrevRecordDecl->getDefinition()) {
1773 if (SkipBody && !hasVisibleDefinition(Def, &Hidden)) {
1775 SkipBody->Previous = Def;
1783 Diag(Def->getLocation(), diag::note_previous_definition);
8356 RecordDecl *Def = Specialization->getDefinition(); local
8358 if (Def && SkipBody && !hasVisibleDefinition(Def, &Hidden)) {
8360 SkipBody->Previous = Def;
8362 } else if (Def) {
8365 Diag(Def
9319 dllExportImportClassTemplateSpecialization( Sema &S, ClassTemplateSpecializationDecl *Def) argument
9558 ClassTemplateSpecializationDecl *Def local
9722 CXXRecordDecl *Def local
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H A DSemaTemplateInstantiateDecl.cpp1237 EnumDecl *Def = D->getDefinition(); local
1238 if (Def && Def != D) {
1242 if (TypeSourceInfo *TI = Def->getIntegerTypeSourceInfo()) {
1247 SemaRef.CheckEnumRedeclaration(Def->getLocation(), Def->isScoped(),
1259 if (isDeclWithinFunction(D) ? D == Def : Def && !Enum->isScoped()) {
1261 InstantiateEnumDefinition(Enum, Def);
5213 VarDecl *Def local
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H A DSemaDecl.cpp1984 ObjCInterfaceDecl *Def = dyn_cast_or_null<ObjCInterfaceDecl>(IDecl); local
1986 if (Def && Def->getDefinition())
1987 Def = Def->getDefinition();
1988 return Def;
2638 const VarDecl *Def = VD->getDefinition(); local
2639 if (Def)
2640 return Def;
2661 const NamedDecl *Def local
11975 VarDecl *Def; local
15954 TagDecl *Def; local
16541 NamedDecl *Def; local
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H A DSemaLookup.cpp1508 bool Sema::hasVisibleMergedDefinition(NamedDecl *Def) { argument
1509 for (const Module *Merged : Context.getModulesWithMergedDefinition(Def))
1515 bool Sema::hasMergedDefinitionInCurrentModule(NamedDecl *Def) { argument
1516 for (const Module *Merged : Context.getModulesWithMergedDefinition(Def))
5242 NamedDecl *Def = getDefinitionToImport(Decl);
5243 if (!Def)
5244 Def = Decl;
5246 Module *Owner = getOwningModule(Def);
5251 auto Merged = Context.getModulesWithMergedDefinition(Def);
5254 diagnoseMissingImport(Loc, Def, De
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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenSchedule.cpp299 for (const Record *Def : Fn.getDefinitions()) {
300 RecVec Classes = Def->getValueAsListOfDefs("Classes");
330 for (const Record *Def : Fn.getDefinitions()) {
331 RecVec Classes = Def->getValueAsListOfDefs("Classes");
332 const Record *SchedModel = Def->getValueAsDef("SchedModel");
723 unsigned CodeGenSchedModels::getSchedRWIdx(const Record *Def, argument
727 RWVec, [Def](const CodeGenSchedRW &RW) { return RW.TheDef == Def; });
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp581 MachineInstr *Def = RegInfo->getVRegDef(Reg); local
582 if (Def) {
583 MachineBasicBlock::iterator InsertPos = Def;
585 Def->getParent()->insert(std::next(InsertPos), MI);
596 MachineInstr *Def = RegInfo->getVRegDef(LDI->second); local
597 MachineBasicBlock::iterator InsertPos = Def;
607 // Def is never a terminator here, so it is ok to increment InsertPos.
2098 /// findNonImmUse - Return true if "Def" is a predecessor of "Root" via a path
2100 static bool findNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse, argument
2104 // Only check if we have non-immediate uses of Def
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/TableGen/
H A DRecord.cpp1597 : TypedInit(IK_DefInit, D->getType()), Def(D) {}
1611 if (const RecordVal *RV = Def->getValue(FieldName))
1616 std::string DefInit::getAsString() const { return std::string(Def->getName()); }
1652 if (!Def) {
1691 Def = DefInit::get(NewRec);
1694 return Def;
1719 if (Def)
1720 return Def;
1768 Record *Def = DI->getDef();
1769 if (Def
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DIndVarSimplify.cpp185 /// viable location is found: it may happen if User is a PHI and Def only comes
187 static Instruction *getInsertPointForUses(Instruction *User, Value *Def, argument
195 if (PHI->getIncomingValue(i) != Def)
211 // If we have skipped all inputs, it means that Def only comes to Phi from
216 auto *DefI = dyn_cast<Instruction>(Def);
684 Optional<ConstantRange> getPostIncRangeInfo(Value *Def, argument
686 DefUserPair Key(Def, UseI);
696 void updatePostIncRangeInfo(Value *Def, Instruction *UseI, ConstantRange R) { argument
697 DefUserPair Key(Def, UseI);

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