/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 105 Reserved.set(Hexagon::PC);
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H A D | HexagonCommonGEP.cpp | 615 const NodeSet *PC = node_class(N->Parent, EqRel); local 616 if (!PC) 618 ProjMap::iterator F = PM.find(PC); 632 const NodeSet *PC = node_class(N, EqRel); local 633 if (!PC) 635 ProjMap::iterator F = PM.find(PC);
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H A D | HexagonBitTracker.cpp | 277 RegisterCell PC = eXTR(rc(1), 0, PW); variable 278 RegisterCell RC = RegisterCell(RW).insert(PC, BT::BitMask(0, PW-1)); 918 RegisterCell PC = getCell(PR, Inputs); 919 const BT::BitValue &Test = PC[0];
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/freebsd-11.0-release/libexec/getty/ |
H A D | gettytab.h | 67 #define PC gettystrs[7].value macro
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H A D | main.c | 655 putchr(*PC);
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/freebsd-11.0-release/usr.bin/tset/ |
H A D | set.c | 244 PC = buf[0];
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/freebsd-11.0-release/contrib/llvm/include/llvm/ADT/ |
H A D | Triple.h | 120 PC, enumerator in enum:llvm::Triple::VendorType
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/freebsd-11.0-release/contrib/gcc/ |
H A D | genextract.c | 228 case PC:
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H A D | rtl.c | 234 case PC:
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H A D | rtlanal.c | 511 case PC: 582 case PC: 667 /* If the destination is anything other than CC0, PC, a REG or a SUBREG 671 && GET_CODE (SET_DEST (body)) != PC 792 case PC: 850 case PC: 1312 case PC: 1338 the REG, MEM, CC0 or PC being stored in or clobbered, 1871 case PC: 1937 case PC [all...] |
H A D | resource.c | 225 case PC: 654 case PC:
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H A D | caller-save.c | 575 || code == PC || code == CC0
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H A D | sched-vis.c | 502 case PC:
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/freebsd-11.0-release/sys/mips/mips/ |
H A D | swtch.S | 99 RESTORE_U_PCB_REG(a0, PC, k1)
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H A D | freebsd32_machdep.c | 393 sf.sf_uc.uc_mcontext.mc_pc = regs.r_regs[PC];
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/freebsd-11.0-release/share/mk/ |
H A D | sys.mk | 242 PC ?= pc macro 354 ${PC} ${PFLAGS} -c ${.IMPSRC} -o ${.TARGET}
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/freebsd-11.0-release/contrib/llvm/tools/clang/include/clang/AST/ |
H A D | Comment.h | 703 void setParagraph(ParagraphComment *PC) { argument 704 Paragraph = PC; 705 SourceLocation NewLocEnd = PC->getLocEnd();
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 887 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 903 Reg = ARM::PC; 971 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 1188 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 1264 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC.
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H A D | ARMELFStreamer.cpp | 125 assert((Reg != ARM::SP && Reg != ARM::PC) && 1300 assert((Reg != ARM::SP && Reg != ARM::PC) &&
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/freebsd-11.0-release/contrib/llvm/tools/llvm-readobj/ |
H A D | COFFDumper.cpp | 532 // Holds a PC to file:line table. Some data to parse this subsection is 642 // Then go the (PC, LineNumber) pairs. The line number is stored in the 644 uint32_t PC = DE.getU32(&Offset), LineData = DE.getU32(&Offset); local 645 if (PC >= FunctionSize) { 650 format("+0x%X", PC).snprint(Buffer, 32);
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/freebsd-11.0-release/contrib/binutils/include/opcode/ |
H A D | convex.h | 50 #if !defined (PC) 51 #define PC 9 macro 464 {0,0,lr,PC,A,0}, /* mov */
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 49 : ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), BasePtr(ARM::R6) {} 158 Reserved.set(ARM::PC);
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 683 // applied to PC. the offset may have 8 bits of magnitude and is represented 696 if(Memory.BaseRegNum != ARM::PC) return false; 1054 // Base register must be PC. 1055 if (Memory.BaseRegNum != ARM::PC) 1285 // Base reg of PC isn't allowed for these encodings. 1286 if (Memory.BaseRegNum == ARM::PC) return false; 1303 // Base reg of PC isn't allowed for these encodings. 1304 if (Memory.BaseRegNum == ARM::PC) return false; 2925 .Case("r15", ARM::PC) 3301 case ARM::LR: return ARM::PC; cas [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 472 if ((Reg == Mips::PC) || (Reg == Mips::SP))
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/freebsd-11.0-release/contrib/llvm/lib/Support/ |
H A D | Triple.cpp | 140 case PC: return "pc"; 400 .Case("pc", Triple::PC)
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