ARM/AsmParser/ARMAsmParser.cpp

683   // applied to PC. the offset may have 8 bits of magnitude and is represented
696       if(Memory.BaseRegNum != ARM::PC) return false;
1054     // Base register must be PC.
1055     if (Memory.BaseRegNum != ARM::PC)
1285     // Base reg of PC isn't allowed for these encodings.
1286     if (Memory.BaseRegNum == ARM::PC) return false;
1303     // Base reg of PC isn't allowed for these encodings.
1304     if (Memory.BaseRegNum == ARM::PC) return false;
2925       .Case("r15", ARM::PC)
3301   case ARM::LR:  return ARM::PC;  case ARM::PC:  return ARM::R0;
5414   // won't accept SP or PC so we do the transformation here taking care
5420     bool TryTransform = Op3Reg == ARM::PC || Op4Reg == ARM::PC ||
5421                         (Op5.isReg() && Op5.getReg() == ARM::PC);
5537     // Check against T3. If the second register is the PC, this is an
5539     if (static_cast<ARMOperand &>(*Operands[4]).getReg() != ARM::PC &&
5942   // Adjust operands of B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction
5947       static_cast<ARMOperand &>(*Operands[3]).getReg() == ARM::PC &&
6006   bool ListContainsPC = listContainsReg(Inst, ListNo, ARM::PC);
6013                  "PC and LR may not be in the register list simultaneously");
6028   bool ListContainsPC = listContainsReg(Inst, ListNo, ARM::PC);
6032                  "SP and PC may not be in the register list");
6038                  "PC may not be in the register list");
6281     if (!listContainsReg(Inst, 3, ARM::PC))
6284                    "if PC in register-list");
6315     if (checkLowRegisterList(Inst, 2, 0, ARM::PC, ListContainsBase) &&
6711     if (Inst.getOperand(1).getReg() != ARM::PC ||
6725       // Turn PC-relative expression into absolute expression.
6726       // Reading PC provides the start of the current instruction + 8 and
6746   // Aliases for alternate PC+imm syntax of LDR instructions.
8251     if (!checkLowRegisterList(Inst, 2, 0, ARM::PC, listContainsBase))
8554       // rGPRRegClass excludes PC, and also excluded SP before ARMv8
8557       else if (Inst.getOperand(I).getReg() == ARM::PC)
9784   if (SPReg == ARM::SP || SPReg == ARM::PC) {