/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMBaseInfo.h | 34 MI, // Minus, negative Less than enumerator in enum:llvm::ARMCC::CondCodes 54 case MI: return PL; 55 case PL: return MI; 74 case ARMCC::MI: return "mi";
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ThumbRegisterInfo.h | 46 // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be 52 void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | RDFDeadCode.h | 58 bool isLiveInstr(const MachineInstr *MI) const;
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H A D | HexagonHardwareLoops.cpp | 184 bool isInvalidLoopOperation(const MachineInstr *MI, 196 bool isDead(const MachineInstr *MI, 200 void removeIfDead(MachineInstr *MI); 208 /// \brief Return true if MO and MI pair is visited only once. If visited 211 bool isLoopFeeder(MachineLoop *L, MachineBasicBlock *A, MachineInstr *MI, 947 bool HexagonHardwareLoops::isInvalidLoopOperation(const MachineInstr *MI, argument 952 if (MI->getDesc().isCall() && MI->getOpcode() != Hexagon::CALLv3nr) 956 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 957 const MachineOperand &MO = MI 980 const MachineInstr *MI = &*MII; local 994 isDead(const MachineInstr *MI, SmallVectorImpl<MachineInstr *> &DeadPhis) const argument 1042 removeIfDead(MachineInstr *MI) argument 1324 isLoopFeeder(MachineLoop *L, MachineBasicBlock *A, MachineInstr *MI, const MachineOperand *MO, LoopFeederMap &LoopFeederPhi) const argument 1417 MachineInstr *MI = &*I; local [all...] |
H A D | HexagonGenInsert.cpp | 494 void getInstrDefs(const MachineInstr *MI, RegisterSet &Defs) const; 495 void getInstrUses(const MachineInstr *MI, RegisterSet &Uses) const; 562 const MachineInstr *MI = &*I; 563 for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) { 564 const MachineOperand &MO = MI->getOperand(i); 684 void HexagonGenInsert::getInstrDefs(const MachineInstr *MI, 686 for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) { 687 const MachineOperand &MO = MI->getOperand(i); 698 void HexagonGenInsert::getInstrUses(const MachineInstr *MI, 700 for (unsigned i = 0, n = MI [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 46 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, argument 48 MachineInstrBuilder MIB(MF, &MI); 49 unsigned Mask = MI.getOperand(1).getImm(); 87 const MachineInstr& MI) { 90 // Check if MI is "addiu $dst, $zero, 0" or "daddiu $dst, $zero, 0". 91 if ((MI.getOpcode() == Mips::ADDiu) && 92 (MI.getOperand(1).getReg() == Mips::ZERO) && 93 (MI.getOperand(2).getImm() == 0)) { 94 DstReg = MI.getOperand(0).getReg(); 96 } else if ((MI 86 replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr& MI) argument 111 MachineInstr *MI = MO.getParent(); local [all...] |
H A D | MipsRegisterInfo.cpp | 265 MachineInstr &MI = *II; local 266 MachineFunction &MF = *MI.getParent()->getParent(); 269 errs() << "<--------->\n" << MI); 271 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 279 eliminateFI(MI, FIOperandNum, FrameIndex, stackSize, spOffset);
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/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPrologEpilogPass.cpp | 60 MachineInstr *MI = I; local 61 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 62 if (!MI->getOperand(i).isFI()) 64 TRI.eliminateFrameIndex(MI, 0, i, nullptr);
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H A D | NVPTXAsmPrinter.cpp | 114 void NVPTXAsmPrinter::emitLineNumberAsDotLoc(const MachineInstr &MI) { argument 117 if (ignoreLoc(MI)) 120 DebugLoc curLoc = MI.getDebugLoc(); 158 void NVPTXAsmPrinter::EmitInstruction(const MachineInstr *MI) { argument 162 emitLineNumberAsDotLoc(*MI); 165 lowerToMCInst(MI, Inst); 170 bool NVPTXAsmPrinter::lowerImageHandleOperand(const MachineInstr *MI, argument 172 const MachineOperand &MO = MI->getOperand(OpNo); 173 const MCInstrDesc &MCID = MI->getDesc(); 232 void NVPTXAsmPrinter::lowerToMCInst(const MachineInstr *MI, MCIns argument 1949 ignoreLoc(const MachineInstr &MI) argument 2213 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 2234 PrintAsmMemoryOperand( const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument 2247 printOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) argument 2289 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPC.h | 49 void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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H A D | PPCFrameLowering.cpp | 258 static void RemoveVRSaveCode(MachineInstr *MI) { argument 259 MachineBasicBlock *Entry = MI->getParent(); 262 // We know that the MTVRSAVE instruction immediately follows MI. Remove it. 263 MachineBasicBlock::iterator MBBI = MI; 290 MBBI = MI; 298 MI->eraseFromParent(); 301 // HandleVRSaveUpdate - MI is the UPDATE_VRSAVE instruction introduced by the 304 static void HandleVRSaveUpdate(MachineInstr *MI, const TargetInstrInfo &TII) { argument 305 MachineFunction *MF = MI->getParent()->getParent(); 307 DebugLoc dl = MI 1671 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 1738 restoreCRs(bool isPPC64, bool is31, bool CR2Spilled, bool CR3Spilled, bool CR4Spilled, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, unsigned CSIIndex) argument 1789 MachineInstr *MI = I; local 1814 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument [all...] |
H A D | PPCISelLowering.cpp | 8122 PPCTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, argument 8157 unsigned dest = MI->getOperand(0).getReg(); 8158 unsigned ptrA = MI->getOperand(1).getReg(); 8159 unsigned ptrB = MI->getOperand(2).getReg(); 8160 unsigned incr = MI->getOperand(3).getReg(); 8161 DebugLoc dl = MI->getDebugLoc(); 8168 std::next(MachineBasicBlock::iterator(MI)), BB->end()); 8206 PPCTargetLowering::EmitPartwordAtomicBinary(MachineInstr *MI, argument 8212 return EmitAtomicBinary(MI, BB, is8bit ? 1 : 2, BinOpcode); 8227 unsigned dest = MI 8338 emitEHSjLjSetJmp(MachineInstr *MI, MachineBasicBlock *MBB) const argument 8485 emitEHSjLjLongJmp(MachineInstr *MI, MachineBasicBlock *MBB) const argument 8594 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.h | 51 MachineBasicBlock::iterator MI) const
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfDebug.h | 480 /// Ensure that a label will be emitted before MI. 481 void requestLabelBeforeInsn(const MachineInstr *MI) { argument 482 LabelsBeforeInsn.insert(std::make_pair(MI, nullptr)); 485 /// Ensure that a label will be emitted after MI. 486 void requestLabelAfterInsn(const MachineInstr *MI) { argument 487 LabelsAfterInsn.insert(std::make_pair(MI, nullptr)); 512 void beginInstruction(const MachineInstr *MI) override; 612 MCSymbol *getLabelBeforeInsn(const MachineInstr *MI); 615 MCSymbol *getLabelAfterInsn(const MachineInstr *MI);
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H A D | EHStreamer.cpp | 159 bool EHStreamer::callToNoUnwindFunction(const MachineInstr *MI) { argument 160 assert(MI->isCall() && "This should be a call instruction!"); 165 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 166 const MachineOperand &MO = MI->getOperand(I); 235 for (const auto &MI : MBB) { 236 if (!MI.isEHLabel()) { 237 if (MI.isCall()) 238 SawPotentiallyThrowing |= !callToNoUnwindFunction(&MI); 243 MCSymbol *BeginLabel = MI.getOperand(0).getMCSymbol();
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 198 MachineInstr * MI, MachineBasicBlock * BB) const { 201 MachineBasicBlock::iterator I = *MI; 205 switch (MI->getOpcode()) { 209 if (TII->isLDSRetInstr(MI->getOpcode())) { 210 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); 215 if (!MRI.use_empty(MI->getOperand(DstIdx).getReg()) || 216 MI->getOpcode() == AMDGPU::LDS_CMPST_RET) 220 TII->get(AMDGPU::getLDSNoRetOp(MI->getOpcode()))); 221 for (unsigned i = 1, e = MI->getNumOperands(); i < e; ++i) { 222 NewMI.addOperand(MI 197 EmitInstrWithCustomInserter( MachineInstr * MI, MachineBasicBlock * BB) const argument [all...] |
/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | SlotIndexes.h | 418 SlotIndex getInstructionIndex(const MachineInstr *MI) const { 420 Mi2IndexMap::const_iterator itr = mi2iMap.find(getBundleStart(MI)); 444 /// before MI, or the start index of its basic block. 445 /// MI is not required to have an index. 446 SlotIndex getIndexBefore(const MachineInstr *MI) const { 447 const MachineBasicBlock *MBB = MI->getParent(); 448 assert(MBB && "MI must be inserted inna basic block"); 449 MachineBasicBlock::const_iterator I = MI, B = MBB->begin(); 461 /// after MI, or the end index of its basic block. 462 /// MI i [all...] |
/freebsd-11.0-release/contrib/llvm/tools/lldb/tools/lldb-mi/ |
H A D | MICmnLLDBDebugger.cpp | 32 // MI private summary providers 55 // MI summary helper routines 76 : m_constStrThisThreadId("MI debugger event") 119 MI::ModuleInit<CMICmnLog>(IDS_MI_INIT_ERR_LOG, bOk, errMsg); 120 MI::ModuleInit<CMICmnResources>(IDS_MI_INIT_ERR_RESOURCES, bOk, errMsg); 121 MI::ModuleInit<CMICmnThreadMgrStd>(IDS_MI_INIT_ERR_THREADMGR, bOk, errMsg); 122 MI::ModuleInit<CMICmnLLDBDebuggerHandleEvents>(IDS_MI_INIT_ERR_OUTOFBANDHANDLER, bOk, errMsg); 123 MI::ModuleInit<CMICmnLLDBDebugSessionInfo>(IDS_MI_INIT_ERR_DEBUGSESSIONINFO, bOk, errMsg); 179 // Explicitly delete the remote target in case MI needs to exit prematurely otherwise 196 MI [all...] |
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | MachineInstr.cpp | 62 if (MachineInstr *MI = getParent()) 63 if (MachineBasicBlock *MBB = MI->getParent()) 104 if (MachineInstr *MI = getParent()) 105 if (MachineBasicBlock *MBB = MI->getParent()) 122 if (MachineInstr *MI = getParent()) { 123 if (MachineBasicBlock *MBB = MI->getParent()) { 180 if (MachineInstr *MI = getParent()) 181 if (MachineBasicBlock *MBB = MI->getParent()) 666 MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) argument 667 : MCID(&MI 1020 MachineInstr *MI = (MachineInstr *)this; local 1600 copyImplicitOps(MachineFunction &MF, const MachineInstr *MI) argument 2052 getHashValue(const MachineInstr* const &MI) argument [all...] |
H A D | MachineCombiner.cpp | 234 /// The DAGCombine code sequence ends in MI (Machine Instruction) Root. 235 /// The new code sequence ends in MI NewRoot. A necessary condition for the new 360 auto &MI = *BlockIter++; local 362 DEBUG(dbgs() << "INSTR "; MI.dump(); dbgs() << "\n";); 379 // pattern. Then for each pattern the new code sequence in form of MI is 389 if (!TII->getMachineCombinerPatterns(MI, Patterns)) 400 TII->genAlternativeCodeSequence(MI, P, InsInstrs, DelInstrs, 415 (improvesCriticalPathLen(MBB, &MI, BlockTrace, InsInstrs, 419 MBB->insert((MachineBasicBlock::iterator) &MI, InstrPtr);
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/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 416 MachineBasicBlock::iterator MI, 428 if (MI != MBB.end() && !MI->isDebugValue()) 429 DL = MI->getDebugLoc(); 440 TII.storeRegToStackSlot(MBB, MI, Reg, true, it->getFrameIdx(), RC, TRI); 442 auto Store = MI; 452 MachineBasicBlock::iterator MI, 457 bool AtStart = MI == MBB.begin(); 458 MachineBasicBlock::iterator BeforeI = MI; 468 TII.loadRegFromStackSlot(MBB, MI, Re 415 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 451 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument [all...] |
/freebsd-11.0-release/contrib/llvm/utils/TableGen/ |
H A D | FastISelEmitter.cpp | 823 std::map<OperandsSignature, std::vector<OperandsSignature> >::iterator MI 825 if (MI != SignaturesWithConstantForms.end()) { 827 std::sort(MI->second.begin(), MI->second.end()); 828 MI->second.erase(std::unique(MI->second.begin(), MI->second.end()), 829 MI->second.end()); 834 for (unsigned i = 0, e = MI->second.size(); i != e; ++i) { 836 MI [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 180 void RewriteMemIntrinUserOfAlloca(MemIntrinsic *MI, Instruction *Inst, 1623 } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(User)) { 1624 ConstantInt *Length = dyn_cast<ConstantInt>(MI->getLength()); 1629 U.getOperandNo() == 0, Info, MI, 1899 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(User)) { 1900 ConstantInt *Length = dyn_cast<ConstantInt>(MI->getLength()); 1903 RewriteMemIntrinUserOfAlloca(MI, I, AI, NewElts); 2174 /// RewriteMemIntrinUserOfAlloca - MI is a memcpy/memset/memmove from or to AI. 2177 SROA::RewriteMemIntrinUserOfAlloca(MemIntrinsic *MI, Instruction *Inst, argument 2185 unsigned MemAlignment = MI [all...] |
/freebsd-11.0-release/contrib/llvm/tools/clang/include/clang/Lex/ |
H A D | MacroInfo.h | 422 DefMacroDirective(MacroInfo *MI, SourceLocation Loc) argument 423 : MacroDirective(MD_Define, Loc), Info(MI) { 424 assert(MI && "MacroInfo is null"); 426 explicit DefMacroDirective(MacroInfo *MI) argument 427 : DefMacroDirective(MI, MI->getDefinitionLoc()) {}
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/freebsd-11.0-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetRegisterInfo.h | 806 virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI, 815 virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const { 830 virtual void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, 837 virtual bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, 862 virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, 870 virtual bool shouldCoalesce(MachineInstr *MI,
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