/freebsd-11.0-release/contrib/llvm/lib/Analysis/ |
H A D | AliasSetTracker.cpp | 178 bool AliasSet::aliasesUnknownInst(const Instruction *Inst, argument 180 if (!Inst->mayReadOrWriteMemory()) 184 ImmutableCallSite C1(getUnknownInst(i)), C2(Inst); 191 if (AA.getModRefInfo(Inst, MemoryLocation(I.getPointer(), I.getSize(), 244 bool AliasSetTracker::containsUnknown(const Instruction *Inst) const { 246 if (!I->Forward && I->aliasesUnknownInst(Inst, AA)) 251 AliasSet *AliasSetTracker::findAliasSetForUnknownInst(Instruction *Inst) { argument 255 if (Cur->Forward || !Cur->aliasesUnknownInst(Inst, AA)) 346 bool AliasSetTracker::addUnknown(Instruction *Inst) { argument 347 if (isa<DbgInfoIntrinsic>(Inst)) [all...] |
H A D | Loads.cpp | 215 Instruction *Inst = &*--ScanFrom; local 216 if (isa<DbgInfoIntrinsic>(Inst)) 230 if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) 239 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 271 if (Inst->mayWriteToMemory()) { 275 (AA->getModRefInfo(Inst, StrippedPtr, AccessSize) & MRI_Mod) == 0)
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 259 void HexagonAsmPrinter::HexagonProcessInstruction(MCInst &Inst, argument 261 MCInst &MappedInst = static_cast <MCInst &>(Inst); 264 switch (Inst.getOpcode()) { 310 MCOperand &Ps = Inst.getOperand(1); 320 MCOperand &Rt = Inst.getOperand(3); 331 MCOperand &Rt = Inst.getOperand(2); 343 MCOperand &Rt = Inst.getOperand(2); 355 MCOperand &Rs = Inst.getOperand(1); 409 if (Inst.getOpcode() == Hexagon::S2_asr_i_p_rnd_goodsyntax) 423 MCOperand &MO = Inst [all...] |
H A D | HexagonAsmPrinter.h | 45 void HexagonProcessInstruction(MCInst &Inst,
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/freebsd-11.0-release/contrib/llvm/include/llvm/MC/ |
H A D | MCSymbolizer.h | 62 /// \param Inst - The MCInst where to insert the symbolic operand. 70 virtual bool tryAddingSymbolicOperand(MCInst &Inst, raw_ostream &cStream,
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H A D | MCAsmBackend.h | 100 /// \param Inst - The instruction to test. 101 virtual bool mayNeedRelaxation(const MCInst &Inst) const = 0; 117 /// \param Inst The instruction to relax, which may be the same as the 120 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const = 0;
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H A D | MCObjectStreamer.h | 43 virtual void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo&) = 0; 100 void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo& STI) override; 104 virtual void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &);
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCELFStreamer.cpp | 80 void HexagonMCELFStreamer::EmitSymbol(const MCInst &Inst) { argument 82 for (unsigned i = Inst.getNumOperands(); i--;) 83 if (Inst.getOperand(i).isExpr()) 84 visitUsedExpr(*Inst.getOperand(i).getExpr());
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H A D | HexagonMCTargetDesc.cpp | 83 const MCInst &Inst, const MCSubtargetInfo &STI) override { 84 assert(HexagonMCInstrInfo::isBundle(Inst)); 85 assert(HexagonMCInstrInfo::bundleSize(Inst) <= HEXAGON_PACKET_SIZE); 89 InstPrinter.printInst(&Inst, TempStream, "", STI); 155 MCCFIInstruction Inst = local 157 MAI->addInitialFrameState(Inst); 238 // Register the MC Inst Printer
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCTargetDesc.cpp | 40 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); local 41 MAI->addInitialFrameState(Inst); 49 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047); local 50 MAI->addInitialFrameState(Inst);
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/freebsd-11.0-release/contrib/llvm/lib/Object/ |
H A D | RecordStreamer.cpp | 70 void RecordStreamer::EmitInstruction(const MCInst &Inst, argument 72 MCStreamer::EmitInstruction(Inst, STI);
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAsmBackend.h | 57 bool mayNeedRelaxation(const MCInst &Inst) const override; 66 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override;
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H A D | ARMAsmBackend.cpp | 183 bool ARMAsmBackend::mayNeedRelaxation(const MCInst &Inst) const { 184 if (getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode()) 248 void ARMAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const { argument 249 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode()); 252 if (RelaxedOp == Inst.getOpcode()) { 255 Inst.dump_pretty(OS); 262 if ((Inst.getOpcode() == ARM::tCBZ || Inst.getOpcode() == ARM::tCBNZ) && 273 Res = Inst; 864 const MCCFIInstruction &Inst = Instrs[i]; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/Disassembler/ |
H A D | HexagonDisassembler.cpp | 67 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, 70 static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo, 73 static DecodeStatus DecodeVectorRegsRegisterClass(MCInst &Inst, unsigned RegNo, 76 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, 79 static DecodeStatus DecodeVecDblRegsRegisterClass(MCInst &Inst, unsigned RegNo, 82 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, 85 static DecodeStatus DecodeVecPredRegsRegisterClass(MCInst &Inst, unsigned RegNo, 88 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, 91 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo, 94 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigne 371 auto const &Inst = *i->getInst(); local 398 MCInst const & Inst = HexagonMCInstrInfo::isDuplex(*MCII, MI) ? local 473 DecodeRegisterClass(MCInst &Inst, unsigned RegNo, ArrayRef<MCPhysReg> Table) argument 483 DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 489 DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 504 DecodeVectorRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 519 DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 531 DecodeVecDblRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 543 DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 552 DecodeVecPredRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 561 DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 582 DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument 606 DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 183 bool optimizeExtractElementInst(Instruction *Inst); 188 Instruction *&Inst, 2096 Instruction *Inst; member in class:__anon2445::TypePromotionTransaction::TypePromotionAction 2101 TypePromotionAction(Instruction *Inst) : Inst(Inst) {} argument 2134 /// \brief Record the position of \p Inst. 2135 InsertionHandler(Instruction *Inst) { argument 2136 BasicBlock::iterator It = Inst->getIterator(); 2137 HasPrevInstruction = (It != (Inst 2145 insert(Instruction *Inst) argument 2167 InstructionMoveBefore(Instruction *Inst, Instruction *Before) argument 2189 OperandSetter(Instruction *Inst, unsigned Idx, Value *NewVal) argument 2215 OperandsHider(Instruction *Inst) argument 2319 TypeMutator(Instruction *Inst, Type *NewTy) argument 2339 Instruction *Inst; member in struct:__anon2445::TypePromotionTransaction::UsesReplacer::InstructionAndIdx 2342 InstructionAndIdx(Instruction *Inst, unsigned Idx) argument 2352 UsesReplacer(Instruction *Inst, Value *New) argument 2389 InstructionRemover(Instruction *Inst, Value *New = nullptr) argument 2452 setOperand(Instruction *Inst, unsigned Idx, Value *NewVal) argument 2458 eraseInstruction(Instruction *Inst, Value *NewVal) argument 2464 replaceAllUsesWith(Instruction *Inst, Value *New) argument 2469 mutateType(Instruction *Inst, Type *NewTy) argument 2481 createSExt(Instruction *Inst, Value *Opnd, Type *Ty) argument 2489 createZExt(Instruction *Inst, Value *Opnd, Type *Ty) argument 2497 moveBefore(Instruction *Inst, Instruction *Before) argument 2726 shouldExtOperand(const Instruction *Inst, int OpIdx) argument 2804 canGetThrough(const Instruction *Inst, Type *ConsideredExtType, const InstrToOrigTy &PromotedInsts, bool IsSExt) argument 3993 hasSameExtUse(Instruction *Inst, const TargetLowering &TLI) argument 4063 extLdPromotion(TypePromotionTransaction &TPT, LoadInst *&LI, Instruction *&Inst, const SmallVectorImpl<Instruction *> &Exts, unsigned CreatedInstsCost = 0) argument 5046 optimizeExtractElementInst(Instruction *Inst) argument [all...] |
/freebsd-11.0-release/contrib/llvm/lib/MC/ |
H A D | MCStreamer.cpp | 226 for (const MCCFIInstruction& Inst : MAI->getInitialFrameState()) { 227 if (Inst.getOperation() == MCCFIInstruction::OpDefCfa || 228 Inst.getOperation() == MCCFIInstruction::OpDefCfaRegister) { 229 Frame.CurrentCfaRegister = Inst.getRegister(); 484 WinEH::Instruction Inst = Win64EH::Instruction::PushNonVol(Label, Register); local 485 CurrentWinFrameInfo->Instructions.push_back(Inst); 500 WinEH::Instruction Inst = local 503 CurrentWinFrameInfo->Instructions.push_back(Inst); 516 WinEH::Instruction Inst = Win64EH::Instruction::Alloc(Label, Size); local 517 CurrentWinFrameInfo->Instructions.push_back(Inst); 528 WinEH::Instruction Inst = local 541 WinEH::Instruction Inst = local 554 WinEH::Instruction Inst = Win64EH::Instruction::PushMachFrame(Label, Code); local 613 prettyPrintAsm(MCInstPrinter &InstPrinter, raw_ostream &OS, const MCInst &Inst, const MCSubtargetInfo &STI) argument 647 EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) argument [all...] |
H A D | MCObjectStreamer.cpp | 226 void MCObjectStreamer::EmitInstruction(const MCInst &Inst, argument 228 MCStreamer::EmitInstruction(Inst, STI); 239 if (!Assembler.getBackend().mayNeedRelaxation(Inst)) { 240 EmitInstToData(Inst, STI); 252 getAssembler().getBackend().relaxInstruction(Inst, Relaxed); 260 EmitInstToFragment(Inst, STI); 263 void MCObjectStreamer::EmitInstToFragment(const MCInst &Inst, argument 270 MCRelaxableFragment *IF = new MCRelaxableFragment(Inst, STI); 275 getAssembler().getEmitter().encodeInstruction(Inst, VecOS, IF->getFixups(),
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/freebsd-11.0-release/contrib/llvm/lib/Transforms/Scalar/ |
H A D | DeadStoreElimination.cpp | 203 static MemoryLocation getLocForWrite(Instruction *Inst, AliasAnalysis &AA) { argument 204 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) 207 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(Inst)) { 213 IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst); 233 static MemoryLocation getLocForRead(Instruction *Inst, argument 235 assert(hasMemoryWrite(Inst, TLI) && "Unknown instruction case"); 239 if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(Inst)) 436 /// isPossibleSelfRead - If 'Inst' might be a self read (i.e. a noop copy of a 449 static bool isPossibleSelfRead(Instruction *Inst, argument 456 MemoryLocation InstReadLoc = getLocForRead(Inst, TL 491 Instruction *Inst = &*BBI++; local 593 << *DepWrite << "\\n KILLER: " << *Inst << '\\n'); local 861 Instruction *Inst = &*BBI++; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/AsmParser/ |
H A D | LLParser.h | 338 Instruction *Inst); 419 bool ParseInstructionMetadata(Instruction &Inst); 454 int ParseInstruction(Instruction *&Inst, BasicBlock *BB, 458 bool ParseRet(Instruction *&Inst, BasicBlock *BB, PerFunctionState &PFS); 459 bool ParseBr(Instruction *&Inst, PerFunctionState &PFS); 460 bool ParseSwitch(Instruction *&Inst, PerFunctionState &PFS); 461 bool ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS); 462 bool ParseInvoke(Instruction *&Inst, PerFunctionState &PFS); 463 bool ParseResume(Instruction *&Inst, PerFunctionState &PFS); 464 bool ParseCleanupRet(Instruction *&Inst, PerFunctionStat [all...] |
H A D | LLParser.cpp | 1609 bool LLParser::ParseInstructionMetadata(Instruction &Inst) { 1619 Inst.setMetadata(MDK, N); 1621 InstsWithTBAATag.push_back(&Inst); 2409 LocTy NameLoc, Instruction *Inst) { 2411 if (Inst->getType()->isVoidTy()) { 2431 if (Sentinel->getType() != Inst->getType()) 2435 Sentinel->replaceAllUsesWith(Inst); 2440 NumberedVals.push_back(Inst); 2448 if (Sentinel->getType() != Inst->getType()) 2452 Sentinel->replaceAllUsesWith(Inst); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 495 Value *AArch64TTIImpl::getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, argument 497 switch (Inst->getIntrinsicID()) { 507 unsigned NumElts = Inst->getNumArgOperands() - 1; 511 if (Inst->getArgOperand(i)->getType() != ST->getElementType(i)) 515 IRBuilder<> Builder(Inst); 517 Value *L = Inst->getArgOperand(i); 525 if (Inst->getType() == ExpectedType) 526 return Inst; 531 bool AArch64TTIImpl::getTgtMemIntrinsic(IntrinsicInst *Inst, argument 533 switch (Inst [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 1761 void SIInstrInfo::swapOperands(MachineBasicBlock::iterator Inst) const { 1762 assert(Inst->getNumExplicitOperands() == 3); 1763 MachineOperand Op1 = Inst->getOperand(1); 1764 Inst->RemoveOperand(1); 1765 Inst->addOperand(Op1); 2454 MachineInstr *Inst = Worklist.pop_back_val(); 2455 MachineBasicBlock *MBB = Inst->getParent(); 2458 unsigned Opcode = Inst->getOpcode(); 2459 unsigned NewOpcode = getVALUOp(*Inst); 2464 if (isSMRD(*Inst)) { [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AsmBackend.cpp | 73 bool mayNeedRelaxation(const MCInst &Inst) const override; 77 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override; 226 bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst) const { 241 void AArch64AsmBackend::relaxInstruction(const MCInst &Inst, argument 329 const MCCFIInstruction &Inst = Instrs[i]; variable 331 switch (Inst.getOperation()) { 337 assert(getXRegFromWReg(MRI.getLLVMRegNum(Inst.getRegister(), true)) == 365 StackSize = std::abs(Inst.getOffset()); 371 unsigned Reg1 = MRI.getLLVMRegNum(Inst.getRegister(), true);
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 87 void expandSET(MCInst &Inst, SMLoc IDLoc, 281 void addRegOperands(MCInst &Inst, unsigned N) const { argument 283 Inst.addOperand(MCOperand::createReg(getReg())); 286 void addImmOperands(MCInst &Inst, unsigned N) const { argument 289 addExpr(Inst, Expr); 292 void addExpr(MCInst &Inst, const MCExpr *Expr) const{ argument 295 Inst.addOperand(MCOperand::createImm(0)); 297 Inst.addOperand(MCOperand::createImm(CE->getValue())); 299 Inst.addOperand(MCOperand::createExpr(Expr)); 302 void addMEMrrOperands(MCInst &Inst, unsigne argument 311 addMEMriOperands(MCInst &Inst, unsigned N) const argument 435 expandSET(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) argument 513 MCInst Inst; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86AsmBackend.cpp | 121 bool mayNeedRelaxation(const MCInst &Inst) const override; 127 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override; 249 bool X86AsmBackend::mayNeedRelaxation(const MCInst &Inst) const { 251 if (getRelaxedOpcodeBranch(Inst.getOpcode()) != Inst.getOpcode()) 255 if (getRelaxedOpcodeArith(Inst.getOpcode()) == Inst.getOpcode()) 261 unsigned RelaxableOp = Inst.getNumOperands() - 1; 262 if (Inst.getOperand(RelaxableOp).isExpr()) 278 void X86AsmBackend::relaxInstruction(const MCInst &Inst, MCIns argument 496 const MCCFIInstruction &Inst = Instrs[i]; local [all...] |