Searched refs:FBB (Results 26 - 50 of 53) sorted by relevance

123

/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ConditionalCompares.cpp498 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
499 if (TII->AnalyzeBranch(*Head, TBB, FBB, HeadCond)) {
526 TBB = FBB = nullptr;
527 if (TII->AnalyzeBranch(*CmpBB, TBB, FBB, CmpBBCond)) {
H A DAArch64ConditionOptimizer.cpp329 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
330 if (TII->AnalyzeBranch(*HBB, TBB, FBB, HeadCond)) {
H A DAArch64FastISel.cpp2164 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local
2168 std::swap(TBB, FBB);
2263 finishCondBranch(BI->getParent(), TBB, FBB);
2276 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local
2286 fastEmitBranch(FBB, DbgLoc);
2299 std::swap(TBB, FBB);
2337 finishCondBranch(BI->getParent(), TBB, FBB);
2342 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
2368 finishCondBranch(BI->getParent(), TBB, FBB);
2381 std::swap(TBB, FBB);
[all...]
H A DAArch64InstrInfo.cpp94 MachineBasicBlock *&FBB,
152 FBB = LastInst->getOperand(0).getMBB();
263 MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
268 if (!FBB) {
278 BuildMI(&MBB, DL, get(AArch64::B)).addMBB(FBB);
92 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
262 InsertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h63 /// just return false, leaving TBB/FBB null.
72 /// 'false' destination in FBB, and a list of operands that evaluate the
83 MachineBasicBlock *&FBB,
103 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
H A DHexagonInstrInfo.cpp295 MachineBasicBlock *&FBB,
299 FBB = nullptr;
418 FBB = LastInst->getOperand(0).getMBB();
430 FBB = LastInst->getOperand(0).getMBB();
449 FBB = LastInst->getOperand(0).getMBB();
481 MachineBasicBlock *TBB, MachineBasicBlock *FBB,
494 if (!FBB) {
569 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
293 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
480 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
H A DHexagonHardwareLoops.cpp1424 MachineBasicBlock *TBB = 0, *FBB = 0; local
1426 if (TII->AnalyzeBranch(*MI->getParent(), TBB, FBB, Cond, false))
/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp249 MachineBasicBlock *&FBB,
293 FBB = nullptr;
311 FBB = TBB;
370 MachineBasicBlock *FBB,
384 assert(!FBB && "Unconditional branch with multiple successors!");
397 if (FBB) {
399 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
247 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
369 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/
H A DMachineVerifier.cpp568 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
571 TBB, FBB, Cond)) {
574 if (!TBB && !FBB) {
602 } else if (TBB && !FBB && Cond.empty()) {
625 } else if (TBB && !FBB && !Cond.empty()) {
656 } else if (TBB && FBB) {
661 if (FBB != TBB)
670 } else if (!matchPair(MBB->succ_begin(), TBB, FBB)) {
H A DIfConversion.cpp88 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
229 MachineBasicBlock &FBB,
233 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
862 // TBB FBB
881 // FBB
904 // FBB
1002 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
1004 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
1005 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
227 MeetIfcvtSizeLimit(MachineBasicBlock &TBB, unsigned TCycle, unsigned TExtra, MachineBasicBlock &FBB, unsigned FCycle, unsigned FExtra, BranchProbability Prediction) const argument
H A DMachineLICM.cpp765 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; local
767 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
H A DCodeGenPrepare.cpp5433 BasicBlock *TBB, *FBB; local
5434 if (!match(BB.getTerminator(), m_Br(m_OneUse(m_BinOp(LogicOp)), TBB, FBB)))
5478 auto *Br2 = IRBuilder<>(TmpBB).CreateCondBr(Cond2, TBB, FBB);
5494 std::swap(TBB, FBB);
5507 for (auto &I : *FBB) {
5524 // jmp FBB
5555 // jmp FBB
5558 // jmp FBB
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h126 MachineBasicBlock *&FBB,
131 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
H A DARMConstantIslandPass.cpp655 MachineBasicBlock *TBB, *FBB;
657 bool TooDifficult = TII->AnalyzeBranch(*MBB, TBB, FBB, Cond);
658 return TooDifficult || FBB == nullptr;
2236 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
2243 bool B = TII->AnalyzeBranch(*BB, TBB, FBB, Cond);
2249 !TII->AnalyzeBranch(*OldPrior, TBB, FBB, CondPrior)) {
H A DARMFastISel.cpp1249 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local
1262 std::swap(TBB, FBB);
1278 finishCondBranch(BI->getParent(), TBB, FBB);
1294 std::swap(TBB, FBB);
1302 finishCondBranch(BI->getParent(), TBB, FBB);
1308 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
1332 std::swap(TBB, FBB);
1339 finishCondBranch(BI->getParent(), TBB, FBB);
H A DARMBaseInstrInfo.cpp279 MachineBasicBlock *&FBB,
283 FBB = nullptr;
318 assert(!FBB && "FBB should have been null.");
319 FBB = TBB;
340 FBB = nullptr;
395 MachineBasicBlock *FBB,
412 if (!FBB) {
428 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0);
430 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
278 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
394 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp446 MachineBasicBlock *&FBB,
538 FBB = LastInst->getOperand(0).getMBB();
548 FBB = LastInst->getOperand(0).getMBB();
558 FBB = LastInst->getOperand(0).getMBB();
572 FBB = LastInst->getOperand(0).getMBB();
586 FBB = LastInst->getOperand(0).getMBB();
638 MachineBasicBlock *FBB,
649 if (!FBB) {
678 BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB);
445 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
637 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
H A DPPCFastISel.cpp750 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local
763 std::swap(TBB, FBB);
775 finishCondBranch(BI->getParent(), TBB, FBB);
781 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp2932 MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); local
2935 F->insert(It, FBB);
2945 BB->addSuccessor(FBB);
2947 FBB->addSuccessor(Sink);
2953 // Fill $FBB.
2955 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2)
2957 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::B)).addMBB(Sink);
2967 .addReg(VR2).addMBB(FBB)
2997 MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); local
[all...]
/freebsd-11.0-release/contrib/llvm/include/llvm/Target/
H A DTargetInstrInfo.h437 /// just return false, leaving TBB/FBB null.
446 /// 'false' destination in FBB, and a list of operands that evaluate the
457 MachineBasicBlock *&FBB,
526 MachineBasicBlock *FBB,
456 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify = false) const argument
525 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp694 MachineBasicBlock *&FBB,
753 FBB = LastInst->getOperand(0).getMBB();
778 MachineBasicBlock *FBB,
783 if (!FBB) {
811 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB);
692 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
776 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.h695 MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
700 MachineBasicBlock *FBB,
/freebsd-11.0-release/contrib/llvm/include/llvm/Analysis/
H A DScalarEvolution.h606 /// TBB, and FBB.
610 BasicBlock *FBB,
615 /// ExitCond, TBB, and FBB.
619 BasicBlock *FBB,
/freebsd-11.0-release/contrib/llvm/lib/Analysis/
H A DScalarEvolution.cpp5324 /// were a conditional branch of ExitCond, TBB, and FBB.
5334 BasicBlock *FBB,
5341 ExitLimit EL0 = computeExitLimitFromCond(L, BO->getOperand(0), TBB, FBB,
5343 ExitLimit EL1 = computeExitLimitFromCond(L, BO->getOperand(1), TBB, FBB,
5364 assert(L->contains(FBB) && "Loop block has no successor in loop!");
5383 bool EitherMayExit = L->contains(FBB);
5384 ExitLimit EL0 = computeExitLimitFromCond(L, BO->getOperand(0), TBB, FBB,
5386 ExitLimit EL1 = computeExitLimitFromCond(L, BO->getOperand(1), TBB, FBB,
5421 return computeExitLimitFromICmp(L, ExitCondICmp, TBB, FBB, ControlsExit);
5428 if (L->contains(FBB)
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp3902 MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
3939 FBB = nullptr;
4000 FBB = TBB;
4049 MachineBasicBlock *&FBB,
4053 return AnalyzeBranchImpl(MBB, TBB, FBB, Cond, CondBranches, AllowModify);
4147 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
4156 assert(!FBB && "Unconditional branch with multiple successors!");
4185 if (FBB) {
4187 BuildMI(&MBB, DL, get(X86::JMP_1)).addMBB(FBB);
3901 AnalyzeBranchImpl( MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, SmallVectorImpl<MachineInstr *> &CondBranches, bool AllowModify) const argument
4047 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
4146 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, DebugLoc DL) const argument

Completed in 405 milliseconds

123