Searched refs:dl (Results 76 - 100 of 300) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp46 const ARCInstrInfo &TII, DebugLoc dl,
72 BuildMI(MBB, MBBI, dl, TII.get(AdjOp), StackPtr)
127 DebugLoc dl; local
143 BuildMI(MBB, MBBI, dl, TII->get(Opc), ARC::SP)
149 BuildMI(MBB, MBBI, dl, TII->get(ARC::ST_AW_rs9))
160 BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
161 BuildMI(MBB, MBBI, dl, TII->get(ARC::SUB_rru6))
165 BuildMI(MBB, MBBI, dl, TII->get(ARC::BL))
174 BuildMI(MBB, MBBI, dl, TII->get(ARC::PUSH_S_BLINK));
182 generateStackAdjustment(MBB, MBBI, *ST.getInstrInfo(), dl,
44 generateStackAdjustment(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const ARCInstrInfo &TII, DebugLoc dl, int Amount, int StackPtr) argument
452 emitRegUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned Reg, int NumBytes, bool IsAdd, const ARCInstrInfo *TII) argument
475 DebugLoc dl = Old.getDebugLoc(); local
[all...]
H A DARCISelLowering.h84 SDLoc dl, SelectionDAG &DAG,
98 const SDLoc &dl, SelectionDAG &DAG,
106 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
H A DARCInstrInfo.cpp283 const DebugLoc &dl, MCRegister DestReg,
289 BuildMI(MBB, I, dl, get(ARC::MOV_rr), DestReg)
299 DebugLoc dl = MBB.findDebugLoc(I); local
315 BuildMI(MBB, I, dl, get(ARC::ST_rs9))
327 DebugLoc dl = MBB.findDebugLoc(I); local
342 BuildMI(MBB, I, dl, get(ARC::LD_rs9))
361 DebugLoc dl = MBB.findDebugLoc(MI); local
363 return BuildMI(MBB, MI, dl, get(ARC::MOV_rs12), Reg)
374 const DebugLoc &dl, int *BytesAdded) const {
383 BuildMI(&MBB, dl, ge
281 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &dl, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument
370 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &dl, int *BytesAdded) const argument
[all...]
H A DARCInstrInfo.h60 const DebugLoc &dl,
67 const DebugLoc &dl, MCRegister DestReg, MCRegister SrcReg,
H A DARCRegisterInfo.cpp45 DebugLoc dl = MI.getDebugLoc(); local
50 BuildMI(MBB, II, dl, TII.get(ARC::LD_rlimm), Reg)
75 BuildMI(MBB, II, dl, TII.get(AddOpc))
93 BuildMI(MBB, II, dl, TII.get(MI.getOpcode()), Reg)
106 BuildMI(MBB, II, dl, TII.get(MI.getOpcode()))
114 BuildMI(MBB, II, dl,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp102 static void errorUnsupported(SelectionDAG &DAG, const SDLoc &dl, argument
106 DiagnosticInfoUnsupported(MF.getFunction(), Msg, dl.getDebugLoc()));
2642 const SDLoc &dl, SelectionDAG &DAG) const {
2663 RetOps.push_back(DAG.getTargetConstant(FuncInfo->getBytesToPopOnReturn(), dl,
2681 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy);
2683 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy);
2686 ValToCopy = lowerMasksToReg(ValToCopy, VA.getLocVT(), dl, DAG);
2688 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy);
2699 errorUnsupported(DAG, dl, "SSE register return with SSE disabled");
2706 errorUnsupported(DAG, dl, "SSE
2638 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
2991 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, uint32_t *RegMask) const argument
3131 CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, ISD::ArgFlagsTy Flags, SelectionDAG &DAG, const SDLoc &dl) argument
3188 LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo &MFI, unsigned i) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1695 static SDValue emitStrictFPComparison(SDValue LHS, SDValue RHS, const SDLoc &dl, argument
1703 return DAG.getNode(Opcode, dl, {VT, MVT::Other}, {Chain, LHS, RHS});
1707 const SDLoc &dl, SelectionDAG &DAG) {
1715 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS);
1716 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS);
1719 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS);
1747 return DAG.getNode(Opcode, dl, DAG.getVTList(VT, MVT_CC), LHS, RHS)
2076 const SDLoc &dl) {
2093 RHS = DAG.getConstant(C, dl, VT);
2103 RHS = DAG.getConstant(C, dl, V
1706 emitComparison(SDValue LHS, SDValue RHS, ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) argument
2074 getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &AArch64cc, SelectionDAG &DAG, const SDLoc &dl) argument
5301 LowerSELECT_CC(ISD::CondCode CC, SDValue LHS, SDValue RHS, SDValue TVal, SDValue FVal, const SDLoc &dl, SelectionDAG &DAG) const argument
7032 GeneratePerfectShuffle(unsigned PFEntry, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const SDLoc &dl) argument
8376 EmitVectorComparison(SDValue LHS, SDValue RHS, AArch64CC::CondCode CC, bool NoNans, EVT VT, const SDLoc &dl, SelectionDAG &DAG) argument
[all...]
/freebsd-11-stable/usr.sbin/ppp/
H A Dpap.c87 struct bundle *bundle = authp->physical->dl->bundle;
140 link_PushPacket(&authp->physical->link, bp, authp->physical->dl->bundle,
147 struct bundle *bundle = authp->physical->dl->bundle;
149 datalink_GotAuthname(authp->physical->dl, authp->in.name);
165 datalink_AuthOk(authp->physical->dl);
172 datalink_AuthNotOk(authp->physical->dl);
185 struct authinfo *authp = &p->dl->pap;
293 datalink_AuthOk(p->dl);
299 datalink_AuthNotOk(p->dl);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp52 DebugLoc dl = MI->getDebugLoc(); local
78 BuildMI(*BB, MI, dl, get(LdOpc))
81 BuildMI(*BB, MI, dl, get(StOpc))
92 BuildMI(*BB, MI, dl, get(BPF::LDW))
94 BuildMI(*BB, MI, dl, get(BPF::STW))
99 BuildMI(*BB, MI, dl, get(BPF::LDH))
101 BuildMI(*BB, MI, dl, get(BPF::STH))
106 BuildMI(*BB, MI, dl, get(BPF::LDB))
108 BuildMI(*BB, MI, dl, get(BPF::STB))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCBranchSelector.cpp331 DebugLoc dl = OldBranch.getDebugLoc(); local
342 BuildMI(MBB, I, dl, TII->get(PPC::BCC))
346 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2);
349 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2);
351 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2);
353 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2);
355 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2);
357 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2);
363 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
H A DPPCRegisterInfo.cpp507 DebugLoc dl = MI.getDebugLoc(); local
533 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), Reg)
537 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
541 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg)
545 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg)
562 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg)
567 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg)
573 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1)
577 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())
587 BuildMI(MBB, II, dl, TI
627 DebugLoc dl = MI.getDebugLoc(); local
651 DebugLoc dl = MI.getDebugLoc(); local
696 DebugLoc dl = MI.getDebugLoc(); local
740 DebugLoc dl = MI.getDebugLoc(); local
848 DebugLoc dl = MI.getDebugLoc(); local
898 DebugLoc dl = MI.getDebugLoc(); local
924 DebugLoc dl = MI.getDebugLoc(); local
1028 DebugLoc dl = MI.getDebugLoc(); local
[all...]
/freebsd-11-stable/secure/lib/libcrypto/i386/
H A Dbf-686.S50 movb %dl,%bl
56 movb %dl,%bl
88 movb %dl,%bl
94 movb %dl,%bl
126 movb %dl,%bl
132 movb %dl,%bl
164 movb %dl,%bl
170 movb %dl,%bl
202 movb %dl,%bl
208 movb %dl,
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h683 SDValue getBasicBlock(MachineBasicBlock *MBB, SDLoc dl);
685 SDValue getExternalSymbol(const char *Sym, const SDLoc &dl, EVT VT);
693 SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label);
694 SDValue getLabelNode(unsigned Opcode, const SDLoc &dl, SDValue Root,
703 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, argument
705 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
712 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N, argument
716 return getNode(ISD::CopyToReg, dl, VTs,
721 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N, argument
725 return getNode(ISD::CopyToReg, dl, VT
729 getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) argument
738 getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT, SDValue Glue) argument
1802 getTargetMemSDNode(SDVTList VTs, ArrayRef<SDValue> Ops, const SDLoc &dl, EVT MemVT, MachineMemOperand *MMO) argument
[all...]
/freebsd-11-stable/stand/i386/boot2/
H A Dsio.S33 subb $0x3,%dl # Divisor latch reg
66 subb $0x5,%dl # Transmitter hold reg
74 sio_getc.1: subb $0x5,%dl # Receiver buffer reg
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp79 MachineInstr &MI, const DebugLoc &dl,
94 DebugLoc dl = MI.getDebugLoc(); local
105 replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
78 replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II, MachineInstr &MI, const DebugLoc &dl, unsigned FIOperandNum, int Offset, unsigned FramePtr) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp75 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { argument
76 return CurDAG->getTargetConstant(Imm, dl, MVT::i32);
309 SDValue GetVLDSTAlign(SDValue Align, const SDLoc &dl, unsigned NumVecs,
1512 static inline SDValue getAL(SelectionDAG *CurDAG, const SDLoc &dl) { argument
1513 return CurDAG->getTargetConstant((uint64_t)ARMCC::AL, dl, MVT::i32);
1777 SDLoc dl(V0.getNode());
1779 CurDAG->getTargetConstant(ARM::GPRPairRegClassID, dl, MVT::i32);
1780 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, dl, MVT::i32);
1781 SDValue SubReg1 = CurDAG->getTargetConstant(ARM::gsub_1, dl, MVT::i32);
1783 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, V
1867 GetVLDSTAlign(SDValue Align, const SDLoc &dl, unsigned NumVecs, bool is64BitVector) argument
[all...]
H A DThumbRegisterInfo.h41 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp494 static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &dl,
805 const SDLoc &dl, SDValue &Chain,
829 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
831 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);
857 Parts[i] = DAG.getConstant(0, dl, RegisterVT);
877 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
881 Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(), NumRegs,
887 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values);
891 const SDLoc &dl, SDValue &Chain, SDValue *Flag,
911 getCopyToParts(DAG, dl, Va
803 getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V) const argument
890 getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V, ISD::NodeType PreferredExtendType) const argument
946 AddInlineAsmOperands(unsigned Code, bool HasMatching, unsigned MatchingIdx, const SDLoc &dl, SelectionDAG &DAG, std::vector<SDValue> &Ops) const argument
1200 DebugLoc dl = DDI.getdl(); local
1299 handleDebugValue(const Value *V, DILocalVariable *Var, DIExpression *Expr, DebugLoc dl, DebugLoc InstDL, unsigned Order) argument
2345 SDLoc dl = CB.DL; local
2452 SDLoc dl = getCurSDLoc(); local
2545 SDLoc dl = getCurSDLoc(); local
2651 SDLoc dl = getCurSDLoc(); local
2717 SDLoc dl = getCurSDLoc(); local
2910 SDLoc dl = getCurSDLoc(); local
3445 SDLoc dl = getCurSDLoc(); local
3521 SDLoc dl = getCurSDLoc(); local
3878 SDLoc dl = getCurSDLoc(); local
4099 SDLoc dl = getCurSDLoc(); local
4262 SDLoc dl = getCurSDLoc(); local
4626 SDLoc dl = getCurSDLoc(); local
4663 SDLoc dl = getCurSDLoc(); local
4712 SDLoc dl = getCurSDLoc(); local
4724 SDLoc dl = getCurSDLoc(); local
4789 SDLoc dl = getCurSDLoc(); local
4939 GetSignificand(SelectionDAG &DAG, SDValue Op, const SDLoc &dl) argument
4952 GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, const SDLoc &dl) argument
4965 getF32Constant(SelectionDAG &DAG, unsigned Flt, const SDLoc &dl) argument
4971 getLimitedPrecisionExp2(SDValue t0, const SDLoc &dl, SelectionDAG &DAG) argument
5063 expandExp(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) argument
5085 expandLog(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) argument
5184 expandLog2(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) argument
5281 expandLog10(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) argument
5371 expandExp2(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) argument
5383 expandPow(const SDLoc &dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI) argument
5737 getDbgValue(SDValue N, DILocalVariable *Variable, DIExpression *Expr, const DebugLoc &dl, unsigned DbgSDNodeOrder) argument
5793 DebugLoc dl = getCurDebugLoc(); local
8335 SDLoc dl = getCurSDLoc(); local
8432 SDLoc dl = getCurSDLoc(); local
8813 SDLoc dl = getCurSDLoc(); local
8958 SDLoc dl = getCurSDLoc(); local
9636 SDLoc dl = SDB->getCurSDLoc(); local
[all...]
/freebsd-11-stable/lib/libc/amd64/string/
H A Dmemcmp.S39 movb -1(%rsi),%dl
/freebsd-11-stable/stand/pc98/boot0.5/
H A Dsupport.s50 # %dl value
54 movb %es:(%bx), %dl
60 # %dl value
64 movb %dl, %es:(%bx)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1252 SDLoc dl(Op);
1255 Op = DAG.getTargetGlobalAddress(GAN->getGlobal(), dl, PtrVT);
1256 return DAG.getNode(NVPTXISD::Wrapper, dl, PtrVT, Op);
1426 SDLoc dl = CLI.DL; local
1444 Chain = DAG.getCALLSEQ_START(Chain, uniqueCallSite, 0, dl);
1476 Chain, DAG.getConstant(ArgAlign, dl, MVT::i32),
1477 DAG.getConstant(paramCount, dl, MVT::i32),
1478 DAG.getConstant(AllocSize, dl, MVT::i32), InFlag};
1479 Chain = DAG.getNode(NVPTXISD::DeclareParam, dl, DeclareParamVTs,
1491 Chain, DAG.getConstant(paramCount, dl, MV
2463 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
2661 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/usr.sbin/rrenumd/
H A Drrenumd.c420 rrenum_output(struct payload_list *pl, struct dst_list *dl) argument
427 sndmhdr.msg_name = (caddr_t)dl->dl_dst;
428 if (dl->dl_dst->sa_family == AF_INET6)
429 sin6 = (struct sockaddr_in6 *)dl->dl_dst;
459 i = sendmsg(dl->dl_dst->sa_family == AF_INET ? s4 : s6, &sndmhdr, 0);
469 struct dst_list *dl; local
471 for (dl = dl_head; dl; dl = dl
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSelectionDAGInfo.cpp20 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
51 CLI.setDebugLoc(dl)
19 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
/freebsd-11-stable/contrib/gcc/config/rs6000/
H A Dppc64-fp.c98 DFtype dh, dl; local
102 dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
104 return (TFtype) dh + (TFtype) dl;
110 DFtype dh, dl; local
114 dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
116 return (TFtype) dh + (TFtype) dl;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp134 DebugLoc dl = MI.getDebugLoc(); local
196 MachineInstr *New = BuildMI(MBB, II, dl, TII.get(Opcode), DstReg)
222 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0).addImm(0x3f);
224 MachineInstr *New = BuildMI(MBB, II, dl, TII.get(AddOpc), AVR::R29R28)
230 BuildMI(MBB, std::next(II), dl, TII.get(AVR::OUTARr))
236 BuildMI(MBB, std::next(II), dl, TII.get(SubOpc), AVR::R29R28)

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