Searched refs:Op (Results 201 - 225 of 699) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUUnifyMetadata.cpp98 for (const auto &Op : MD->operands())
99 if (std::find(All.begin(), All.end(), Op.get()) == All.end())
100 All.push_back(Op.get());
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCExpr.h376 Opcode Op; member in class:llvm::MCUnaryExpr
379 MCUnaryExpr(Opcode Op, const MCExpr *Expr, SMLoc Loc) argument
380 : MCExpr(MCExpr::Unary, Loc), Op(Op), Expr(Expr) {}
386 static const MCUnaryExpr *create(Opcode Op, const MCExpr *Expr,
410 Opcode getOpcode() const { return Op; }
452 Opcode Op; member in class:llvm::MCBinaryExpr
455 MCBinaryExpr(Opcode Op, const MCExpr *LHS, const MCExpr *RHS, argument
457 : MCExpr(MCExpr::Binary, Loc), Op(Op), LH
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DScalarEvolutionExpressions.h77 const SCEV *Op; member in class:llvm::SCEVCastExpr
84 const SCEV *getOperand() const { return Op; }
595 for (const auto *Op : cast<SCEVNAryExpr>(S)->operands())
596 push(Op);
700 for (auto *Op : Expr->operands()) {
701 Operands.push_back(((SC*)this)->visit(Op));
702 Changed |= Op != Operands.back();
710 for (auto *Op : Expr->operands()) {
711 Operands.push_back(((SC*)this)->visit(Op));
712 Changed |= Op !
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp445 const RTLIB::Libcall Op; member in struct:__anon2
503 setLibcallName(LC.Op, LC.Name);
505 setCmpLibcallCC(LC.Op, LC.Cond);
521 const RTLIB::Libcall Op; member in struct:__anon3
608 setLibcallName(LC.Op, LC.Name);
609 setLibcallCallingConv(LC.Op, LC.CC);
611 setCmpLibcallCC(LC.Op, LC.Cond);
618 const RTLIB::Libcall Op; member in struct:__anon4
631 setLibcallName(LC.Op, LC.Name);
632 setLibcallCallingConv(LC.Op, L
641 const RTLIB::Libcall Op; member in struct:__anon5
688 const RTLIB::Libcall Op; member in struct:__anon6
1146 const RTLIB::Libcall Op; member in struct:__anon7
1167 const RTLIB::Libcall Op; member in struct:__anon8
1798 isSRL16(const SDValue &Op) argument
1806 isSRA16(const SDValue &Op) argument
1814 isSHL16(const SDValue &Op) argument
1826 isS16(const SDValue &Op, SelectionDAG &DAG) argument
2992 LowerWRITE_REGISTER(SDValue Op, SelectionDAG &DAG) argument
3014 LowerConstantPool(SDValue Op, SelectionDAG &DAG) const argument
3056 LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const argument
3111 LowerGlobalTLSAddressDarwin(SDValue Op, SelectionDAG &DAG) const argument
3156 LowerGlobalTLSAddressWindows(SDValue Op, SelectionDAG &DAG) const argument
3305 LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const argument
3458 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument
3471 LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const argument
3537 LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const argument
3562 LowerGlobalAddressWindows(SDValue Op, SelectionDAG &DAG) const argument
3595 LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const argument
3604 LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const argument
3610 LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op, SelectionDAG &DAG) const argument
3617 LowerINTRINSIC_VOID( SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) const argument
3660 LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) const argument
3789 LowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) argument
3826 LowerPREFETCH(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) argument
3853 LowerVASTART(SDValue Op, SelectionDAG &DAG) argument
4191 isFloatingPointZero(SDValue Op) argument
4397 getARMXALUOOp(SDValue Op, SelectionDAG &DAG, SDValue &ARMcc) const argument
4467 LowerSignedALUO(SDValue Op, SelectionDAG &DAG) const argument
4513 LowerUnsignedALUO(SDValue Op, SelectionDAG &DAG) const argument
4550 LowerSADDSUBSAT(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) argument
4579 LowerSELECT(SDValue Op, SelectionDAG &DAG) const argument
4774 isSaturatingConditional(const SDValue &Op, SDValue &V, uint64_t &K, bool &usat) argument
4873 isLowerSaturatingConditional(const SDValue &Op, SDValue &V, SDValue &SatK) argument
4917 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument
5095 canChangeToInt(SDValue Op, bool &SeenZero, const ARMSubtarget *Subtarget) argument
5116 bitcastf32Toi32(SDValue Op, SelectionDAG &DAG) argument
5128 expandf64Toi32(SDValue Op, SelectionDAG &DAG, SDValue &RetVal1, SDValue &RetVal2) argument
5160 OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const argument
5210 LowerBRCOND(SDValue Op, SelectionDAG &DAG) const argument
5247 LowerBR_CC(SDValue Op, SelectionDAG &DAG) const argument
5330 LowerBR_JT(SDValue Op, SelectionDAG &DAG) const argument
5366 LowerVectorFP_TO_INT(SDValue Op, SelectionDAG &DAG) argument
5397 LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const argument
5436 LowerVectorINT_TO_FP(SDValue Op, SelectionDAG &DAG) argument
5481 LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const argument
5501 LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const argument
5583 LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const argument
5607 LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const argument
5667 SDValue Op = BC->getOperand(0); local
5717 SDValue Op = N->getOperand(0); local
5846 LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const argument
5890 LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const argument
5927 LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const argument
6038 getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) argument
6059 isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) argument
6073 isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, bool isIntrinsic, int64_t &Cnt) argument
6213 LowerVSETCC(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
6393 LowerSETCCCARRY(SDValue Op, SelectionDAG &DAG) argument
6566 LowerConstantFP(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) const argument
7088 LowerBUILD_VECTOR_i1(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
7150 LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) const argument
7388 ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const argument
7729 LowerVECTOR_SHUFFLEv8i8(SDValue Op, ArrayRef<int> ShuffleMask, SelectionDAG &DAG) argument
7750 LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(SDValue Op, SelectionDAG &DAG) argument
7815 LowerVECTOR_SHUFFLE_i1(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
7855 LowerVECTOR_SHUFFLEUsingMovs(SDValue Op, ArrayRef<int> ShuffleMask, SelectionDAG &DAG) argument
7941 LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8142 LowerINSERT_VECTOR_ELT_i1(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8163 LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const argument
8205 LowerEXTRACT_VECTOR_ELT_i1(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8223 LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8244 LowerCONCAT_VECTORS_i1(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8296 LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8321 LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8570 LowerMUL(SDValue Op, SelectionDAG &DAG) argument
8715 LowerSDIV(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8751 LowerUDIV(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) argument
8828 LowerADDSUBCARRY(SDValue Op, SelectionDAG &DAG) argument
8872 LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const argument
8947 LowerWindowsDIVLibCall(SDValue Op, SelectionDAG &DAG, bool Signed, SDValue &Chain) const argument
9027 LowerDIV_Windows(SDValue Op, SelectionDAG &DAG, bool Signed) const argument
9041 SDValue Op = N->getOperand(1); local
9052 ExpandDIV_Windows( SDValue Op, SelectionDAG &DAG, bool Signed, SmallVectorImpl<SDValue> &Results) const argument
9075 LowerPredicateLoad(SDValue Op, SelectionDAG &DAG) argument
9105 LowerPredicateStore(SDValue Op, SelectionDAG &DAG) argument
9140 LowerMLOAD(SDValue Op, SelectionDAG &DAG) argument
9166 LowerAtomicLoadStore(SDValue Op, SelectionDAG &DAG) argument
9244 LowerFSETCC(SDValue Op, SelectionDAG &DAG) const argument
9289 LowerOperation(SDValue Op, SelectionDAG &DAG) const argument
12942 SDValue Op = N->getOperand(0); local
13382 SDValue Op = N->getOperand(0); local
13415 SDValue Op = N->getOperand(0); local
14994 int Op = 0; local
15566 getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const argument
15653 computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument
15747 targetShrinkDemandedConstant(SDValue Op, const APInt &DemandedAPInt, TargetLoweringOpt &TLO) const argument
16026 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const argument
16232 LowerDivRem(SDValue Op, SelectionDAG &DAG) const argument
16336 LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const argument
16375 LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const argument
16434 LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.cpp320 for (auto &Op : In.operands()) {
321 if (!Op.isReg() || !Op.isUse() || Op.isUndef())
323 RegisterRef R = { Op.getReg(), Op.getSubReg() };
326 bool IsKill = Op.isKill();
336 for (auto &Op : In.operands()) {
337 if (!Op.isReg() || !Op
[all...]
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DSMTConv.h40 const UnaryOperator::Opcode Op,
42 switch (Op) {
59 const UnaryOperator::Opcode Op,
61 switch (Op) {
66 return fromUnOp(Solver, Op, Exp);
75 fromNBinOp(llvm::SMTSolverRef &Solver, const BinaryOperator::Opcode Op, argument
79 if (Op != BO_LAnd && Op != BO_LOr)
84 res = (Op == BO_LAnd) ? Solver->mkAnd(res, ASTs[i])
92 const BinaryOperator::Opcode Op,
39 fromUnOp(llvm::SMTSolverRef &Solver, const UnaryOperator::Opcode Op, const llvm::SMTExprRef &Exp) argument
58 fromFloatUnOp(llvm::SMTSolverRef &Solver, const UnaryOperator::Opcode Op, const llvm::SMTExprRef &Exp) argument
90 fromBinOp(llvm::SMTSolverRef &Solver, const llvm::SMTExprRef &LHS, const BinaryOperator::Opcode Op, const llvm::SMTExprRef &RHS, bool isSigned) argument
169 fromFloatSpecialBinOp(llvm::SMTSolverRef &Solver, const llvm::SMTExprRef &LHS, const BinaryOperator::Opcode Op, const llvm::APFloat::fltCategory &RHS) argument
201 fromFloatBinOp(llvm::SMTSolverRef &Solver, const llvm::SMTExprRef &LHS, const BinaryOperator::Opcode Op, const llvm::SMTExprRef &RHS) argument
341 getBinExpr(llvm::SMTSolverRef &Solver, ASTContext &Ctx, const llvm::SMTExprRef &LHS, QualType LTy, BinaryOperator::Opcode Op, const llvm::SMTExprRef &RHS, QualType RTy, QualType *RetTy) argument
382 BinaryOperator::Opcode Op = BSE->getOpcode(); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp517 const MCOperand &Op = MI->getOperand(OpNo); local
518 if (Op.isReg()) {
519 printRegOperand(Op.getReg(), O, MRI);
520 } else if (Op.isImm()) {
529 printImmediate32(Op.getImm(), STI, O);
535 printImmediate64(Op.getImm(), STI, O);
543 printImmediate16(Op.getImm(), STI, O);
547 if (!isUInt<16>(Op.getImm()) &&
549 printImmediate32(Op.getImm(), STI, O);
557 printImmediateV216(Op
635 const MCOperand &Op = MI->getOperand(OpNo + 1); local
1101 const MCOperand &Op = MI->getOperand(OpNo); local
1112 const MCOperand &Op = MI->getOperand(OpNo); local
1422 const MCOperand &Op = MI->getOperand(OpNo); local
1468 const MCOperand &Op = MI->getOperand(OpNo); local
1543 const MCOperand &Op = MI->getOperand(OpNo); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp208 for (const SDValue &Op : N->op_values()) {
209 if (Op.isUndef())
221 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
224 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
241 for (const SDValue &Op : N->op_values()) {
242 if (Op.isUndef())
244 if (!isa<ConstantSDNode>(Op))
254 for (const SDValue &Op : N->op_values()) {
255 if (Op.isUndef())
257 if (!isa<ConstantFPSDNode>(Op))
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/FuzzMutate/
H A DOperations.h37 OpDescriptor binOpDescriptor(unsigned Weight, Instruction::BinaryOps Op);
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDag.cpp22 for (const auto &Op : enumerate(Operands)) {
23 OS << Separator << "<" << Prefix << format("%d", Op.index()) << ">"
24 << "#" << Op.index() << " $" << Op.value().getName();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFGraph.cpp232 [] (const MachineOperand &Op) -> bool {
233 return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
412 assert(Ref.Op != nullptr);
413 return G.makeRegRef(*Ref.Op);
426 void RefNode::setRegRef(MachineOperand *Op, DataFlowGraph &G) { argument
430 Ref.Op = Op;
606 const MachineOperand &Op local
630 const MachineOperand &Op = In.getOperand(OpNum); local
808 newUse(NodeAddr<InstrNode*> Owner, MachineOperand &Op, uint16_t Flags) argument
824 newDef(NodeAddr<InstrNode*> Owner, MachineOperand &Op, uint16_t Flags) argument
1293 MachineOperand &Op = In.getOperand(OpN); local
1321 MachineOperand &Op = In.getOperand(OpN); local
1338 MachineOperand &Op = In.getOperand(OpN); local
1367 MachineOperand &Op = In.getOperand(OpN); local
[all...]
/freebsd-11-stable/sys/contrib/dev/acpica/components/dispatcher/
H A Ddsmethod.c207 ACPI_PARSE_OBJECT *Op = NULL; local
220 Op = AcpiPsAllocOp (AML_METHOD_OP, ObjDesc->Method.AmlStart);
221 if (!Op)
226 AcpiPsSetName (Op, Node->Name.Integer);
227 Op->Common.Node = Node;
234 AcpiPsFreeOp (Op);
238 Status = AcpiDsInitAmlWalk (WalkState, Op, Node,
243 AcpiPsFreeOp (Op);
253 AcpiPsDeleteParseTree (Op);
383 AcpiDsDumpMethodStack (Status, WalkState, WalkState->Op);
639 AcpiDsCallControlMethod( ACPI_THREAD_STATE *Thread, ACPI_WALK_STATE *ThisWalkState, ACPI_PARSE_OBJECT *Op) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp899 auto Op = std::make_unique<AMDGPUOperand>(Immediate, AsmParser); local
900 Op->Imm.Val = Val;
901 Op->Imm.IsFPImm = IsFPImm;
902 Op->Imm.Type = Type;
903 Op->Imm.Mods = Modifiers();
904 Op->StartLoc = Loc;
905 Op->EndLoc = Loc;
906 return Op;
923 auto Op = std::make_unique<AMDGPUOperand>(Register, AsmParser); local
924 Op
933 auto Op = std::make_unique<AMDGPUOperand>(Expression, AsmParser); local
2583 AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back()); local
2617 AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(*Operands.back()); local
2678 const auto &Op = Inst.getOperand(OpNum); local
3291 AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); local
3308 const auto &Op = Inst.getOperand(OpNum); local
4612 int64_t Op; local
4773 AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); local
4797 AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); local
4836 AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolutionNormalization.cpp51 [&](const SCEV *Op) { return visit(Op); });
H A DTypeMetadataUtils.cpp145 unsigned Op = SL->getElementContainingOffset(Offset); local
146 return getPointerAtOffset(cast<Constant>(I->getOperand(Op)),
147 Offset - SL->getElementOffset(Op), M);
153 unsigned Op = Offset / ElemSize; local
154 if (Op >= C->getNumOperands())
157 return getPointerAtOffset(cast<Constant>(I->getOperand(Op)),
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DProvenanceAnalysisEvaluator.cpp63 for (auto &Op : I->operands())
64 insertIfNamed(Values, Op);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.h324 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
507 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
508 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
545 SDValue lowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
546 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
547 SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
548 SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
549 SDValue lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
550 SDValue lowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
551 SDValue lowerSELECT(SDValue Op, SelectionDA
[all...]
H A DMipsISelLowering.cpp642 // Returns Op if setcc is not a floating point comparison.
643 static SDValue createFPCmp(SelectionDAG &DAG, const SDValue &Op) { argument
645 if (Op.getOpcode() != ISD::SETCC)
646 return Op;
648 SDValue LHS = Op.getOperand(0);
651 return Op;
653 SDValue RHS = Op.getOperand(1);
654 SDLoc DL(Op);
658 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
800 // Op'
1218 LowerOperation(SDValue Op, SelectionDAG &DAG) const argument
2018 lowerBRCOND(SDValue Op, SelectionDAG &DAG) const argument
2043 lowerSELECT(SDValue Op, SelectionDAG &DAG) const argument
2056 lowerSETCC(SDValue Op, SelectionDAG &DAG) const argument
2070 lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument
2117 lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const argument
2130 lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const argument
2212 lowerJumpTable(SDValue Op, SelectionDAG &DAG) const argument
2225 lowerConstantPool(SDValue Op, SelectionDAG &DAG) const argument
2247 lowerVASTART(SDValue Op, SelectionDAG &DAG) const argument
2262 lowerVAARG(SDValue Op, SelectionDAG &DAG) const argument
2320 lowerFCOPYSIGN32(SDValue Op, SelectionDAG &DAG, bool HasExtractInsert) argument
2367 lowerFCOPYSIGN64(SDValue Op, SelectionDAG &DAG, bool HasExtractInsert) argument
2418 lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const argument
2425 lowerFABS32(SDValue Op, SelectionDAG &DAG, bool HasExtractInsert) argument
2462 lowerFABS64(SDValue Op, SelectionDAG &DAG, bool HasExtractInsert) argument
2483 lowerFABS(SDValue Op, SelectionDAG &DAG) const argument
2491 lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const argument
2508 lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const argument
2535 lowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const argument
2559 lowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG) const argument
2569 lowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const argument
2600 lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const argument
2669 lowerLOAD(SDValue Op, SelectionDAG &DAG) const argument
2795 lowerSTORE(SDValue Op, SelectionDAG &DAG) const argument
2808 lowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const argument
2819 lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const argument
4149 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp190 SDValue BPFTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { argument
191 switch (Op.getOpcode()) {
193 return LowerBR_CC(Op, DAG);
195 return LowerGlobalAddress(Op, DAG);
197 return LowerSELECT_CC(Op, DAG);
498 SDValue BPFTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const { argument
499 SDValue Chain = Op.getOperand(0);
500 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
501 SDValue LHS = Op.getOperand(2);
502 SDValue RHS = Op
513 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument
551 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp174 CGIOperandList::ParseOperandName(const std::string &Op, bool AllowWholeOp) { argument
175 if (Op.empty() || Op[0] != '$')
177 TheDef->getName() + ": Illegal operand name: '" + Op + "'");
179 std::string OpName = Op.substr(1);
189 ": illegal empty suboperand name in '" + Op + "'");
203 Op + "'");
214 Op + "'");
223 ": unknown suboperand name in '" + Op +
242 std::pair<unsigned,unsigned> Op local
347 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false); local
[all...]
H A DFastISelEmitter.cpp207 TreePatternNode *Op = InstPatNode->getChild(i);
210 if (!Op->isLeaf() && Op->getOperator()->getName() == "imm") {
212 if (!Op->getPredicateCalls().empty()) {
213 TreePredicateFn PredFn = Op->getPredicateCalls()[0].Fn;
217 if (Op->getPredicateCalls().size() > 1 ||
238 if (!Op->getPredicateCalls().empty() || Op->getNumTypes() != 1)
241 if (!Op->isLeaf()) {
242 if (Op
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp371 auto setFP16OperationAction = [&](unsigned Op, MVT VT, LegalizeAction Action,
373 setOperationAction(Op, VT, STI.allowFP16Math() ? Action : NoF16Action);
537 for (const auto &Op : {ISD::FADD, ISD::FMUL, ISD::FSUB, ISD::FMA}) {
538 setFP16OperationAction(Op, MVT::f16, Legal, Promote);
539 setFP16OperationAction(Op, MVT::v2f16, Legal, Expand);
549 for (const auto &Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FRINT,
551 setOperationAction(Op, MVT::f16, Legal);
552 setOperationAction(Op, MVT::f32, Legal);
553 setOperationAction(Op, MVT::f64, Legal);
554 setOperationAction(Op, MV
1251 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument
1935 LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const argument
1962 LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const argument
2023 LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const argument
2078 LowerFROUND(SDValue Op, SelectionDAG &DAG) const argument
2097 LowerFROUND32(SDValue Op, SelectionDAG &DAG) const argument
2138 LowerFROUND64(SDValue Op, SelectionDAG &DAG) const argument
2173 LowerOperation(SDValue Op, SelectionDAG &DAG) const argument
2209 LowerSelect(SDValue Op, SelectionDAG &DAG) const argument
2225 LowerLOAD(SDValue Op, SelectionDAG &DAG) const argument
2249 LowerLOADi1(SDValue Op, SelectionDAG &DAG) const argument
2267 LowerSTORE(SDValue Op, SelectionDAG &DAG) const argument
2288 LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const argument
2411 LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const argument
4580 IsMulWideOperandDemotable(SDValue Op, unsigned OptSize, OperandSignedness &S) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp223 const MCOperand &Op = MCI.getOperand(I);
224 if (Op.isReg())
235 const MCOperand &Op = MCI.getOperand(MCDesc.getNumOperands() - 1);
236 if (I == MCI.getNumOperands() || !Op.isReg()) {
310 const MCOperand &Op = MCI.getOperand(i);
311 if (!Op.isReg())
396 const MCOperand &Op = MCI.getOperand(OpIndex);
397 if (!Op.isReg())
431 const MCOperand &Op = MCI.getOperand(OpIndex);
432 if (!Op
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1504 static bool isFloatingPointZero(SDValue Op) { argument
1505 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))
1507 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) {
1509 if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
1516 /// isConstantOrUndef - Op is either an undef node or a ConstantSDNode. Return
1517 /// true if Op is undef or if it matches the specified value.
1518 static bool isConstantOrUndef(int Op, int Val) { argument
1519 return Op < 0 || Op
2312 isIntS16Immediate(SDValue Op, int16_t &Imm) argument
2765 LowerConstantPool(SDValue Op, SelectionDAG &DAG) const argument
2845 LowerJumpTable(SDValue Op, SelectionDAG &DAG) const argument
2872 LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const argument
2900 LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const argument
2997 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument
3037 LowerSETCC(SDValue Op, SelectionDAG &DAG) const argument
3091 LowerVAARG(SDValue Op, SelectionDAG &DAG) const argument
3190 LowerVACOPY(SDValue Op, SelectionDAG &DAG) const argument
3201 LowerADJUST_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const argument
3209 LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const argument
3248 LowerVASTART(SDValue Op, SelectionDAG &DAG) const argument
4816 isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) argument
7331 LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op, SelectionDAG &DAG) const argument
7347 LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const argument
7420 LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const argument
7440 LowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const argument
7451 lowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const argument
7459 lowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const argument
7466 LowerLOAD(SDValue Op, SelectionDAG &DAG) const argument
7491 LowerSTORE(SDValue Op, SelectionDAG &DAG) const argument
7514 LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const argument
7522 LowerTRUNCATEVector(SDValue Op, SelectionDAG &DAG) const argument
7579 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument
7704 LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI, SelectionDAG &DAG, const SDLoc &dl) const argument
7770 LowerFP_TO_INTDirectMove(SDValue Op, SelectionDAG &DAG, const SDLoc &dl) const argument
7802 LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG, const SDLoc &dl) const argument
7867 canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI, SelectionDAG &DAG, ISD::LoadExtType ET) const argument
7964 LowerINT_TO_FPDirectMove(SDValue Op, SelectionDAG &DAG, const SDLoc &dl) const argument
8013 LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG, const SDLoc &dl) const argument
8060 LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const argument
8317 LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const argument
8380 LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const argument
8409 LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const argument
8438 LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const argument
8493 BuildIntrinsicOp(unsigned IID, SDValue Op, SelectionDAG &DAG, const SDLoc &dl, EVT DestVT = MVT::Other) argument
8589 LowerBITCAST(SDValue Op, SelectionDAG &DAG) const argument
8605 getNormalLoadInput(const SDValue &Op) argument
8622 LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const argument
9784 LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const argument
9861 LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const argument
9883 LowerREM(SDValue Op, SelectionDAG &DAG) const argument
9896 LowerBSWAP(SDValue Op, SelectionDAG &DAG) const argument
9914 LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const argument
9948 LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const argument
9964 LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const argument
9993 LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const argument
10053 LowerVectorLoad(SDValue Op, SelectionDAG &DAG) const argument
10141 LowerVectorStore(SDValue Op, SelectionDAG &DAG) const argument
10267 LowerMUL(SDValue Op, SelectionDAG &DAG) const argument
10338 LowerABS(SDValue Op, SelectionDAG &DAG) const argument
10377 LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const argument
10455 LowerOperation(SDValue Op, SelectionDAG &DAG) const argument
12955 isFPExtLoad(SDValue Op) argument
14458 SDValue Op = DAG.getNode(PPCISD::SRA_ADDZE, DL, VT, N0, ShiftAmt); local
14473 computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument
14750 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const argument
14863 LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const argument
14898 LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/sys/contrib/dev/acpica/components/debugger/
H A Ddbinput.c865 * Op - Current (executing) parse op
877 ACPI_PARSE_OBJECT *Op)
928 if (Op)
949 AcpiDbSetMethodBreakpoint (AcpiGbl_DbArgs[1], WalkState, Op);
959 AcpiDbSetMethodCallBreakpoint (Op);
1021 Status = AcpiDbCommandDispatch (CommandLine, WalkState, Op);
1032 Status = AcpiDbCommandDispatch (CommandLine, WalkState, Op);
1037 AcpiDbDisplayMethodInfo (Op);
1047 if (Op)
1086 AcpiDbDisassembleAml (AcpiGbl_DbArgs[1], Op);
874 AcpiDbCommandDispatch( char *InputBuffer, ACPI_WALK_STATE *WalkState, ACPI_PARSE_OBJECT *Op) argument
[all...]

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