Searched hist:261642 (Results 1 - 8 of 8) sorted by relevance
/freebsd-11-stable/sys/arm/arm/ | ||
H A D | mem.c | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
H A D | vm_machdep.c | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
H A D | pmap-v4.c | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
H A D | machdep.c | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
/freebsd-11-stable/sys/arm/xscale/i8134x/ | ||
H A D | crb_machdep.c | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
/freebsd-11-stable/sys/arm/include/ | ||
H A D | vmparam.h | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
H A D | pmap-v4.h | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
/freebsd-11-stable/sys/conf/ | ||
H A D | options.arm | diff 261642 Sat Feb 08 20:22:59 MST 2014 ian Remove the ARM_USE_SMALL_ALLOC option and code related to it. This was an optimization used only by a few xscale platforms. Part of the optimization was to create a direct map for all physical pages, and that resulted in making multiple mappings of pages in a way that bypassed the logic in pmap.c to handle VIVT cache aliasing. It also just generally made the code more complex and hard to maintain for all SoCs. Reviewed by: cognet |
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