Searched defs:inst_idx (Results 1 - 13 of 13) sorted by relevance

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_jpeg.c333 int amdgpu_jpeg_psp_update_sram(struct amdgpu_device *adev, int inst_idx, argument
H A Djpeg_v4_0_5.c397 static void jpeg_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
331 jpeg_engine_4_0_5_dpg_clock_gating_mode(struct amdgpu_device *adev, int inst_idx, uint8_t indirect) argument
460 jpeg_v4_0_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
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H A Dvcn_v5_0_0.c350 static void vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
617 vcn_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
866 vcn_v5_0_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
977 vcn_v5_0_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
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H A Dvcn_v4_0_5.c389 static void vcn_v4_0_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
716 vcn_v4_0_5_disable_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument
831 vcn_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
1137 vcn_v4_0_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
1249 vcn_v4_0_5_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
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H A Djpeg_v4_0_3.c413 static void jpeg_v4_0_3_disable_clock_gating(struct amdgpu_device *adev, int inst_idx) argument
438 static void jpeg_v4_0_3_enable_clock_gating(struct amdgpu_device *adev, int inst_idx) argument
H A Dvcn_v4_0_3.c330 static void vcn_v4_0_3_mc_resume(struct amdgpu_device *adev, int inst_idx) argument
405 vcn_v4_0_3_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
518 vcn_v4_0_3_disable_clock_gating(struct amdgpu_device *adev, int inst_idx) argument
613 vcn_v4_0_3_disable_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument
662 vcn_v4_0_3_enable_clock_gating(struct amdgpu_device *adev, int inst_idx) argument
714 vcn_v4_0_3_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
1219 vcn_v4_0_3_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
1338 vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
1749 vcn_v4_0_3_enable_ras(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
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H A Damdgpu_vcn.c1272 int amdgpu_vcn_psp_update_sram(struct amdgpu_device *adev, int inst_idx, argument
H A Dvcn_v3_0.c501 static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
829 vcn_v3_0_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument
945 vcn_v3_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
1495 vcn_v3_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
1601 vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
[all...]
H A Dvcn_v1_0.c1211 vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
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H A Dvcn_v4_0.c103 static int vcn_v4_0_fw_shared_init(struct amdgpu_device *adev, int inst_idx) argument
442 static void vcn_v4_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
781 vcn_v4_0_disable_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument
887 vcn_v4_0_enable_ras(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
918 vcn_v4_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
1473 vcn_v4_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
1587 vcn_v4_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
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H A Dvcn_v2_0.c1201 vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
H A Dvcn_v2_5.c472 static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
685 vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel, int inst_idx, uint8_t indirect) argument
795 vcn_v2_6_enable_ras(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
822 vcn_v2_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) argument
1355 vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) argument
1451 vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev, int inst_idx, struct dpg_pause_state *new_state) argument
[all...]
H A Daqua_vanjaram.c70 aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev, uint32_t inst_idx, struct amdgpu_ring *ring) argument

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