Searched defs:clock_sys (Results 1 - 25 of 29) sorted by relevance

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/seL4-refos-master/libs/libplatsupport/src/plat/bcm2837/
H A Dclock.c24 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/bcm2837/
H A Dclock.c24 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/libs/libplatsupport/src/plat/imx31/
H A Dclock.c23 imx31_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
29 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/libs/libplatsupport/src/plat/omap3/
H A Dclock.c25 omap3_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
31 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/libs/libplatsupport/src/plat/tk1/
H A Dclock.c575 tk1_car_gate_enable(clock_sys_t* clock_sys, argument
610 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
H A Dspi.c133 tegra_spi_init(enum spi_id id, volatile void* base, spi_chipselect_fn cs_func, mux_sys_t* mux_sys, clock_sys_t* clock_sys, spi_bus_t** ret_spi_bus) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/imx31/
H A Dclock.c23 imx31_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
29 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/omap3/
H A Dclock.c25 omap3_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
31 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/tk1/
H A Dclock.c575 tk1_car_gate_enable(clock_sys_t* clock_sys, argument
610 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
H A Dspi.c133 tegra_spi_init(enum spi_id id, volatile void* base, spi_chipselect_fn cs_func, mux_sys_t* mux_sys, clock_sys_t* clock_sys, spi_bus_t** ret_spi_bus) argument
/seL4-refos-master/libs/libplatsupport/src/arch/arm/
H A Dclock.c85 int clock_sys_init_default(clock_sys_t *clock_sys) argument
/seL4-refos-master/libs/libplatsupport/arch_include/arm/platsupport/
H A Dclock.h37 struct clock_sys { struct
75 static inline int clock_sys_valid(const clock_sys_t *clock_sys) argument
119 clk_get_clock(clock_sys_t *clock_sys, enum clk_id id) argument
142 clk_gate_enable(clock_sys_t *clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
[all...]
/seL4-refos-master/projects/util_libs/libplatsupport/src/arch/arm/
H A Dclock.c85 int clock_sys_init_default(clock_sys_t *clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/arch_include/arm/platsupport/
H A Dclock.h37 struct clock_sys { struct
75 static inline int clock_sys_valid(const clock_sys_t *clock_sys) argument
119 clk_get_clock(clock_sys_t *clock_sys, enum clk_id id) argument
142 clk_gate_enable(clock_sys_t *clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
[all...]
/seL4-refos-master/libs/libplatsupport/src/mach/exynos/
H A Dclock.h94 clk_sys_get_clk_regs(clock_sys_t* clock_sys) argument
H A Dspi.c253 spi_init_common(spi_bus_t* spi_bus, mux_sys_t* mux_sys, clock_sys_t* clock_sys) argument
401 exynos_spi_init(enum spi_id id, void* base, mux_sys_t* mux_sys, clock_sys_t* clock_sys, spi_bus_t** ret_spi_bus) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/mach/exynos/
H A Dclock.h94 clk_sys_get_clk_regs(clock_sys_t* clock_sys) argument
H A Dspi.c253 spi_init_common(spi_bus_t* spi_bus, mux_sys_t* mux_sys, clock_sys_t* clock_sys) argument
401 exynos_spi_init(enum spi_id id, void* base, mux_sys_t* mux_sys, clock_sys_t* clock_sys, spi_bus_t** ret_spi_bus) argument
/seL4-refos-master/libs/libplatsupport/src/plat/exynos5/
H A Dclock.c290 exynos5_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
296 clock_sys_common_init(clock_sys_t* clock_sys) argument
343 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
305 exynos5_clock_sys_init(void* cpu, void* core, void* acp, void* isp, void* top, void* lex, void* r0x, void* r1x, void* cdrex, void* mem, clock_sys_t* clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/exynos5/
H A Dclock.c290 exynos5_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
296 clock_sys_common_init(clock_sys_t* clock_sys) argument
343 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
305 exynos5_clock_sys_init(void* cpu, void* core, void* acp, void* isp, void* top, void* lex, void* r0x, void* r1x, void* cdrex, void* mem, clock_sys_t* clock_sys) argument
/seL4-refos-master/libs/libplatsupport/include/platsupport/
H A Dio.h502 clock_sys_t clock_sys; member in struct:ps_io_ops
/seL4-refos-master/projects/util_libs/libplatsupport/include/platsupport/
H A Dio.h502 clock_sys_t clock_sys; member in struct:ps_io_ops
/seL4-refos-master/libs/libplatsupport/src/plat/exynos4/
H A Dclock.c322 clock_sys_common_init(clock_sys_t* clock_sys) argument
331 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/exynos4/
H A Dclock.c322 clock_sys_common_init(clock_sys_t* clock_sys) argument
331 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument
/seL4-refos-master/libs/libplatsupport/src/plat/zynq7000/
H A Dclock.c963 zynq7000_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) argument
980 clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) argument

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