1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12#include "../../arch/arm/clock.h" 13#include "../../services.h" 14#include <assert.h> 15#include <string.h> 16#include <utils/util.h> 17 18static volatile struct clock_regs { 19 int dummy; 20} clk_regs; 21 22static struct clock master_clk = { CLK_OPS_DEFAULT(MASTER) }; 23 24static int 25omap3_gate_enable(clock_sys_t* clock_sys, enum clock_gate gate, enum clock_gate_mode mode) 26{ 27 return -1; 28} 29 30int 31clock_sys_init(ps_io_ops_t* o, clock_sys_t* clock_sys) 32{ 33 clock_sys->priv = (void*)&clk_regs; 34 clock_sys->get_clock = &ps_get_clock; 35 clock_sys->gate_enable = &omap3_gate_enable; 36 return 0; 37} 38 39void 40clk_print_clock_tree(clock_sys_t* sys) 41{ 42 clk_t *clk = clk_get_clock(sys, CLK_MASTER); 43 clk_print_tree(clk, ""); 44} 45 46clk_t* ps_clocks[] = { 47 [CLK_MASTER] = &master_clk, 48}; 49 50freq_t ps_freq_default[] = { 51 [CLK_MASTER] = 24 * MHZ, 52}; 53