#
c5c69aac |
|
03-Dec-2018 |
Adam Felizzi <Adam.Felizzi@data61.csiro.au> |
platsupport: Refactored Exynos5422 clk defs The clock controller definitions (offsets, values etc) for Exynos5422 differs from the other supported exynos5 platforms. The differing definitions have been moved out into seperate headers, conditionally included based on the exynos soc being built for.
|
#
ce2b7457 |
|
25-Nov-2018 |
Adam Felizzi <Adam.Felizzi@data61.csiro.au> |
platsupport: Updated clock settings on exynos5422 The clock controller on the exynos5422 has a different configuration compared to previous exynos54XX platforms the library currently supports. In particilar the PLL CMUs have been updated according to the exynos5422 specification. This allows enables the user to properly set and get PLL frequency values.
|
#
398af6af |
|
13-Jul-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix whitespace - remove trailing whitespace - remove duplicate blank lines - remove blank lines at end of file
|
#
a7130f9f |
|
04-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
fix licenses
|
#
03ede780 |
|
23-Aug-2016 |
Kent McLeod <kent.mcleod@nicta.com.au> |
Remove trailing whitespace
|