| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/ |
| H A D | MBlazeISelLowering.cpp | 722 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 462 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 402 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 440 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 936 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
| H A D | SPUISelLowering.cpp | 1311 std::vector<std::pair<unsigned, SDValue> > RegsToPass; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2932 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local
2690 WriteByValArg(SDValue Chain, DebugLoc dl, SmallVector<std::pair<unsigned, SDValue>, 16> &RegsToPass, SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const CCValAssign &VA, const ISD::ArgFlagsTy &Flags, MVT PtrType, bool isLittle) argument
2781 PassByValArg64(SDValue Chain, DebugLoc dl, SmallVector<std::pair<unsigned, SDValue>, 16> &RegsToPass, SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const CCValAssign &VA, const ISD::ArgFlagsTy &Flags, EVT PtrTy, bool isLittle) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3107 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
2659 PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain, DebugLoc dl, int SPDiff, bool isTailCall, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SmallVector<SDValue, 8> &Ops, std::vector<EVT> &NodeTys, const PPCSubtarget &PPCSubTarget) argument
2866 FinishCall(CallingConv::ID CallConv, DebugLoc dl, bool isTailCall, bool isVarArg, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals) const argument
3308 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1349 RegsToPassVector RegsToPass; local
1265 PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector<SDValue, 8> &MemOpChains, ISD::ArgFlagsTy Flags) const argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2265 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
[all...] |