| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ |
| H A D | TargetInstrInfo.cpp | 34 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, argument
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| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/MCParser/ |
| H A D | MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
| H A D | MSP430AsmPrinter.cpp | 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, argument
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| /macosx-10.9.5/llvmCore-3425.0.33/utils/PerfectShuffle/ |
| H A D | PerfectShuffle.cpp | 106 unsigned short OpNum; member in struct:Operator
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 323 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
419 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 149 int getOperandConstraint(unsigned OpNum, argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 572 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, argument
605 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, argument
656 setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 263 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, argument
279 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, argument
297 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, argument
375 printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
463 printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
481 printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
489 printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
497 printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
506 printLdStmModeOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
513 printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
535 printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
548 printAddrMode7Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
554 printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
564 printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
575 printMemBOption(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
581 printShiftImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
592 printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
601 printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
611 printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
621 printSetendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
630 printCPSIMod(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
636 printCPSIFlag(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
648 printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
728 printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
738 printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
745 printSBitModifierOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
754 printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
759 printPImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
764 printCImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
769 printCoprocOptionImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
774 printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
779 printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
798 printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
803 printThumbSRImm(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
809 printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
887 printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
901 printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) argument
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 338 unsigned OpNum = 3; // First 'rest' of operands. local
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| H A D | ARMAsmPrinter.cpp | 331 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
418 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
558 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) argument
969 int OpNum = 1; local
1020 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1; local
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 4002 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, const TargetRegisterInfo *TRI) const argument
4065 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, const TargetRegisterInfo *TRI) const argument
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| H A D | ARMISelLowering.cpp | 4515 unsigned OpNum = (PFEntry >> 26) & 0x0F; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 67 getVEXRegisterEncoding(const MCInst &MI, unsigned OpNum) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 922 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, argument
946 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 2016 unsigned OpNum = 0; local
2047 unsigned OpNum local
2063 unsigned OpNum = 0; local
2085 unsigned OpNum = 0; local
2106 unsigned OpNum = 0; local
2131 unsigned OpNum = 0; local
2146 unsigned OpNum = 0; local
2171 unsigned OpNum = 0; local
2182 unsigned OpNum = 0; local
2195 unsigned OpNum = 0; local
2215 unsigned OpNum = 0; local
2239 unsigned OpNum = 0; local
2384 unsigned OpNum = 4; local
2509 unsigned OpNum = 0; local
2521 unsigned OpNum = 0; local
2542 unsigned OpNum = 0; local
2556 unsigned OpNum = 0; local
2579 unsigned OpNum = 0; local
2599 unsigned OpNum = 0; local
2639 unsigned OpNum = 2; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 3769 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, argument
3792 breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, argument
4018 unsigned OpNum = Ops[0]; local
[all...] |
| H A D | X86ISelLowering.cpp | 4670 isShuffleMaskConsecutive(ShuffleVectorSDNode *SVOp, unsigned MaskI, unsigned MaskE, unsigned OpIdx, unsigned NumElems, unsigned &OpNum) argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4347 unsigned OpNum = (PFEntry >> 26) & 0x0F; local
|