| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | Thumb1RegisterInfo.cpp | 505 unsigned NewOpc = convertToNonSPOpcode(Opcode); variable
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| H A D | ARMExpandPseudoInsts.cpp | 944 unsigned NewOpc = ARM::VLDMDIA; local
975 unsigned NewOpc = ARM::VSTMDIA; local
1006 unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q : local
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| H A D | ARMConstantIslandPass.cpp | 1700 unsigned NewOpc = 0; local
1754 unsigned NewOpc = 0; local
[all...] |
| H A D | ARMISelDAGToDAG.cpp | 3012 unsigned NewOpc = ARM::LDREXD; local
3098 unsigned NewOpc = ARM::STREXD; local
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| H A D | ARMLoadStoreOptimizer.cpp | 776 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); local
875 unsigned NewOpc = 0; local
1072 InsertLDR_STR(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) argument
1135 unsigned NewOpc = (isLd) local
1158 unsigned NewOpc = (isLd) local
1406 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); local
1560 CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, unsigned &EvenReg, unsigned &OddReg, unsigned &BaseReg, int &Offset, unsigned &PredReg, ARMCC::CondCodes &Pred, bool &isT2) argument
1728 unsigned NewOpc = 0; local
[all...] |
| H A D | ARMISelLowering.cpp | 2380 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) local
4937 unsigned NewOpc = 0; local
6652 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? local
6676 unsigned NewOpc; local
6999 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); local
8235 unsigned NewOpc = 0; local
8354 unsigned NewOpc = 0; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
| H A D | MipsLongBranch.cpp | 220 unsigned NewOpc = TII->GetOppositeBranchOpc(Br->getOpcode()); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 223 static void LowerSubReg32_Op0(MCInst &OutMI, unsigned NewOpc) { argument
228 static void LowerUnaryToTwoAddr(MCInst &OutMI, unsigned NewOpc) { argument
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| H A D | X86InstrInfo.cpp | 3355 unsigned NewOpc; local
3831 unsigned NewOpc = 0; local
3892 unsigned NewOpc = 0; local
4146 unsigned NewOpc; local
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | MachineLICM.cpp | 1255 unsigned NewOpc = local
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| H A D | TwoAddressInstructionPass.cpp | 1106 unsigned NewOpc = local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
| H A D | SPUISelDAGToDAG.cpp | 608 unsigned NewOpc = 0; local
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| H A D | SPUISelLowering.cpp | 743 unsigned NewOpc = ISD::ANY_EXTEND; local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 353 unsigned NewOpc = N->getOpcode(); local
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 6777 unsigned NewOpc; local
7251 unsigned NewOpc; local
7366 unsigned NewOpc; local
7405 unsigned NewOpc; local
[all...] |