Searched defs:Inst (Results 226 - 250 of 260) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DDataFlowSanitizer.cpp942 Instruction *Inst = &i->front(); local
1169 combineOperandShadows(Instruction *Inst) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLocal.cpp1901 Instruction *Inst = &*--EndInst->getIterator(); local
[all...]
H A DSimplifyCFG.cpp1669 Instruction *Inst = BB->getTerminator(); local
2543 tryCSEWithPredecessor(Instruction *Inst, BasicBlock *PB) argument
5837 Instruction &Inst = *I; local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp2792 static void findLiveSetAtInst(Instruction *Inst, GCPtrLivenessData &Data, argument
H A DIndVarSimplify.cpp634 Instruction *Inst = cast<Instruction>(InVal); local
743 Instruction *Inst = cast<Instruction>(PN->getIncomingValue(Phi.Ith)); local
[all...]
H A DLoopStrengthReduce.cpp798 isAddressUse(const TargetTransformInfo &TTI, Instruction *Inst, Value *OperandVal) argument
838 getAccessType(const TargetTransformInfo &TTI, Instruction *Inst, Value *OperandVal) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1853 os << "/ " << *Inst; local
1855 os << '[' << *Inst; local
1863 os << *Inst; local
1867 Instruction *Inst = nullptr; member in struct:llvm::slpvectorizer::ScheduleData
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1127 DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1137 DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1152 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1165 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1180 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1198 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1207 DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1219 DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1234 DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1245 DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1275 DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1300 DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1310 DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1326 DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1341 DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1348 DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1356 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1370 DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1390 DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1411 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1423 DecodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1440 DecodeCCOutOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1449 DecodeSORegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1486 DecodeSORegRegOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1521 DecodeRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1568 DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1592 DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1617 DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1644 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1823 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1928 DecodeSORegMemOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1972 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2163 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2192 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2215 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2307 DecodeHINTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2329 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2376 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2418 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2442 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2469 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2497 DecodeTSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2518 DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2546 DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2566 DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2586 DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2606 DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2612 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2639 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2664 DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2681 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2957 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2970 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2985 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2998 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3008 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3278 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3325 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3373 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3408 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3461 DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3507 DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3535 DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3560 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3579 DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3585 DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3591 DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3597 DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3603 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3639 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3663 DecodeThumbBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3671 DecodeT2BROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3679 DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3687 DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3702 DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3716 DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3726 DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3734 DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3763 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3846 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3930 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4010 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4049 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4102 DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4116 DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4131 DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4146 DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4162 DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) argument
4177 DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4190 DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4204 DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4251 DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4268 DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4286 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4347 DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4373 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4384 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4409 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4420 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4433 DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4448 DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4470 DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4494 DecodeCoprocessor(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4510 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4526 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4568 DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4600 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4608 DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4632 DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4641 DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4650 DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4732 DecodeBankedReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4747 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4768 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4794 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4819 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4846 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4871 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4896 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4963 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5028 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5095 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5158 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5228 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5291 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5372 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5444 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5470 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5496 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5526 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5563 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5597 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
5623 DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument
5634 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5661 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5720 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5779 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5812 DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5839 DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5884 DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5936 DecodeBFLabelOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5955 DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5967 DecodePredNoALOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5976 DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6038 DecodeLongShiftOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6051 DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6061 DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6071 DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6097 DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6113 DecodeQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6129 DecodeQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6140 DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6171 DecodeVpredROperand(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6183 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6191 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6214 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6222 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6253 DecodeVCVTImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6296 DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6339 DecodeMVE_MEM_pre( MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder, unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder) argument
6359 DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6368 DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6377 DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6386 DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6399 DecodeExpandedImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6409 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6419 DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6442 DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6467 DecodeMVEOverlappingLongShift( MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6546 DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6566 DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6603 DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6613 DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6621 DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1757 static bool isBrevLdIntrinsic(const Value *Inst) { argument
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGObjC.cpp2119 llvm::CallBase *Inst = CGF.EmitCallOrInvoke(fn, value); local
H A DCodeGenFunction.h1080 llvm::Instruction *Inst; member in class:clang::CodeGen::CodeGenFunction::PeepholeProtection
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp3658 auto Inst = MIRBuilder.buildInstr(MI.getOpcode(), {NarrowTy}, local
3664 auto Inst = MIRBuilder.buildInstr( local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp4060 const Operator *Inst = dyn_cast<Operator>(V); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp916 unsigned minFuncUnits(const MachineInstr *Inst, unsigned &F) const { argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp4321 Instruction *Inst = &*--I; local
H A DInstructionCombining.cpp1434 Instruction *InstCombiner::foldVectorBinop(BinaryOperator &Inst) { argument
3448 Instruction *Inst = &*BBI++; local
3464 LLVM_DEBUG(dbgs() << "IC: ConstFold to: " << *C << " from: " << *Inst local
[all...]
H A DInstCombineCompares.cpp603 auto *Inst = dyn_cast<Instruction>(Val); local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp99 unsigned MatchInstruction(const OperandVector &Operands, MCInst &Inst, argument
2932 bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) { argument
2998 validateInstruction(MCInst &Inst, const OperandVector &Ops) argument
3099 EmitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out) argument
3132 MCInst Inst; local
3165 checkTargetMatchPredicate(MCInst &Inst) argument
3214 MCInst Inst; local
3421 MCInst Inst; local
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.cpp2457 const DAGInstruction &Inst = CDP.getInstruction(getOperator()); local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp7236 bool X86InstrInfo::hasReassociableOperands(const MachineInstr &Inst, argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2763 emitLeadingFence(IRBuilder< &Builder, Instruction *Inst, AtomicOrdering Ord) const argument
2773 emitTrailingFence(IRBuilder< &Builder, Instruction *Inst, AtomicOrdering Ord) const argument
/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/
H A DSemaTemplateInstantiateDecl.cpp312 ExprResult Inst = Subst(E); local
321 ExprResult Inst = Subst(E); local
334 ExprResult Inst local
711 LabelDecl *Inst = LabelDecl::Create(SemaRef.Context, Owner, D->getLocation(), local
724 NamespaceAliasDecl *Inst local
1471 ClassTemplateDecl *Inst local
1579 VarTemplateDecl *Inst = VarTemplateDecl::Create( local
2553 TemplateTypeParmDecl *Inst = TemplateTypeParmDecl::Create( local
2903 UsingDirectiveDecl *Inst local
3407 Decl *Inst = VisitFunctionDecl(D, nullptr); local
5713 Decl *Inst = SubstDecl(D, CurContext, TemplateArgs); local
5722 Decl *Inst = SubstDecl(D, CurContext, TemplateArgs); local
5932 PendingImplicitInstantiation Inst; local
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1780 virtual Instruction *emitLeadingFence(IRBuilder<> &Builder, Instruction *Inst, argument
1788 emitTrailingFence(IRBuilder< &Builder, Instruction *Inst, AtomicOrdering Ord) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp745 void addKImmFP16Operands(MCInst &Inst, unsigned N) const { argument
749 void addKImmFP32Operands(MCInst &Inst, unsigned N) const { argument
755 void addBoolRegOperands(MCInst &Inst, unsigned N) const { argument
759 addRegOrImmOperands(MCInst &Inst, unsigned N) const argument
768 addRegOrImmWithInputModsOperands(MCInst &Inst, unsigned N) const argument
778 addRegOrImmWithFPInputModsOperands(MCInst &Inst, unsigned N) const argument
783 addRegOrImmWithIntInputModsOperands(MCInst &Inst, unsigned N) const argument
788 addRegWithInputModsOperands(MCInst &Inst, unsigned N) const argument
795 addRegWithFPInputModsOperands(MCInst &Inst, unsigned N) const argument
800 addRegWithIntInputModsOperands(MCInst &Inst, unsigned N) const argument
805 addSoppBrTargetOperands(MCInst &Inst, unsigned N) const argument
1282 cvtDS(MCInst &Inst, const OperandVector &Operands) argument
1283 cvtDSGds(MCInst &Inst, const OperandVector &Operands) argument
1382 cvtMubuf(MCInst &Inst, const OperandVector &Operands) argument
1383 cvtMubufAtomic(MCInst &Inst, const OperandVector &Operands) argument
1384 cvtMubufAtomicReturn(MCInst &Inst, const OperandVector &Operands) argument
1385 cvtMubufLds(MCInst &Inst, const OperandVector &Operands) argument
1419 cvtDPP8(MCInst &Inst, const OperandVector &Operands) argument
1688 addImmOperands(MCInst &Inst, unsigned N, bool ApplyModifiers) const argument
1700 addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const argument
1848 addKImmFPOperands(MCInst &Inst, unsigned N) const argument
1864 addRegOperands(MCInst &Inst, unsigned N) const argument
2659 checkTargetMatchPredicate(MCInst &Inst) argument
2741 isInlineConstant(const MCInst &Inst, unsigned OpIdx) const argument
2798 usesConstantBus(const MCInst &Inst, unsigned OpIdx) argument
2811 validateConstantBusLimitations(const MCInst &Inst) argument
2890 validateEarlyClobberLimitations(const MCInst &Inst) argument
2927 validateIntClampSupported(const MCInst &Inst) argument
2941 validateMIMGDataSize(const MCInst &Inst) argument
2974 validateMIMGAddrSize(const MCInst &Inst) argument
3014 validateMIMGAtomicDMask(const MCInst &Inst) argument
3034 validateMIMGGatherDMask(const MCInst &Inst) argument
3068 validateMovrels(const MCInst &Inst) argument
3088 validateMIMGD16(const MCInst &Inst) argument
3105 validateMIMGDim(const MCInst &Inst) argument
3252 validateLdsDirect(const MCInst &Inst) argument
3298 validateFlatOffset(const MCInst &Inst, const OperandVector &Operands) argument
3374 validateOpSel(const MCInst &Inst) argument
3440 validateInstruction(const MCInst &Inst, const SMLoc &IDLoc, const OperandVector &Operands) argument
3528 MCInst Inst; local
4679 addOptionalImmOperand( MCInst& Inst, const OperandVector& Operands, AMDGPUAsmParser::OptionalImmIndexMap& OptionalIdx, AMDGPUOperand::ImmTy ImmT, int64_t Default = 0) argument
4768 cvtDSOffset01(MCInst &Inst, const OperandVector &Operands) argument
4792 cvtDSImpl(MCInst &Inst, const OperandVector &Operands, bool IsGdsHardcoded) argument
4828 cvtExp(MCInst &Inst, const OperandVector &Operands) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp86 static PrefixInfo CreateFromInst(const MCInst &Inst, uint64_t TSFlags) { argument
1415 void addExpr(MCInst &Inst, const MCExpr *Expr) const { argument
1425 addRegOperands(MCInst &Inst, unsigned N) const argument
1430 addGPR32as64Operands(MCInst &Inst, unsigned N) const argument
1442 addGPR64as32Operands(MCInst &Inst, unsigned N) const argument
1455 addFPRasZPRRegOperands(MCInst &Inst, unsigned N) const argument
1469 addVectorReg64Operands(MCInst &Inst, unsigned N) const argument
1476 addVectorReg128Operands(MCInst &Inst, unsigned N) const argument
1483 addVectorRegLoOperands(MCInst &Inst, unsigned N) const argument
1495 addVectorListOperands(MCInst &Inst, unsigned N) const argument
1517 addVectorIndexOperands(MCInst &Inst, unsigned N) const argument
1523 addExactFPImmOperands(MCInst &Inst, unsigned N) const argument
1529 addImmOperands(MCInst &Inst, unsigned N) const argument
1538 addImmWithOptionalShiftOperands(MCInst &Inst, unsigned N) const argument
1553 addImmNegWithOptionalShiftOperands(MCInst &Inst, unsigned N) const argument
1562 addCondCodeOperands(MCInst &Inst, unsigned N) const argument
1567 addAdrpLabelOperands(MCInst &Inst, unsigned N) const argument
1576 addAdrLabelOperands(MCInst &Inst, unsigned N) const argument
1581 addUImm12OffsetOperands(MCInst &Inst, unsigned N) const argument
1592 addUImm6Operands(MCInst &Inst, unsigned N) const argument
1599 addImmScaledOperands(MCInst &Inst, unsigned N) const argument
1606 addLogicalImmOperands(MCInst &Inst, unsigned N) const argument
1615 addLogicalImmNotOperands(MCInst &Inst, unsigned N) const argument
1623 addSIMDImmType10Operands(MCInst &Inst, unsigned N) const argument
1630 addBranchTarget26Operands(MCInst &Inst, unsigned N) const argument
1644 addPCRelLabel19Operands(MCInst &Inst, unsigned N) const argument
1658 addBranchTarget14Operands(MCInst &Inst, unsigned N) const argument
1672 addFPImmOperands(MCInst &Inst, unsigned N) const argument
1678 addBarrierOperands(MCInst &Inst, unsigned N) const argument
1683 addMRSSystemRegisterOperands(MCInst &Inst, unsigned N) const argument
1689 addMSRSystemRegisterOperands(MCInst &Inst, unsigned N) const argument
1695 addSystemPStateFieldWithImm0_1Operands(MCInst &Inst, unsigned N) const argument
1701 addSystemPStateFieldWithImm0_15Operands(MCInst &Inst, unsigned N) const argument
1707 addSysCROperands(MCInst &Inst, unsigned N) const argument
1712 addPrefetchOperands(MCInst &Inst, unsigned N) const argument
1717 addPSBHintOperands(MCInst &Inst, unsigned N) const argument
1722 addBTIHintOperands(MCInst &Inst, unsigned N) const argument
1727 addShifterOperands(MCInst &Inst, unsigned N) const argument
1734 addExtendOperands(MCInst &Inst, unsigned N) const argument
1742 addExtend64Operands(MCInst &Inst, unsigned N) const argument
1750 addMemExtendOperands(MCInst &Inst, unsigned N) const argument
1762 addMemExtend8Operands(MCInst &Inst, unsigned N) const argument
1771 addMOVZMovAliasOperands(MCInst &Inst, unsigned N) const argument
1780 addMOVNMovAliasOperands(MCInst &Inst, unsigned N) const argument
1788 addComplexRotationEvenOperands(MCInst &Inst, unsigned N) const argument
1794 addComplexRotationOddOperands(MCInst &Inst, unsigned N) const argument
3894 validateInstruction(MCInst &Inst, SMLoc &IDLoc, SmallVectorImpl<SMLoc> &Loc) argument
4783 MCInst Inst; local
5313 MCInst Inst; local
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