Searched hist:276333 (Results 1 - 6 of 6) sorted by relevance
| /freebsd-11-stable/sys/arm/include/ | ||
| H A D | cpuinfo.h | 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
| H A D | cpu-v6.h | 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
| H A D | cpu-v4.h | 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
| /freebsd-11-stable/sys/arm/arm/ | ||
| H A D | cpuinfo.c | 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
| H A D | machdep.c | diff 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
| /freebsd-11-stable/sys/conf/ | ||
| H A D | files.arm | diff 276333 Sun Dec 28 16:15:06 MST 2014 ian Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences. Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz |
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