/u-boot/drivers/pci/ |
H A D | pci_msc01.c | 30 int where, u32 *data) 43 __raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE), 63 uint where, ulong *val, enum pci_size_t size) 68 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &data)) { 73 *val = pci_conv_32_to_size(data, where, size); 79 uint where, ulong val, enum pci_size_t size) 89 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &old)) 92 data = pci_conv_size_to_32(old, val, where, size); 95 msc01_config_access(msc01, PCI_ACCESS_WRITE, bdf, where, &data); 28 msc01_config_access(struct msc01_pci_controller *msc01, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument 62 msc01_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument 78 msc01_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument
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H A D | pci_gt64120.c | 47 int where, u32 *data) 63 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); 68 addr = PCI_CONF1_ADDRESS(bus, dev, func, where); 109 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); 115 uint where, ulong *val, 121 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &data)) { 126 *val = pci_conv_32_to_size(data, where, size); 132 uint where, ulong val, 143 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &old)) 146 data = pci_conv_size_to_32(old, val, where, siz 45 gt_config_access(struct gt64120_pci_controller *gt, unsigned char access_type, pci_dev_t bdf, int where, u32 *data) argument 114 gt64120_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument 131 gt64120_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument [all...] |
H A D | pci-rcar-gen3.c | 131 static void rcar_rmw32(struct udevice *dev, int where, u32 mask, u32 data) argument 134 int shift = 8 * (where & 3); 136 clrsetbits_le32(priv->regs + (where & ~3), 140 static u32 rcar_read_conf(const struct udevice *dev, int where) argument 143 int shift = 8 * (where & 3); 145 return readl(priv->regs + (where & ~3)) >> shift; 150 pci_dev_t bdf, int where, ulong *data) 153 u32 reg = where & ~3; 158 *data = readl(priv->regs + PCICONF(where / 4)); 160 writel(*data, priv->regs + PCICONF(where / 148 rcar_pcie_config_access(const struct udevice *udev, unsigned char access_type, pci_dev_t bdf, int where, ulong *data) argument 197 rcar_gen3_pcie_addr_valid(pci_dev_t d, uint where) argument 214 rcar_gen3_pcie_read_config(const struct udevice *dev, pci_dev_t bdf, uint where, ulong *val, enum pci_size_t size) argument 237 rcar_gen3_pcie_write_config(struct udevice *dev, pci_dev_t bdf, uint where, ulong val, enum pci_size_t size) argument [all...] |
H A D | pcie_plda_common.c | 39 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf) - dev_seq(udev), local 45 *paddr = (void *)(priv->cfg_base + where);
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H A D | pcie_mediatek.c | 101 #define CFG_HEADER_DW1(where, size) \ 102 (GENMASK(((size) - 1), 0) << ((where) & 0x3)) 195 int where, int size, ulong *val) 201 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1); 202 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus), 218 *val = (*val >> (8 * (where & 3))) & 0xff; 220 *val = (*val >> (8 * (where & 3))) & 0xffff; 226 int where, int size, u32 val) 231 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1); 232 writel(CFG_HEADER_DW2(where, PCI_FUN 194 mtk_pcie_hw_rd_cfg(struct mtk_pcie_port *port, u32 bus, pci_dev_t devfn, int where, int size, ulong *val) argument 225 mtk_pcie_hw_wr_cfg(struct mtk_pcie_port *port, u32 bus, pci_dev_t devfn, int where, int size, u32 val) argument [all...] |
H A D | pcie_rockchip.c | 103 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); local 107 value = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where); 113 value = readl(priv->axi_base + where); 130 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); local 134 old = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where); 136 writel(value, priv->apb_base + PCIE_RC_NORMAL_BASE + where); 141 old = readl(priv->axi_base + where); 143 writel(value, priv->axi_base + where);
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H A D | pcie_iproc.c | 89 * window where the MSI posted writes are written, for the writes to be 96 * To hold the address of the register where the MSI writes are 439 uint where, void **paddress) 455 where & CFG_IND_ADDR_MASK); 468 val = (PCIE_ECAM_OFFSET(busno, slot, fn, where) & CFG_ADDR_CFG_ECAM_MASK) 482 static void iproc_pcie_fix_cap(struct iproc_pcie *pcie, int where, ulong *val) argument 486 switch (where & ~0x3) { 526 unsigned int devfn, int where, 532 ret = iproc_pcie_map_ep_cfg_reg(pcie->dev, devfn, where & ~0x3, &addr); 541 *val = (*val >> (8 * (where 438 iproc_pcie_map_ep_cfg_reg(const struct udevice *udev, pci_dev_t bdf, uint where, void **paddress) argument 525 iproc_pci_raw_config_read32(struct iproc_pcie *pcie, unsigned int devfn, int where, int size, u32 *val) argument 546 iproc_pci_raw_config_write32(struct iproc_pcie *pcie, unsigned int devfn, int where, int size, u32 val) argument [all...] |
H A D | pcie_imx.c | 339 pci_dev_t d, int where) 358 va_address += (where & ~0x3); 404 int where, u32 *val) 415 va_address = get_bus_address(priv, d, where); 433 int where, u32 val) 442 va_address = get_bus_address(priv, d, where); 479 * handling to get the core back into a state where it is safe to 338 get_bus_address(struct imx_pcie_priv *priv, pci_dev_t d, int where) argument 403 imx_pcie_read_cfg(struct imx_pcie_priv *priv, pci_dev_t d, int where, u32 *val) argument 432 imx_pcie_write_cfg(struct imx_pcie_priv *priv, pci_dev_t d, int where, u32 val) argument
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H A D | pcie_dw_common.c | 109 * @where: Offset in the configuration space 119 pci_dev_t d, uint where) 159 va_address += where & ~0x3; 118 set_cfg_address(struct pcie_dw *pcie, pci_dev_t d, uint where) argument
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H A D | pcie_dw_mvebu.c | 168 * @where: Offset in the configuration space 178 pci_dev_t d, uint where) 207 va_address += where & ~0x3; 177 set_cfg_address(struct pcie_dw_mvebu *pcie, pci_dev_t d, uint where) argument
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H A D | pci_tegra.c | 280 int where, unsigned long *address) 290 *address = port->regs.start + (where & ~3); 304 PCI_FUNC(bdf), where) & ~PCI_CONF1_ENABLE); 279 tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf, int where, unsigned long *address) argument
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/u-boot/arch/x86/cpu/baytrail/ |
H A D | early_uart.c | 52 static void x86_pci_write_config32(int dev, unsigned int where, u32 value) argument 56 addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3);
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/u-boot/arch/x86/cpu/braswell/ |
H A D | early_uart.c | 47 static void x86_pci_write_config32(int dev, unsigned int where, u32 value) argument 51 addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3);
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/u-boot/scripts/ |
H A D | cleanpatch | 250 if ( !defined($where = tell(FILE)) || 251 !truncate(FILE, $where) ) {
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H A D | checkpatch.pl | 119 --debug KEY=[0|1] turn on/off debugging of KEY, where KEY is one of 2624 "Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible\n" . $herecurr); 3449 # declined it, i.e defined some charset where it is missing. 3892 "code indent should use tabs where possible\n" . $herevet) && 4095 # foo bar; where foo is some local typedef or #define 4109 # foo bar; where foo is some local typedef or #define 4372 # where necessary. 4703 # check for const <foo> const where <foo> is not a pointer or array type 5025 my ($where, $prefix) = ($-[1], $1); 5027 ($where ! [all...] |
/u-boot/arch/mips/include/asm/ |
H A D | system.h | 256 extern void __die(const char *, struct pt_regs *, const char *where, 258 extern void __die_if_kernel(const char *, struct pt_regs *, const char *where,
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/u-boot/include/ |
H A D | pci.h | 515 #define PCIE_ECAM_OFFSET(bus, dev, func, where) \ 519 PCIE_ECAM_REG(where)) 696 pci_dev_t dev, int where, u8 *val); 698 pci_dev_t dev, int where, u16 *val); 700 pci_dev_t dev, int where, u32 *val); 702 pci_dev_t dev, int where, u8 val); 704 pci_dev_t dev, int where, u16 val); 706 pci_dev_t dev, int where, u32 val); 731 pci_dev_t dev, int where, u8 *val); 733 pci_dev_t dev, int where, u1 [all...] |
/u-boot/arch/arm/ |
H A D | config.mk | 112 # FIXME: binutils versions < 2.22 have a bug in the assembler where 151 # there are only two cases where it is generated
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/u-boot/tools/ |
H A D | fdtgrep.c | 72 static void report_error(const char *where, int err) argument 74 fprintf(stderr, "Error at '%s': %s\n", where, fdt_strerror(err)); 557 * case where there is no specific type 568 * case where there is no specific type (inclusive)
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/u-boot/drivers/mmc/ |
H A D | octeontx_hsmmc.c | 352 * Print out all of the register values where mmc is optional 837 u8 where = (u8)(cmd_arg >> 16); local 848 switch (where) { 1842 * many cases where the HS200 tuning does not work for HS400 mode.
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