1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6#include <common.h>
7#include <asm/io.h>
8
9#define PCI_DEV_CONFIG(segbus, dev, fn) ( \
10		(((segbus) & 0xfff) << 20) | \
11		(((dev) & 0x1f) << 15) | \
12		(((fn)  & 0x07) << 12))
13
14/* Platform Controller Unit */
15#define LPC_DEV			0x1f
16#define LPC_FUNC		0
17
18/* Enable UART */
19#define UART_CONT		0x80
20
21/* UART PAD definitions */
22#define UART_RXD_COMMUITY	1
23#define UART_TXD_COMMUITY	1
24#define UART_RXD_FAMILY		4
25#define UART_TXD_FAMILY		4
26#define UART_RXD_PAD		2
27#define UART_TXD_PAD		7
28#define UART_RXD_FUNC		3
29#define UART_TXD_FUNC		3
30
31/* IO Memory */
32#define IO_BASE_ADDRESS		0xfed80000
33
34static inline uint32_t gpio_pconf0(int community, int family, int pad)
35{
36	return IO_BASE_ADDRESS + community * 0x8000 + 0x4400 +
37		family * 0x400 + pad * 8;
38}
39
40static void gpio_select_func(int community, int family, int pad, int func)
41{
42	uint32_t pconf0_addr = gpio_pconf0(community, family, pad);
43
44	clrsetbits_le32(pconf0_addr, 0xf << 16, func << 16);
45}
46
47static void x86_pci_write_config32(int dev, unsigned int where, u32 value)
48{
49	unsigned long addr;
50
51	addr = CONFIG_PCIE_ECAM_BASE | dev | (where & ~3);
52	writel(value, addr);
53}
54
55/* This can be called after memory-mapped PCI is working */
56int setup_internal_uart(int enable)
57{
58	/* Enable or disable the legacy UART hardware */
59	x86_pci_write_config32(PCI_DEV_CONFIG(0, LPC_DEV, LPC_FUNC), UART_CONT,
60			       enable);
61
62	/* All done for the disable part, so just return */
63	if (!enable)
64		return 0;
65
66	/*
67	 * Set up the pads to the UART function. This allows the signals to
68	 * leave the chip
69	 */
70	gpio_select_func(UART_RXD_COMMUITY, UART_RXD_FAMILY,
71			 UART_RXD_PAD, UART_RXD_FUNC);
72	gpio_select_func(UART_TXD_COMMUITY, UART_TXD_FAMILY,
73			 UART_TXD_PAD, UART_TXD_FUNC);
74
75	return 0;
76}
77
78void board_debug_uart_init(void)
79{
80	setup_internal_uart(1);
81}
82