Searched refs:CTRL (Results 1 - 8 of 8) sorted by relevance

/u-boot/include/power/
H A Dtps80031.h45 CTRL, enumerator in enum:__anon5
/u-boot/include/
H A Di8042.h68 #define CTRL 0x0010 /* control*/ macro
/u-boot/drivers/clk/
H A Dclk-xlnx-clock-wizard.c52 #define CTRL CCR(23) macro
82 writel(CTRL_SEN | CTRL_SADDR | CTRL_LOAD, priv->base + CTRL);
83 writel(CTRL_SADDR, priv->base + CTRL);
/u-boot/drivers/power/regulator/
H A Dtps80031_regulator.c149 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][7];
155 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][8];
163 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][idx];
306 uc_pdata->ctrl_reg = tps80031_smps_reg[CTRL][idx];
/u-boot/drivers/net/
H A De1000.c1653 ctrl = E1000_READ_REG(hw, CTRL);
1655 E1000_WRITE_REG(hw, CTRL, (ctrl | E1000_CTRL_RST));
1766 reg_ctrl = E1000_READ_REG(hw, CTRL);
1770 E1000_WRITE_REG(hw, CTRL, reg_ctrl);
2196 ctrl = E1000_READ_REG(hw, CTRL);
2214 * configure the two flow control enable bits in the CTRL register.
2263 E1000_WRITE_REG(hw, CTRL, ctrl);
2274 if ((E1000_READ_REG(hw, CTRL) & E1000_CTRL_SWDPIN1) == signal) {
2321 ctrl = E1000_READ_REG(hw, CTRL);
2329 E1000_WRITE_REG(hw, CTRL, ctr
[all...]
/u-boot/drivers/usb/gadget/
H A Datmel_usba_udc.c485 ctrl = usba_readl(udc, CTRL);
486 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
599 regval = usba_readl(udc, CTRL);
601 usba_writel(udc, CTRL, regval);
880 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1165 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1178 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
/u-boot/test/py/tests/
H A Dtest_efi_selftest.py128 if u_boot_console.p.expect([r'To terminate type \'CTRL\+x\'']):
134 if u_boot_console.p.expect([r'Unicode char 100 \(\'d\'\), scan code 0 \(CTRL\+Null\)']):
/u-boot/scripts/kconfig/
H A Dqconf.cc1384 quitAction->setShortcut(Qt::CTRL + Qt::Key_Q);
1387 loadAction->setShortcut(Qt::CTRL + Qt::Key_L);
1390 saveAction->setShortcut(Qt::CTRL + Qt::Key_S);
1398 searchAction->setShortcut(Qt::CTRL + Qt::Key_F);

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