1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Driver for the Atmel USBA high speed USB device controller
4 * [Original from Linux kernel: drivers/usb/gadget/atmel_usba_udc.c]
5 *
6 * Copyright (C) 2005-2013 Atmel Corporation
7 *			   Bo Shen <voice.shen@atmel.com>
8 */
9
10#include <common.h>
11#include <linux/bitops.h>
12#include <linux/errno.h>
13#include <asm/gpio.h>
14#include <asm/hardware.h>
15#include <linux/list.h>
16#include <linux/printk.h>
17#include <linux/usb/ch9.h>
18#include <linux/usb/gadget.h>
19#include <linux/usb/atmel_usba_udc.h>
20#include <malloc.h>
21
22#include "atmel_usba_udc.h"
23
24static int vbus_is_present(struct usba_udc *udc)
25{
26	/* No Vbus detection: Assume always present */
27	return 1;
28}
29
30static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
31{
32	unsigned int transaction_len;
33
34	transaction_len = req->req.length - req->req.actual;
35	req->last_transaction = 1;
36	if (transaction_len > ep->ep.maxpacket) {
37		transaction_len = ep->ep.maxpacket;
38		req->last_transaction = 0;
39	} else if (transaction_len == ep->ep.maxpacket && req->req.zero) {
40			req->last_transaction = 0;
41	}
42
43	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
44	    ep->ep.name, req, transaction_len,
45	    req->last_transaction ? ", done" : "");
46
47	memcpy(ep->fifo, req->req.buf + req->req.actual, transaction_len);
48	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
49	req->req.actual += transaction_len;
50}
51
52static void submit_request(struct usba_ep *ep, struct usba_request *req)
53{
54	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d), dma: %d\n",
55	    ep->ep.name, req, req->req.length, req->using_dma);
56
57	req->req.actual = 0;
58	req->submitted = 1;
59
60	next_fifo_transaction(ep, req);
61	if (ep_is_control(ep))
62		usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
63	usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
64}
65
66static void submit_next_request(struct usba_ep *ep)
67{
68	struct usba_request *req;
69
70	if (list_empty(&ep->queue)) {
71		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
72		return;
73	}
74
75	req = list_entry(ep->queue.next, struct usba_request, queue);
76	if (!req->submitted)
77		submit_request(ep, req);
78}
79
80static void send_status(struct usba_udc *udc, struct usba_ep *ep)
81{
82	ep->state = STATUS_STAGE_IN;
83	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
84	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
85}
86
87static void receive_data(struct usba_ep *ep)
88{
89	struct usba_udc *udc = ep->udc;
90	struct usba_request *req;
91	unsigned long status;
92	unsigned int bytecount, nr_busy;
93	int is_complete = 0;
94
95	status = usba_ep_readl(ep, STA);
96	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
97
98	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
99
100	while (nr_busy > 0) {
101		if (list_empty(&ep->queue)) {
102			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
103			break;
104		}
105		req = list_entry(ep->queue.next,
106				 struct usba_request, queue);
107
108		bytecount = USBA_BFEXT(BYTE_COUNT, status);
109
110		if (status & USBA_SHORT_PACKET)
111			is_complete = 1;
112		if (req->req.actual + bytecount >= req->req.length) {
113			is_complete = 1;
114			bytecount = req->req.length - req->req.actual;
115		}
116
117		memcpy(req->req.buf + req->req.actual, ep->fifo, bytecount);
118		req->req.actual += bytecount;
119
120		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
121
122		if (is_complete) {
123			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
124			req->req.status = 0;
125			list_del_init(&req->queue);
126			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
127			spin_lock(&udc->lock);
128			req->req.complete(&ep->ep, &req->req);
129			spin_unlock(&udc->lock);
130		}
131
132		status = usba_ep_readl(ep, STA);
133		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
134
135		if (is_complete && ep_is_control(ep)) {
136			send_status(udc, ep);
137			break;
138		}
139	}
140}
141
142static void
143request_complete(struct usba_ep *ep, struct usba_request *req, int status)
144{
145	if (req->req.status == -EINPROGRESS)
146		req->req.status = status;
147
148	DBG(DBG_GADGET | DBG_REQ, "%s: req %p complete: status %d, actual %u\n",
149	    ep->ep.name, req, req->req.status, req->req.actual);
150
151	req->req.complete(&ep->ep, &req->req);
152}
153
154static void
155request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
156{
157	struct usba_request *req, *tmp_req;
158
159	list_for_each_entry_safe(req, tmp_req, list, queue) {
160		list_del_init(&req->queue);
161		request_complete(ep, req, status);
162	}
163}
164
165static int
166usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
167{
168	struct usba_ep *ep = to_usba_ep(_ep);
169	struct usba_udc *udc = ep->udc;
170	unsigned long flags = 0, ept_cfg, maxpacket;
171	unsigned int nr_trans;
172
173	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
174
175	maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
176
177	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
178	      != ep->index) ||
179	      ep->index == 0 ||
180	      desc->bDescriptorType != USB_DT_ENDPOINT ||
181	      maxpacket == 0 ||
182	      maxpacket > ep->fifo_size) {
183		DBG(DBG_ERR, "ep_enable: Invalid argument");
184		return -EINVAL;
185	}
186
187	ep->is_isoc = 0;
188	ep->is_in = 0;
189
190	if (maxpacket <= 8)
191		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
192	else
193		/* LSB is bit 1, not 0 */
194		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
195
196	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
197	    ep->ep.name, ept_cfg, maxpacket);
198
199	if (usb_endpoint_dir_in(desc)) {
200		ep->is_in = 1;
201		ept_cfg |= USBA_EPT_DIR_IN;
202	}
203
204	switch (usb_endpoint_type(desc)) {
205	case USB_ENDPOINT_XFER_CONTROL:
206		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
207		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
208		break;
209	case USB_ENDPOINT_XFER_ISOC:
210		if (!ep->can_isoc) {
211			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
212			    ep->ep.name);
213			return -EINVAL;
214		}
215
216		/*
217		 * Bits 11:12 specify number of _additional_
218		 * transactions per microframe.
219		 */
220		nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
221		if (nr_trans > 3)
222			return -EINVAL;
223
224		ep->is_isoc = 1;
225		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
226
227		/*
228		 * Do triple-buffering on high-bandwidth iso endpoints.
229		 */
230		if (nr_trans > 1 && ep->nr_banks == 3)
231			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
232		else
233			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
234		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
235		break;
236	case USB_ENDPOINT_XFER_BULK:
237		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
238		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
239		break;
240	case USB_ENDPOINT_XFER_INT:
241		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
242		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
243		break;
244	}
245
246	spin_lock_irqsave(&ep->udc->lock, flags);
247
248	ep->desc = desc;
249	ep->ep.maxpacket = maxpacket;
250
251	usba_ep_writel(ep, CFG, ept_cfg);
252	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
253
254	usba_writel(udc, INT_ENB,
255		    (usba_readl(udc, INT_ENB)
256		     | USBA_BF(EPT_INT, 1 << ep->index)));
257
258	spin_unlock_irqrestore(&udc->lock, flags);
259
260	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
261	    (unsigned long)usba_ep_readl(ep, CFG));
262	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
263	    (unsigned long)usba_readl(udc, INT_ENB));
264
265	return 0;
266}
267
268static int usba_ep_disable(struct usb_ep *_ep)
269{
270	struct usba_ep *ep = to_usba_ep(_ep);
271	struct usba_udc *udc = ep->udc;
272	LIST_HEAD(req_list);
273	unsigned long flags = 0;
274
275	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
276
277	spin_lock_irqsave(&udc->lock, flags);
278
279	if (!ep->desc) {
280		spin_unlock_irqrestore(&udc->lock, flags);
281		/* REVISIT because this driver disables endpoints in
282		 * reset_all_endpoints() before calling disconnect(),
283		 * most gadget drivers would trigger this non-error ...
284		 */
285		if (udc->gadget.speed != USB_SPEED_UNKNOWN)
286			DBG(DBG_ERR, "ep_disable: %s not enabled\n",
287			    ep->ep.name);
288		return -EINVAL;
289	}
290	ep->desc = NULL;
291
292	list_splice_init(&ep->queue, &req_list);
293	usba_ep_writel(ep, CFG, 0);
294	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
295	usba_writel(udc, INT_ENB,
296		    usba_readl(udc, INT_ENB) &
297		    ~USBA_BF(EPT_INT, 1 << ep->index));
298
299	request_complete_list(ep, &req_list, -ESHUTDOWN);
300
301	spin_unlock_irqrestore(&udc->lock, flags);
302
303	return 0;
304}
305
306static struct usb_request *
307usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
308{
309	struct usba_request *req;
310
311	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
312
313	req = calloc(1, sizeof(struct usba_request));
314	if (!req)
315		return NULL;
316
317	INIT_LIST_HEAD(&req->queue);
318
319	return &req->req;
320}
321
322static void
323usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
324{
325	struct usba_request *req = to_usba_req(_req);
326
327	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
328
329	free(req);
330}
331
332static int
333usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
334{
335	struct usba_request *req = to_usba_req(_req);
336	struct usba_ep *ep = to_usba_ep(_ep);
337	struct usba_udc *udc = ep->udc;
338	unsigned long flags = 0;
339	int ret;
340
341	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
342	    ep->ep.name, req, _req->length);
343
344	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
345	    !ep->desc)
346		return -ESHUTDOWN;
347
348	req->submitted = 0;
349	req->using_dma = 0;
350	req->last_transaction = 0;
351
352	_req->status = -EINPROGRESS;
353	_req->actual = 0;
354
355	/* May have received a reset since last time we checked */
356	ret = -ESHUTDOWN;
357	spin_lock_irqsave(&udc->lock, flags);
358	if (ep->desc) {
359		list_add_tail(&req->queue, &ep->queue);
360
361		if ((!ep_is_control(ep) && ep->is_in) ||
362		    (ep_is_control(ep) && (ep->state == DATA_STAGE_IN ||
363		    ep->state == STATUS_STAGE_IN)))
364			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
365		else
366			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
367
368		ret = 0;
369	}
370	spin_unlock_irqrestore(&udc->lock, flags);
371
372	return ret;
373}
374
375static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
376{
377	struct usba_ep *ep = to_usba_ep(_ep);
378	struct usba_request *req = to_usba_req(_req);
379
380	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
381	    ep->ep.name, req);
382
383	/*
384	 * Errors should stop the queue from advancing until the
385	 * completion function returns.
386	 */
387	list_del_init(&req->queue);
388
389	request_complete(ep, req, -ECONNRESET);
390
391	/* Process the next request if any */
392	submit_next_request(ep);
393
394	return 0;
395}
396
397static int usba_ep_set_halt(struct usb_ep *_ep, int value)
398{
399	struct usba_ep *ep = to_usba_ep(_ep);
400	unsigned long flags = 0;
401	int ret = 0;
402
403	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
404	    value ? "set" : "clear");
405
406	if (!ep->desc) {
407		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
408		    ep->ep.name);
409		return -ENODEV;
410	}
411
412	if (ep->is_isoc) {
413		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
414		    ep->ep.name);
415		return -ENOTTY;
416	}
417
418	spin_lock_irqsave(&udc->lock, flags);
419
420	/*
421	 * We can't halt IN endpoints while there are still data to be
422	 * transferred
423	 */
424	if (!list_empty(&ep->queue) ||
425	    ((value && ep->is_in && (usba_ep_readl(ep, STA) &
426	    USBA_BF(BUSY_BANKS, -1L))))) {
427		ret = -EAGAIN;
428	} else {
429		if (value)
430			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
431		else
432			usba_ep_writel(ep, CLR_STA,
433				       USBA_FORCE_STALL | USBA_TOGGLE_CLR);
434		usba_ep_readl(ep, STA);
435	}
436
437	spin_unlock_irqrestore(&udc->lock, flags);
438
439	return ret;
440}
441
442static int usba_ep_fifo_status(struct usb_ep *_ep)
443{
444	struct usba_ep *ep = to_usba_ep(_ep);
445
446	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
447}
448
449static void usba_ep_fifo_flush(struct usb_ep *_ep)
450{
451	struct usba_ep *ep = to_usba_ep(_ep);
452	struct usba_udc *udc = ep->udc;
453
454	usba_writel(udc, EPT_RST, 1 << ep->index);
455}
456
457static const struct usb_ep_ops usba_ep_ops = {
458	.enable		= usba_ep_enable,
459	.disable	= usba_ep_disable,
460	.alloc_request	= usba_ep_alloc_request,
461	.free_request	= usba_ep_free_request,
462	.queue		= usba_ep_queue,
463	.dequeue	= usba_ep_dequeue,
464	.set_halt	= usba_ep_set_halt,
465	.fifo_status	= usba_ep_fifo_status,
466	.fifo_flush	= usba_ep_fifo_flush,
467};
468
469static int usba_udc_get_frame(struct usb_gadget *gadget)
470{
471	struct usba_udc *udc = to_usba_udc(gadget);
472
473	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
474}
475
476static int usba_udc_wakeup(struct usb_gadget *gadget)
477{
478	struct usba_udc *udc = to_usba_udc(gadget);
479	unsigned long flags = 0;
480	u32 ctrl;
481	int ret = -EINVAL;
482
483	spin_lock_irqsave(&udc->lock, flags);
484	if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
485		ctrl = usba_readl(udc, CTRL);
486		usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
487		ret = 0;
488	}
489	spin_unlock_irqrestore(&udc->lock, flags);
490
491	return ret;
492}
493
494static int
495usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
496{
497	struct usba_udc *udc = to_usba_udc(gadget);
498	unsigned long flags = 0;
499
500	spin_lock_irqsave(&udc->lock, flags);
501	if (is_selfpowered)
502		udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
503	else
504		udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
505	spin_unlock_irqrestore(&udc->lock, flags);
506
507	return 0;
508}
509
510static const struct usb_gadget_ops usba_udc_ops = {
511	.get_frame		= usba_udc_get_frame,
512	.wakeup			= usba_udc_wakeup,
513	.set_selfpowered	= usba_udc_set_selfpowered,
514};
515
516static struct usb_endpoint_descriptor usba_ep0_desc = {
517	.bLength = USB_DT_ENDPOINT_SIZE,
518	.bDescriptorType = USB_DT_ENDPOINT,
519	.bEndpointAddress = 0,
520	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
521	.wMaxPacketSize = cpu_to_le16(64),
522	/* FIXME: I have no idea what to put here */
523	.bInterval = 1,
524};
525
526/*
527 * Called with interrupts disabled and udc->lock held.
528 */
529static void reset_all_endpoints(struct usba_udc *udc)
530{
531	struct usba_ep *ep;
532	struct usba_request *req, *tmp_req;
533
534	usba_writel(udc, EPT_RST, ~0UL);
535
536	ep = to_usba_ep(udc->gadget.ep0);
537	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
538		list_del_init(&req->queue);
539		request_complete(ep, req, -ECONNRESET);
540	}
541
542	/* NOTE:  normally, the next call to the gadget driver is in
543	 * charge of disabling endpoints... usually disconnect().
544	 * The exception would be entering a high speed test mode.
545	 *
546	 * FIXME remove this code ... and retest thoroughly.
547	 */
548	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
549		if (ep->desc) {
550			spin_unlock(&udc->lock);
551			usba_ep_disable(&ep->ep);
552			spin_lock(&udc->lock);
553		}
554	}
555}
556
557static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
558{
559	struct usba_ep *ep;
560
561	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
562		return to_usba_ep(udc->gadget.ep0);
563
564	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
565		u8 bEndpointAddress;
566
567		if (!ep->desc)
568			continue;
569		bEndpointAddress = ep->desc->bEndpointAddress;
570		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
571			continue;
572		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
573				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
574			return ep;
575	}
576
577	return NULL;
578}
579
580/* Called with interrupts disabled and udc->lock held */
581static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
582{
583	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
584	ep->state = WAIT_FOR_SETUP;
585}
586
587static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
588{
589	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
590		return 1;
591	return 0;
592}
593
594static inline void set_address(struct usba_udc *udc, unsigned int addr)
595{
596	u32 regval;
597
598	DBG(DBG_BUS, "setting address %u...\n", addr);
599	regval = usba_readl(udc, CTRL);
600	regval = USBA_BFINS(DEV_ADDR, addr, regval);
601	usba_writel(udc, CTRL, regval);
602}
603
604static int do_test_mode(struct usba_udc *udc)
605{
606	static const char test_packet_buffer[] = {
607		/* JKJKJKJK * 9 */
608		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
609		/* JJKKJJKK * 8 */
610		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
611		/* JJKKJJKK * 8 */
612		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
613		/* JJJJJJJKKKKKKK * 8 */
614		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
615		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
616		/* JJJJJJJK * 8 */
617		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
618		/* {JKKKKKKK * 10}, JK */
619		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
620	};
621	struct usba_ep *ep;
622	int test_mode;
623
624	test_mode = udc->test_mode;
625
626	/* Start from a clean slate */
627	reset_all_endpoints(udc);
628
629	switch (test_mode) {
630	case 0x0100:
631		/* Test_J */
632		usba_writel(udc, TST, USBA_TST_J_MODE);
633		DBG(DBG_ALL, "Entering Test_J mode...\n");
634		break;
635	case 0x0200:
636		/* Test_K */
637		usba_writel(udc, TST, USBA_TST_K_MODE);
638		DBG(DBG_ALL, "Entering Test_K mode...\n");
639		break;
640	case 0x0300:
641		/*
642		 * Test_SE0_NAK: Force high-speed mode and set up ep0
643		 * for Bulk IN transfers
644		 */
645		ep = &udc->usba_ep[0];
646		usba_writel(udc, TST,
647			    USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
648		usba_ep_writel(ep, CFG,
649			       USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
650			       | USBA_EPT_DIR_IN
651			       | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
652			       | USBA_BF(BK_NUMBER, 1));
653		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
654			set_protocol_stall(udc, ep);
655			DBG(DBG_ALL, "Test_SE0_NAK: ep0 not mapped\n");
656		} else {
657			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
658			DBG(DBG_ALL, "Entering Test_SE0_NAK mode...\n");
659		}
660		break;
661	case 0x0400:
662		/* Test_Packet */
663		ep = &udc->usba_ep[0];
664		usba_ep_writel(ep, CFG,
665			       USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
666			       | USBA_EPT_DIR_IN
667			       | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
668			       | USBA_BF(BK_NUMBER, 1));
669		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
670			set_protocol_stall(udc, ep);
671			DBG(DBG_ALL, "Test_Packet: ep0 not mapped\n");
672		} else {
673			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
674			usba_writel(udc, TST, USBA_TST_PKT_MODE);
675			memcpy(ep->fifo, test_packet_buffer,
676			       sizeof(test_packet_buffer));
677			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
678			DBG(DBG_ALL, "Entering Test_Packet mode...\n");
679		}
680		break;
681	default:
682		DBG(DBG_ERR, "Invalid test mode: 0x%04x\n", test_mode);
683		return -EINVAL;
684	}
685
686	return 0;
687}
688
689/* Avoid overly long expressions */
690static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
691{
692	if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
693		return true;
694	return false;
695}
696
697static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
698{
699	if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
700		return true;
701	return false;
702}
703
704static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
705{
706	if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
707		return true;
708	return false;
709}
710
711static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
712		struct usb_ctrlrequest *crq)
713{
714	int retval = 0;
715
716	switch (crq->bRequest) {
717	case USB_REQ_GET_STATUS: {
718		u16 status;
719
720		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
721			status = cpu_to_le16(udc->devstatus);
722		} else if (crq->bRequestType
723				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
724			status = cpu_to_le16(0);
725		} else if (crq->bRequestType
726				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
727			struct usba_ep *target;
728
729			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
730			if (!target)
731				goto stall;
732
733			status = 0;
734			if (is_stalled(udc, target))
735				status |= cpu_to_le16(1);
736		} else {
737			goto delegate;
738		}
739
740		/* Write directly to the FIFO. No queueing is done. */
741		if (crq->wLength != cpu_to_le16(sizeof(status)))
742			goto stall;
743		ep->state = DATA_STAGE_IN;
744		__raw_writew(status, ep->fifo);
745		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
746		break;
747	}
748
749	case USB_REQ_CLEAR_FEATURE: {
750		if (crq->bRequestType == USB_RECIP_DEVICE) {
751			if (feature_is_dev_remote_wakeup(crq))
752				udc->devstatus
753					&= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
754			else
755				/* Can't CLEAR_FEATURE TEST_MODE */
756				goto stall;
757		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
758			struct usba_ep *target;
759
760			if (crq->wLength != cpu_to_le16(0) ||
761			    !feature_is_ep_halt(crq))
762				goto stall;
763			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
764			if (!target)
765				goto stall;
766
767			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
768			if (target->index != 0)
769				usba_ep_writel(target, CLR_STA,
770					       USBA_TOGGLE_CLR);
771		} else {
772			goto delegate;
773		}
774
775		send_status(udc, ep);
776		break;
777	}
778
779	case USB_REQ_SET_FEATURE: {
780		if (crq->bRequestType == USB_RECIP_DEVICE) {
781			if (feature_is_dev_test_mode(crq)) {
782				send_status(udc, ep);
783				ep->state = STATUS_STAGE_TEST;
784				udc->test_mode = le16_to_cpu(crq->wIndex);
785				return 0;
786			} else if (feature_is_dev_remote_wakeup(crq)) {
787				udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
788			} else {
789				goto stall;
790			}
791		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
792			struct usba_ep *target;
793
794			if (crq->wLength != cpu_to_le16(0) ||
795			    !feature_is_ep_halt(crq))
796				goto stall;
797
798			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
799			if (!target)
800				goto stall;
801
802			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
803		} else {
804			goto delegate;
805		}
806
807		send_status(udc, ep);
808		break;
809	}
810
811	case USB_REQ_SET_ADDRESS:
812		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
813			goto delegate;
814
815		set_address(udc, le16_to_cpu(crq->wValue));
816		send_status(udc, ep);
817		ep->state = STATUS_STAGE_ADDR;
818		break;
819
820	default:
821delegate:
822		spin_unlock(&udc->lock);
823		retval = udc->driver->setup(&udc->gadget, crq);
824		spin_lock(&udc->lock);
825	}
826
827	return retval;
828
829stall:
830	DBG(DBG_ALL, "%s: Invalid setup request: %02x.%02x v%04x i%04x l%d\n",
831	    ep->ep.name, crq->bRequestType, crq->bRequest,
832	    le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
833	    le16_to_cpu(crq->wLength));
834	set_protocol_stall(udc, ep);
835
836	return -1;
837}
838
839static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
840{
841	struct usba_request *req;
842	u32 epstatus;
843	u32 epctrl;
844
845restart:
846	epstatus = usba_ep_readl(ep, STA);
847	epctrl = usba_ep_readl(ep, CTL);
848
849	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
850	    ep->ep.name, ep->state, epstatus, epctrl);
851
852	req = NULL;
853	if (!list_empty(&ep->queue))
854		req = list_entry(ep->queue.next,
855				 struct usba_request, queue);
856
857	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
858		if (req->submitted)
859			next_fifo_transaction(ep, req);
860		else
861			submit_request(ep, req);
862
863		if (req->last_transaction) {
864			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
865			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
866		}
867		goto restart;
868	}
869	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
870		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
871
872		switch (ep->state) {
873		case DATA_STAGE_IN:
874			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
875			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
876			ep->state = STATUS_STAGE_OUT;
877			break;
878		case STATUS_STAGE_ADDR:
879			/* Activate our new address */
880			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
881						| USBA_FADDR_EN));
882			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
883			ep->state = WAIT_FOR_SETUP;
884			break;
885		case STATUS_STAGE_IN:
886			if (req) {
887				list_del_init(&req->queue);
888				request_complete(ep, req, 0);
889			}
890			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
891			ep->state = WAIT_FOR_SETUP;
892			break;
893		case STATUS_STAGE_TEST:
894			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
895			ep->state = WAIT_FOR_SETUP;
896			if (do_test_mode(udc))
897				set_protocol_stall(udc, ep);
898			break;
899		default:
900			DBG(DBG_ALL, "%s: TXCOMP: Invalid endpoint state %d\n",
901			    ep->ep.name, ep->state);
902			set_protocol_stall(udc, ep);
903			break;
904		}
905
906		goto restart;
907	}
908	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
909		switch (ep->state) {
910		case STATUS_STAGE_OUT:
911			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
912			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
913
914			if (req) {
915				list_del_init(&req->queue);
916				request_complete(ep, req, 0);
917			}
918			ep->state = WAIT_FOR_SETUP;
919			break;
920
921		case DATA_STAGE_OUT:
922			receive_data(ep);
923			break;
924
925		default:
926			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
927			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
928			DBG(DBG_ALL, "%s: RXRDY: Invalid endpoint state %d\n",
929			    ep->ep.name, ep->state);
930			set_protocol_stall(udc, ep);
931			break;
932		}
933
934		goto restart;
935	}
936	if (epstatus & USBA_RX_SETUP) {
937		union {
938			struct usb_ctrlrequest crq;
939			unsigned long data[2];
940		} crq;
941		unsigned int pkt_len;
942		int ret;
943
944		if (ep->state != WAIT_FOR_SETUP) {
945			/*
946			 * Didn't expect a SETUP packet at this
947			 * point. Clean up any pending requests (which
948			 * may be successful).
949			 */
950			int status = -EPROTO;
951
952			/*
953			 * RXRDY and TXCOMP are dropped when SETUP
954			 * packets arrive.  Just pretend we received
955			 * the status packet.
956			 */
957			if (ep->state == STATUS_STAGE_OUT ||
958			    ep->state == STATUS_STAGE_IN) {
959				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
960				status = 0;
961			}
962
963			if (req) {
964				list_del_init(&req->queue);
965				request_complete(ep, req, status);
966			}
967		}
968
969		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
970		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
971		if (pkt_len != sizeof(crq)) {
972			DBG(DBG_ALL, "udc: Invalid length %u (expected %zu)\n",
973			    pkt_len, sizeof(crq));
974			set_protocol_stall(udc, ep);
975			return;
976		}
977
978		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
979		memcpy(crq.data, ep->fifo, sizeof(crq));
980
981		/* Free up one bank in the FIFO so that we can
982		 * generate or receive a reply right away. */
983		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
984
985		if (crq.crq.bRequestType & USB_DIR_IN) {
986			/*
987			 * The USB 2.0 spec states that "if wLength is
988			 * zero, there is no data transfer phase."
989			 * However, testusb #14 seems to actually
990			 * expect a data phase even if wLength = 0...
991			 */
992			ep->state = DATA_STAGE_IN;
993		} else {
994			if (crq.crq.wLength != cpu_to_le16(0))
995				ep->state = DATA_STAGE_OUT;
996			else
997				ep->state = STATUS_STAGE_IN;
998		}
999
1000		ret = -1;
1001		if (ep->index == 0) {
1002			ret = handle_ep0_setup(udc, ep, &crq.crq);
1003		} else {
1004			spin_unlock(&udc->lock);
1005			ret = udc->driver->setup(&udc->gadget, &crq.crq);
1006			spin_lock(&udc->lock);
1007		}
1008
1009		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1010		    crq.crq.bRequestType, crq.crq.bRequest,
1011		    le16_to_cpu(crq.crq.wLength), ep->state, ret);
1012
1013		if (ret < 0) {
1014			/* Let the host know that we failed */
1015			set_protocol_stall(udc, ep);
1016		}
1017	}
1018}
1019
1020static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1021{
1022	struct usba_request *req;
1023	u32 epstatus;
1024	u32 epctrl;
1025
1026	epstatus = usba_ep_readl(ep, STA);
1027	epctrl = usba_ep_readl(ep, CTL);
1028
1029	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1030
1031	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1032		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1033
1034		if (list_empty(&ep->queue)) {
1035			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1036			return;
1037		}
1038
1039		req = list_entry(ep->queue.next, struct usba_request, queue);
1040
1041		if (req->submitted)
1042			next_fifo_transaction(ep, req);
1043		else
1044			submit_request(ep, req);
1045
1046		if (req->last_transaction) {
1047			list_del_init(&req->queue);
1048			request_complete(ep, req, 0);
1049		}
1050
1051		epstatus = usba_ep_readl(ep, STA);
1052		epctrl = usba_ep_readl(ep, CTL);
1053	}
1054
1055	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1056		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1057		receive_data(ep);
1058	}
1059}
1060
1061static int usba_udc_irq(struct usba_udc *udc)
1062{
1063	u32 status, ep_status;
1064
1065	spin_lock(&udc->lock);
1066
1067	status = usba_readl(udc, INT_STA);
1068	DBG(DBG_INT, "irq, status=%#08x\n", status);
1069
1070	if (status & USBA_DET_SUSPEND) {
1071		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1072		DBG(DBG_BUS, "Suspend detected\n");
1073		if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1074		    udc->driver && udc->driver->suspend) {
1075			spin_unlock(&udc->lock);
1076			udc->driver->suspend(&udc->gadget);
1077			spin_lock(&udc->lock);
1078		}
1079	}
1080
1081	if (status & USBA_WAKE_UP) {
1082		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1083		DBG(DBG_BUS, "Wake Up CPU detected\n");
1084	}
1085
1086	if (status & USBA_END_OF_RESUME) {
1087		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1088		DBG(DBG_BUS, "Resume detected\n");
1089		if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1090		    udc->driver && udc->driver->resume) {
1091			spin_unlock(&udc->lock);
1092			udc->driver->resume(&udc->gadget);
1093			spin_lock(&udc->lock);
1094		}
1095	}
1096
1097	ep_status = USBA_BFEXT(EPT_INT, status);
1098	if (ep_status) {
1099		int i;
1100
1101		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1102			if (ep_status & (1 << i)) {
1103				if (ep_is_control(&udc->usba_ep[i]))
1104					usba_control_irq(udc, &udc->usba_ep[i]);
1105				else
1106					usba_ep_irq(udc, &udc->usba_ep[i]);
1107			}
1108	}
1109
1110	if (status & USBA_END_OF_RESET) {
1111		struct usba_ep *ep0;
1112
1113		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1114		reset_all_endpoints(udc);
1115
1116		if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1117		    udc->driver->disconnect) {
1118			udc->gadget.speed = USB_SPEED_UNKNOWN;
1119			spin_unlock(&udc->lock);
1120			udc->driver->disconnect(&udc->gadget);
1121			spin_lock(&udc->lock);
1122		}
1123
1124		if (status & USBA_HIGH_SPEED)
1125			udc->gadget.speed = USB_SPEED_HIGH;
1126		else
1127			udc->gadget.speed = USB_SPEED_FULL;
1128
1129		ep0 = &udc->usba_ep[0];
1130		ep0->desc = &usba_ep0_desc;
1131		ep0->state = WAIT_FOR_SETUP;
1132		usba_ep_writel(ep0, CFG,
1133			       (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1134				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1135				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1136		usba_ep_writel(ep0, CTL_ENB,
1137			       USBA_EPT_ENABLE | USBA_RX_SETUP);
1138		usba_writel(udc, INT_ENB,
1139			    (usba_readl(udc, INT_ENB)
1140			     | USBA_BF(EPT_INT, 1)
1141			     | USBA_DET_SUSPEND
1142			     | USBA_END_OF_RESUME));
1143
1144		/*
1145		 * Unclear why we hit this irregularly, e.g. in usbtest,
1146		 * but it's clearly harmless...
1147		 */
1148		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1149			DBG(DBG_ALL, "ODD: EP0 configuration is invalid!\n");
1150	}
1151
1152	spin_unlock(&udc->lock);
1153
1154	return 0;
1155}
1156
1157static int atmel_usba_start(struct usba_udc *udc)
1158{
1159	udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1160
1161	udc->vbus_prev = 0;
1162
1163	/* If Vbus is present, enable the controller and wait for reset */
1164	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1165		usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1166		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1167	}
1168
1169	return 0;
1170}
1171
1172static int atmel_usba_stop(struct usba_udc *udc)
1173{
1174	udc->gadget.speed = USB_SPEED_UNKNOWN;
1175	reset_all_endpoints(udc);
1176
1177	/* This will also disable the DP pullup */
1178	usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1179
1180	return 0;
1181}
1182
1183static struct usba_udc controller = {
1184	.regs = (unsigned *)ATMEL_BASE_UDPHS,
1185	.fifo = (unsigned *)ATMEL_BASE_UDPHS_FIFO,
1186	.gadget = {
1187		.ops		= &usba_udc_ops,
1188		.ep_list	= LIST_HEAD_INIT(controller.gadget.ep_list),
1189		.speed		= USB_SPEED_HIGH,
1190		.is_dualspeed	= 1,
1191		.name		= "atmel_usba_udc",
1192	},
1193};
1194
1195int dm_usb_gadget_handle_interrupts(struct udevice *dev)
1196{
1197	struct usba_udc *udc = &controller;
1198
1199	return usba_udc_irq(udc);
1200}
1201
1202int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1203{
1204	struct usba_udc *udc = &controller;
1205	int ret;
1206
1207	if (!driver || !driver->bind || !driver->setup) {
1208		printf("bad paramter\n");
1209		return -EINVAL;
1210	}
1211
1212	if (udc->driver) {
1213		printf("UDC already has a gadget driver\n");
1214		return -EBUSY;
1215	}
1216
1217	atmel_usba_start(udc);
1218
1219	udc->driver = driver;
1220
1221	ret = driver->bind(&udc->gadget);
1222	if (ret) {
1223		pr_err("driver->bind() returned %d\n", ret);
1224		udc->driver = NULL;
1225	}
1226
1227	return ret;
1228}
1229
1230int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1231{
1232	struct usba_udc *udc = &controller;
1233
1234	if (!driver || !driver->unbind || !driver->disconnect) {
1235		pr_err("bad paramter\n");
1236		return -EINVAL;
1237	}
1238
1239	driver->disconnect(&udc->gadget);
1240	driver->unbind(&udc->gadget);
1241	udc->driver = NULL;
1242
1243	atmel_usba_stop(udc);
1244
1245	return 0;
1246}
1247
1248static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,
1249				      struct usba_udc *udc)
1250{
1251	struct usba_ep *eps;
1252	int i;
1253
1254	eps = malloc(sizeof(struct usba_ep) * pdata->num_ep);
1255	if (!eps) {
1256		pr_err("failed to alloc eps\n");
1257		return NULL;
1258	}
1259
1260	udc->gadget.ep0 = &eps[0].ep;
1261
1262	INIT_LIST_HEAD(&udc->gadget.ep_list);
1263	INIT_LIST_HEAD(&eps[0].ep.ep_list);
1264
1265	for (i = 0; i < pdata->num_ep; i++) {
1266		struct usba_ep *ep = &eps[i];
1267
1268		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1269		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1270		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1271		ep->ep.ops = &usba_ep_ops;
1272		ep->ep.name = pdata->ep[i].name;
1273		ep->ep.maxpacket = pdata->ep[i].fifo_size;
1274		ep->fifo_size = ep->ep.maxpacket;
1275		ep->udc = udc;
1276		INIT_LIST_HEAD(&ep->queue);
1277		ep->nr_banks = pdata->ep[i].nr_banks;
1278		ep->index = pdata->ep[i].index;
1279		ep->can_dma = pdata->ep[i].can_dma;
1280		ep->can_isoc = pdata->ep[i].can_isoc;
1281		if (i)
1282			list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1283	};
1284
1285	return eps;
1286}
1287
1288int usba_udc_probe(struct usba_platform_data *pdata)
1289{
1290	struct usba_udc *udc;
1291
1292	udc = &controller;
1293
1294	udc->usba_ep = usba_udc_pdata(pdata, udc);
1295
1296	return 0;
1297}
1298