Searched refs:t3_read_reg (Results 1 - 8 of 8) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/cxgb3/ |
H A D | xgmac.c | 61 t3_read_reg(adap, ctrl); 103 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 140 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 168 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 172 store = t3_read_reg(adap, A_TP_TX_DROP_CFG_CH0 + idx); 190 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 200 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ 269 u32 v = t3_read_reg(mac->adapter, reg); 272 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */ 280 u32 v = t3_read_reg(ma [all...] |
H A D | t3_hw.c | 57 u32 val = t3_read_reg(adapter, reg); 104 u32 v = t3_read_reg(adapter, addr) & ~mask; 107 t3_read_reg(adapter, addr); /* flush */ 128 *vals++ = t3_read_reg(adap, data_reg); 166 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP); 168 val = t3_read_reg(adap, 173 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1); 175 val64 = t3_read_reg(adap, 221 ret = t3_read_reg(adapter, A_MI1_DATA); 284 ret = t3_read_reg(adapte [all...] |
H A D | mc5.c | 119 *v1 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA0); 120 *v2 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA1); 121 *v3 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA2); 151 unsigned int server_base = t3_read_reg(adap, A_MC5_DB_SERVER_INDEX); 338 cfg = t3_read_reg(adap, A_MC5_DB_CONFIG) & ~F_TMMODE; 424 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); 465 u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG);
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H A D | cxgb3_offload.c | 206 uiip->llimit = t3_read_reg(adapter, A_ULPRX_ISCSI_LLIMIT); 207 uiip->ulimit = t3_read_reg(adapter, A_ULPRX_ISCSI_ULIMIT); 208 uiip->tagmask = t3_read_reg(adapter, A_ULPRX_ISCSI_TAGMASK); 210 val = t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ); 214 val = t3_read_reg(adapter, A_TP_PARA_REG7); 223 t3_read_reg(adapter, A_PM1_TX_CFG) >> 17); 227 val = t3_read_reg(adapter, A_TP_PARA_REG2); 242 ((t3_read_reg(adapter, A_TP_PARA_REG2)) >> 251 if (val && (val != t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ))) { 281 t3_read_reg(adapte [all...] |
H A D | adapter.h | 280 static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) function
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H A D | ael1002.c | 902 status = t3_read_reg(phy->adapter, 904 t3_read_reg(phy->adapter, 906 t3_read_reg(phy->adapter, 908 t3_read_reg(phy->adapter,
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H A D | cxgb3_main.c | 212 t3_read_reg(adap, A_XGM_INT_STATUS + 266 t3_read_reg(adapter, A_XGM_INT_STATUS + 282 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); 290 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); 828 v = t3_read_reg(adap, A_TP_TM_PIO_DATA); 1423 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); 1694 *p++ = t3_read_reg(ap, start); 2643 t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset); 2722 cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset); 2735 status = t3_read_reg(adapte [all...] |
H A D | sge.c | 2698 t3_read_reg(adap, A_PL_CLI); /* flush */ 2728 map = t3_read_reg(adap, A_SG_DATA_INTR); 2763 map = t3_read_reg(adap, A_SG_DATA_INTR); 2820 unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE) & 2834 v = t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS); 2931 status = t3_read_reg(adap, A_SG_RSPQ_FL_STATUS);
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