Lines Matching refs:t3_read_reg
61 t3_read_reg(adap, ctrl);
103 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
140 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
168 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
172 store = t3_read_reg(adap, A_TP_TX_DROP_CFG_CH0 + idx);
190 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
200 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
269 u32 v = t3_read_reg(mac->adapter, reg);
272 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
280 u32 v = t3_read_reg(mac->adapter, reg);
283 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
306 val = t3_read_reg(adap, A_XGM_RX_CFG + oft) & ~F_COPYALLFRAMES;
365 (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
367 v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);
397 v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset);
452 val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);
456 G_RXMAXPKTSIZE(t3_read_reg(adap,
487 mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
489 mac->tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
494 mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
544 tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
550 tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
580 t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
582 t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
600 #define RMON_READ(mac, addr) t3_read_reg(mac->adapter, addr + mac->offset)
652 v = t3_read_reg(mac->adapter, A_TP_MIB_RDATA);