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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/cxgb3/
1/*
2 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33/* This file should not be included directly.  Include common.h instead. */
34
35#ifndef __T3_ADAPTER_H__
36#define __T3_ADAPTER_H__
37
38#include <linux/pci.h>
39#include <linux/spinlock.h>
40#include <linux/interrupt.h>
41#include <linux/timer.h>
42#include <linux/cache.h>
43#include <linux/mutex.h>
44#include <linux/bitops.h>
45#include "t3cdev.h"
46#include <asm/io.h>
47
48struct vlan_group;
49struct adapter;
50struct sge_qset;
51struct port_info;
52
53enum {			/* rx_offload flags */
54	T3_RX_CSUM	= 1 << 0,
55	T3_LRO		= 1 << 1,
56};
57
58enum mac_idx_types {
59	LAN_MAC_IDX	= 0,
60	SAN_MAC_IDX,
61
62	MAX_MAC_IDX
63};
64
65struct iscsi_config {
66	__u8	mac_addr[ETH_ALEN];
67	__u32	flags;
68	int (*send)(struct port_info *pi, struct sk_buff **skb);
69	int (*recv)(struct port_info *pi, struct sk_buff *skb);
70};
71
72struct port_info {
73	struct adapter *adapter;
74	struct vlan_group *vlan_grp;
75	struct sge_qset *qs;
76	u8 port_id;
77	u8 rx_offload;
78	u8 nqsets;
79	u8 first_qset;
80	struct cphy phy;
81	struct cmac mac;
82	struct link_config link_config;
83	struct net_device_stats netstats;
84	int activity;
85	__be32 iscsi_ipv4addr;
86	struct iscsi_config iscsic;
87
88	int link_fault; /* link fault was detected */
89};
90
91enum {				/* adapter flags */
92	FULL_INIT_DONE = (1 << 0),
93	USING_MSI = (1 << 1),
94	USING_MSIX = (1 << 2),
95	QUEUES_BOUND = (1 << 3),
96	TP_PARITY_INIT = (1 << 4),
97	NAPI_INIT = (1 << 5),
98};
99
100struct fl_pg_chunk {
101	struct page *page;
102	void *va;
103	unsigned int offset;
104	unsigned long *p_cnt;
105	dma_addr_t mapping;
106};
107
108struct rx_desc;
109struct rx_sw_desc;
110
111struct sge_fl {                     /* SGE per free-buffer list state */
112	unsigned int buf_size;      /* size of each Rx buffer */
113	unsigned int credits;       /* # of available Rx buffers */
114	unsigned int pend_cred;     /* new buffers since last FL DB ring */
115	unsigned int size;          /* capacity of free list */
116	unsigned int cidx;          /* consumer index */
117	unsigned int pidx;          /* producer index */
118	unsigned int gen;           /* free list generation */
119	struct fl_pg_chunk pg_chunk;/* page chunk cache */
120	unsigned int use_pages;     /* whether FL uses pages or sk_buffs */
121	unsigned int order;	    /* order of page allocations */
122	unsigned int alloc_size;    /* size of allocated buffer */
123	struct rx_desc *desc;       /* address of HW Rx descriptor ring */
124	struct rx_sw_desc *sdesc;   /* address of SW Rx descriptor ring */
125	dma_addr_t   phys_addr;     /* physical address of HW ring start */
126	unsigned int cntxt_id;      /* SGE context id for the free list */
127	unsigned long empty;        /* # of times queue ran out of buffers */
128	unsigned long alloc_failed; /* # of times buffer allocation failed */
129};
130
131/*
132 * Bundle size for grouping offload RX packets for delivery to the stack.
133 * Don't make this too big as we do prefetch on each packet in a bundle.
134 */
135# define RX_BUNDLE_SIZE 8
136
137struct rsp_desc;
138
139struct sge_rspq {		/* state for an SGE response queue */
140	unsigned int credits;	/* # of pending response credits */
141	unsigned int size;	/* capacity of response queue */
142	unsigned int cidx;	/* consumer index */
143	unsigned int gen;	/* current generation bit */
144	unsigned int polling;	/* is the queue serviced through NAPI? */
145	unsigned int holdoff_tmr;	/* interrupt holdoff timer in 100ns */
146	unsigned int next_holdoff;	/* holdoff time for next interrupt */
147	unsigned int rx_recycle_buf; /* whether recycling occurred
148					within current sop-eop */
149	struct rsp_desc *desc;	/* address of HW response ring */
150	dma_addr_t phys_addr;	/* physical address of the ring */
151	unsigned int cntxt_id;	/* SGE context id for the response q */
152	spinlock_t lock;	/* guards response processing */
153	struct sk_buff_head rx_queue; /* offload packet receive queue */
154	struct sk_buff *pg_skb; /* used to build frag list in napi handler */
155
156	unsigned long offload_pkts;
157	unsigned long offload_bundles;
158	unsigned long eth_pkts;	/* # of ethernet packets */
159	unsigned long pure_rsps;	/* # of pure (non-data) responses */
160	unsigned long imm_data;	/* responses with immediate data */
161	unsigned long rx_drops;	/* # of packets dropped due to no mem */
162	unsigned long async_notif; /* # of asynchronous notification events */
163	unsigned long empty;	/* # of times queue ran out of credits */
164	unsigned long nomem;	/* # of responses deferred due to no mem */
165	unsigned long unhandled_irqs;	/* # of spurious intrs */
166	unsigned long starved;
167	unsigned long restarted;
168};
169
170struct tx_desc;
171struct tx_sw_desc;
172
173struct sge_txq {		/* state for an SGE Tx queue */
174	unsigned long flags;	/* HW DMA fetch status */
175	unsigned int in_use;	/* # of in-use Tx descriptors */
176	unsigned int size;	/* # of descriptors */
177	unsigned int processed;	/* total # of descs HW has processed */
178	unsigned int cleaned;	/* total # of descs SW has reclaimed */
179	unsigned int stop_thres;	/* SW TX queue suspend threshold */
180	unsigned int cidx;	/* consumer index */
181	unsigned int pidx;	/* producer index */
182	unsigned int gen;	/* current value of generation bit */
183	unsigned int unacked;	/* Tx descriptors used since last COMPL */
184	struct tx_desc *desc;	/* address of HW Tx descriptor ring */
185	struct tx_sw_desc *sdesc;	/* address of SW Tx descriptor ring */
186	spinlock_t lock;	/* guards enqueueing of new packets */
187	unsigned int token;	/* WR token */
188	dma_addr_t phys_addr;	/* physical address of the ring */
189	struct sk_buff_head sendq;	/* List of backpressured offload packets */
190	struct tasklet_struct qresume_tsk;	/* restarts the queue */
191	unsigned int cntxt_id;	/* SGE context id for the Tx q */
192	unsigned long stops;	/* # of times q has been stopped */
193	unsigned long restarts;	/* # of queue restarts */
194};
195
196enum {				/* per port SGE statistics */
197	SGE_PSTAT_TSO,		/* # of TSO requests */
198	SGE_PSTAT_RX_CSUM_GOOD,	/* # of successful RX csum offloads */
199	SGE_PSTAT_TX_CSUM,	/* # of TX checksum offloads */
200	SGE_PSTAT_VLANEX,	/* # of VLAN tag extractions */
201	SGE_PSTAT_VLANINS,	/* # of VLAN tag insertions */
202
203	SGE_PSTAT_MAX		/* must be last */
204};
205
206struct napi_gro_fraginfo;
207
208struct sge_qset {		/* an SGE queue set */
209	struct adapter *adap;
210	struct napi_struct napi;
211	struct sge_rspq rspq;
212	struct sge_fl fl[SGE_RXQ_PER_SET];
213	struct sge_txq txq[SGE_TXQ_PER_SET];
214	int nomem;
215	int lro_enabled;
216	void *lro_va;
217	struct net_device *netdev;
218	struct netdev_queue *tx_q;	/* associated netdev TX queue */
219	unsigned long txq_stopped;	/* which Tx queues are stopped */
220	struct timer_list tx_reclaim_timer;	/* reclaims TX buffers */
221	struct timer_list rx_reclaim_timer;	/* reclaims RX buffers */
222	unsigned long port_stats[SGE_PSTAT_MAX];
223} ____cacheline_aligned;
224
225struct sge {
226	struct sge_qset qs[SGE_QSETS];
227	spinlock_t reg_lock;	/* guards non-atomic SGE registers (eg context) */
228};
229
230struct adapter {
231	struct t3cdev tdev;
232	struct list_head adapter_list;
233	void __iomem *regs;
234	struct pci_dev *pdev;
235	unsigned long registered_device_map;
236	unsigned long open_device_map;
237	unsigned long flags;
238
239	const char *name;
240	int msg_enable;
241	unsigned int mmio_len;
242
243	struct adapter_params params;
244	unsigned int slow_intr_mask;
245	unsigned long irq_stats[IRQ_NUM_STATS];
246
247	int msix_nvectors;
248	struct {
249		unsigned short vec;
250		char desc[22];
251	} msix_info[SGE_QSETS + 1];
252
253	/* T3 modules */
254	struct sge sge;
255	struct mc7 pmrx;
256	struct mc7 pmtx;
257	struct mc7 cm;
258	struct mc5 mc5;
259
260	struct net_device *port[MAX_NPORTS];
261	unsigned int check_task_cnt;
262	struct delayed_work adap_check_task;
263	struct work_struct ext_intr_handler_task;
264	struct work_struct fatal_error_handler_task;
265	struct work_struct link_fault_handler_task;
266
267	struct work_struct db_full_task;
268	struct work_struct db_empty_task;
269	struct work_struct db_drop_task;
270
271	struct dentry *debugfs_root;
272
273	struct mutex mdio_lock;
274	spinlock_t stats_lock;
275	spinlock_t work_lock;
276
277	struct sk_buff *nofail_skb;
278};
279
280static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
281{
282	u32 val = readl(adapter->regs + reg_addr);
283
284	CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
285	return val;
286}
287
288static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
289{
290	CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
291	writel(val, adapter->regs + reg_addr);
292}
293
294static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
295{
296	return netdev_priv(adap->port[idx]);
297}
298
299static inline int phy2portid(struct cphy *phy)
300{
301	struct adapter *adap = phy->adapter;
302	struct port_info *port0 = adap2pinfo(adap, 0);
303
304	return &port0->phy == phy ? 0 : 1;
305}
306
307#define OFFLOAD_DEVMAP_BIT 15
308
309#define tdev2adap(d) container_of(d, struct adapter, tdev)
310
311static inline int offload_running(struct adapter *adapter)
312{
313	return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
314}
315
316int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
317
318void t3_os_ext_intr_handler(struct adapter *adapter);
319void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
320			int speed, int duplex, int fc);
321void t3_os_phymod_changed(struct adapter *adap, int port_id);
322void t3_os_link_fault(struct adapter *adapter, int port_id, int state);
323void t3_os_link_fault_handler(struct adapter *adapter, int port_id);
324
325void t3_sge_start(struct adapter *adap);
326void t3_sge_stop(struct adapter *adap);
327void t3_start_sge_timers(struct adapter *adap);
328void t3_stop_sge_timers(struct adapter *adap);
329void t3_free_sge_resources(struct adapter *adap);
330void t3_sge_err_intr_handler(struct adapter *adapter);
331irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
332netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
333int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
334void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
335int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
336		      int irq_vec_idx, const struct qset_params *p,
337		      int ntxq, struct net_device *dev,
338		      struct netdev_queue *netdevq);
339int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
340		unsigned char *data);
341irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
342extern struct workqueue_struct *cxgb3_wq;
343
344int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size);
345
346#endif				/* __T3_ADAPTER_H__ */
347