/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/ |
H A D | cdefBF544.h | 26 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) 34 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) 42 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) 53 #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val) 55 #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val) 62 #define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val) 64 #define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val) 66 #define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val) 68 #define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val) 70 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELA [all...] |
H A D | cdefBF542.h | 26 #define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val) 28 #define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val) 30 #define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val) 32 #define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val) 34 #define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val) 36 #define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val) 38 #define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val) 40 #define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val) 42 #define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val) 44 #define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STAT [all...] |
H A D | cdefBF548.h | 27 #define bfin_write_CAN1_MC1(val) bfin_write16(CAN1_MC1, val) 29 #define bfin_write_CAN1_MD1(val) bfin_write16(CAN1_MD1, val) 31 #define bfin_write_CAN1_TRS1(val) bfin_write16(CAN1_TRS1, val) 33 #define bfin_write_CAN1_TRR1(val) bfin_write16(CAN1_TRR1, val) 35 #define bfin_write_CAN1_TA1(val) bfin_write16(CAN1_TA1, val) 37 #define bfin_write_CAN1_AA1(val) bfin_write16(CAN1_AA1, val) 39 #define bfin_write_CAN1_RMP1(val) bfin_write16(CAN1_RMP1, val) 41 #define bfin_write_CAN1_RML1(val) bfin_write16(CAN1_RML1, val) 43 #define bfin_write_CAN1_MBTIF1(val) bfin_write16(CAN1_MBTIF1, val) 45 #define bfin_write_CAN1_MBRIF1(val) bfin_write16(CAN1_MBRIF [all...] |
H A D | cdefBF54x_base.h | 22 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) 25 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) 27 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) 37 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) 39 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) 95 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val) 106 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val) 108 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val) 110 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val) 114 #define bfin_write_RTC_PREN(val) bfin_write16(RTC_PRE [all...] |
H A D | cdefBF547.h | 26 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) 34 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) 42 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) 53 #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val) 55 #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val) 62 #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val) 64 #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val) 66 #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val) 68 #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val) 74 #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR [all...] |
H A D | bfin_serial_5xx.h | 21 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 22 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 23 #define UART_SET_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v) 24 #define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v) 25 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 26 #define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v) 27 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 28 #define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1) 29 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 30 #define UART_PUT_MCR(uart,v) bfin_write16(((uar [all...] |
H A D | cdefBF549.h | 27 #define bfin_write_MXVR_CONFIG(val) bfin_write16(MXVR_CONFIG, val) 41 #define bfin_write_MXVR_POSITION(val) bfin_write16(MXVR_POSITION, val) 43 #define bfin_write_MXVR_MAX_POSITION(val) bfin_write16(MXVR_MAX_POSITION, val) 45 #define bfin_write_MXVR_DELAY(val) bfin_write16(MXVR_DELAY, val) 47 #define bfin_write_MXVR_MAX_DELAY(val) bfin_write16(MXVR_MAX_DELAY, val) 51 #define bfin_write_MXVR_GADDR(val) bfin_write16(MXVR_GADDR, val) 114 #define bfin_write_MXVR_DMA0_COUNT(val) bfin_write16(MXVR_DMA0_COUNT, val) 118 #define bfin_write_MXVR_DMA0_CURR_COUNT(val) bfin_write16(MXVR_DMA0_CURR_COUNT, val) 127 #define bfin_write_MXVR_DMA1_COUNT(val) bfin_write16(MXVR_DMA1_COUNT, val) 131 #define bfin_write_MXVR_DMA1_CURR_COUNT(val) bfin_write16(MXVR_DMA1_CURR_COUN [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/ |
H A D | cdefBF538.h | 22 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) 25 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) 27 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) 31 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) 33 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) 69 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val) 77 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val) 79 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val) 81 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val) 85 #define bfin_write_RTC_PREN(val) bfin_write16(RTC_PRE [all...] |
H A D | cdefBF539.h | 14 #define bfin_write_MXVR_CONFIG(val) bfin_write16(MXVR_CONFIG, val) 30 #define bfin_write_MXVR_POSITION(val) bfin_write16(MXVR_POSITION, val) 32 #define bfin_write_MXVR_MAX_POSITION(val) bfin_write16(MXVR_MAX_POSITION, val) 34 #define bfin_write_MXVR_DELAY(val) bfin_write16(MXVR_DELAY, val) 36 #define bfin_write_MXVR_MAX_DELAY(val) bfin_write16(MXVR_MAX_DELAY, val) 40 #define bfin_write_MXVR_GADDR(val) bfin_write16(MXVR_GADDR, val) 94 #define bfin_write_MXVR_DMA0_COUNT(val) bfin_write16(MXVR_DMA0_COUNT, val) 98 #define bfin_write_MXVR_DMA0_CURR_COUNT(val) bfin_write16(MXVR_DMA0_CURR_COUNT, val) 104 #define bfin_write_MXVR_DMA1_COUNT(val) bfin_write16(MXVR_DMA1_COUNT, val) 108 #define bfin_write_MXVR_DMA1_CURR_COUNT(val) bfin_write16(MXVR_DMA1_CURR_COUN [all...] |
H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 20 #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) 21 #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) 24 #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) 26 #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) 98 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/ |
H A D | cdefBF534.h | 21 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) 24 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) 26 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) 31 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) 33 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) 53 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL,val) 63 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL,val) 65 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT,val) 67 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT,val) 71 #define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAS [all...] |
H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 20 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 21 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 24 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 26 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 97 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/ |
H A D | cdefBF525.h | 19 #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) 21 #define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val) 23 #define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val) 25 #define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val) 27 #define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val) 29 #define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val) 31 #define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val) 33 #define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val) 35 #define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val) 37 #define bfin_write_USB_INDEX(val) bfin_write16(USB_INDE [all...] |
H A D | cdefBF52x_base.h | 22 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) 25 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) 27 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) 34 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) 36 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) 83 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val) 94 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val) 96 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val) 98 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val) 102 #define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAS [all...] |
H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 20 #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) 21 #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) 24 #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) 26 #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) 98 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/ |
H A D | cdefBF532.h | 21 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) 23 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) 26 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) 31 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) 33 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) 51 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL,val) 61 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL,val) 63 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT,val) 65 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT,val) 69 #define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAS [all...] |
H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 20 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 21 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 24 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 26 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 89 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/ |
H A D | cdefBF514.h | 19 #define bfin_write_RSI_PWR_CTL(val) bfin_write16(RSI_PWR_CONTROL, val) 21 #define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val) 25 #define bfin_write_RSI_COMMAND(val) bfin_write16(RSI_COMMAND, val) 27 #define bfin_write_RSI_RESP_CMD(val) bfin_write16(RSI_RESP_CMD, val) 39 #define bfin_write_RSI_DATA_LGTH(val) bfin_write16(RSI_DATA_LGTH, val) 41 #define bfin_write_RSI_DATA_CTL(val) bfin_write16(RSI_DATA_CONTROL, val) 43 #define bfin_write_RSI_DATA_CNT(val) bfin_write16(RSI_DATA_CNT, val) 47 #define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val) 53 #define bfin_write_RSI_FIFO_CNT(val) bfin_write16(RSI_FIFO_CNT, val) 55 #define bfin_write_RSI_CEATA_CTL(val) bfin_write16(RSI_CEATA_CONTRO [all...] |
H A D | cdefBF51x_base.h | 22 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) 25 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) 27 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) 34 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) 36 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) 83 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val) 94 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val) 96 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val) 98 #define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val) 102 #define bfin_write_RTC_FAST(val) bfin_write16(RTC_FAS [all...] |
H A D | cdefBF518.h | 19 #define bfin_write_EMAC_PTP_CTL(val) bfin_write16(EMAC_PTP_CTL, val) 21 #define bfin_write_EMAC_PTP_IE(val) bfin_write16(EMAC_PTP_IE, val) 23 #define bfin_write_EMAC_PTP_ISTAT(val) bfin_write16(EMAC_PTP_ISTAT, val) 51 #define bfin_write_EMAC_PTP_ID_OFF(val) bfin_write16(EMAC_PTP_ID_OFF, val)
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H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) 20 #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) 21 #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) 24 #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) 26 #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) 98 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/ |
H A D | cdefBF561.h | 25 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) 28 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) 30 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) 41 #define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST,val) 43 #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR,val) 45 #define bfin_write_SICA_RVECT(val) bfin_write16(SICA_RVECT,val) 79 #define bfin_write_SICB_SWRST(val) bfin_write16(SICB_SWRST,val) 81 #define bfin_write_SICB_SYSCR(val) bfin_write16(SICB_SYSCR,val) 83 #define bfin_write_SICB_RVECT(val) bfin_write16(SICB_RVECT,val) 114 #define bfin_write_WDOGA_CTL(val) bfin_write16(WDOGA_CT [all...] |
H A D | bfin_serial_5xx.h | 19 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 20 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 21 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) 24 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 26 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 89 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/serial/ |
H A D | bfin_sport_uart.h | 61 #define SPORT_PUT_TCR1(sport, v) bfin_write16(((sport)->port.membase + OFFSET_TCR1), v) 62 #define SPORT_PUT_TCR2(sport, v) bfin_write16(((sport)->port.membase + OFFSET_TCR2), v) 63 #define SPORT_PUT_TCLKDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_TCLKDIV), v) 64 #define SPORT_PUT_TFSDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_TFSDIV), v) 65 #define SPORT_PUT_TX(sport, v) bfin_write16(((sport)->port.membase + OFFSET_TX), v) 66 #define SPORT_PUT_RX(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RX), v) 67 #define SPORT_PUT_RCR1(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RCR1), v) 68 #define SPORT_PUT_RCR2(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RCR2), v) 69 #define SPORT_PUT_RCLKDIV(sport, v) bfin_write16(((sport)->port.membase + OFFSET_RCLKDIV), v) 70 #define SPORT_PUT_RFSDIV(sport, v) bfin_write16(((spor [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/can/ |
H A D | bfin_can.c | 82 bfin_write16(®->clock, clk); 83 bfin_write16(®->timing, timing); 99 bfin_write16(®->mbim1, 0); 100 bfin_write16(®->mbim2, 0); 101 bfin_write16(®->gim, 0); 104 bfin_write16(®->control, SRS | CCR); 106 bfin_write16(®->control, CCR); 122 bfin_write16(®->mc1, 0); 123 bfin_write16(®->mc2, 0); 126 bfin_write16( [all...] |